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OrCAD LOGIC COMPILER  v2.01 N 12/09/94  (Source file .\PLD\#0053L.PLD)

  1  || FILE:   #0053.PLD
  2  || PROJ:   20120601        
  3  || PART:   G26CV12-#0053
  4  ||
  5  || DEV :   GAL26CV12
  6  ||
  7  ||         DESC:   MASTER DECODER
  8  ||
  9  |
 10  |GAL26CV12
 11  |
 12  || INPUT
 13  |  1:A9, 2:A10, 3:A11, 4:A12, 5:A13, 6:A14, 8:A15, 9:A16, 10:A17, 
 14  | 11:A18, 12:A19, 13:A20, 14:A21, 15:A22, 16:A23, 17:VMA, 18:RW,
 15  | 24:HIM, 25:X0E, 26:X1E, 27:XFE, 28:FWE,
 16  || OUTPUT 
 17  |  19:FE, 20:CS0, 22:ME, 23:CSF
 18  |
 19  | ACTIVE-LOW: FE, CS0, ME, CSF
 20  |
 21  |
 22  | SIGNATURE: "0053L   "
 23  |
 24  || VERSONE DEBUG/LOADER
 25  |
 26  || --------------------------------------------------------
 27  || HIM -> MAPPA AREA 00FE00 - 00FFFF IN RAM INVECE CHE IN FLASH
 28  || X0E -> ABILITA EXTERN MEMORY (/CX0) IN BANCO 1 AREA 010000 - 011FFF (8K)
 29  || X1E -> ABILITA EXTERN MEMORY (/CX1) IN BANCO 1 AREA 012000 - 013FFF (8K)
 30  || XFE -> ABILITA FLASH  MEMORY BANCHI F0/F7 AREA F00000 - F7FFFF
 31  || FWE -> ABILITA WRITE FLASH MEMORY
 32  || --------------------------------------------------------
 33  ||
 34  || /FE  -> ABILITA FLASH MEMORY F00000 - F7FFFF (512K)
 35  || /ME  -> ABILITA BANCHI RAM DA 4MB (ESCLUSO CSX, BK0)
 36  ||    BLOCCO F80000 - FFFFFF ABILITATO SE:
 37  ||         HIM = 1 AND XFE = 1 AND RW = 0
 38  ||         HIM = 0 AND RW = 1
 39  || /CS0 -> PRIMO BLOCCO 128K IN 00000 - 01FFFF (ESCLUSO IO)
 40  || /CSF -> BLOCCO FLASH IN F80000 - FFFFFF (512K)
 41  ||    READ ONLY IF HIM = 1 AND XFE = 1
 42  ||    MAPPA 00FE00 - 00FFFF IN F8FE00 - F8FFFF SE HIM=0 E RW=1
 43  || --------------------------------------------------------
 44  ||
 45  || ABILITAZIONE RAM RANGE 020000 - FFFFFF
 46  || B4MH -> BLOCCO 4MB 800000 - BFFFFF
 47  |  B4MH = (VMA' & A23  & A22' )
 48  || B2MH -> BLOCCO 2MB C00000 - DFFFFF
 49  |  B2MH = (VMA' & A23  & A22  & A21' )
 50  || B1MH -> BLOCCO 1MB E00000 - EFFFFF
 51  |  B1MH = (VMA' & A23  & A22  & A21  & A20' )
 52  || B5KA -> BLOCCO 512KB F00000 - F7FFFF (RAM SOLO SE XFE=0)
 53  |  B5KA = (VMA' & A23  & A22  & A21  & A20  & A19' & XFE')
 54  || B5KB -> BLOCCO 512KB F00000 - F7FFFF (RAM SOLO SE XFE=1, FWE=0, RW=0)
 55  |  B5KB = (VMA' & A23  & A22  & A21  & A20  & A19' & XFE & FWE' & RW')


 56  |  B6K  = (A23 & A22 & A21 & A20 & A19 & VMA')
 57  |  B6KR = (B6K & RW)
 58  |  B6KW = (B6K & HIM' & RW' & FWE)
 59  |  B6RM = (B6KR # B6KW)
 60  ||
 61  || B4ML -> BLOCCO 4MB 400000 - 7FFFFF
 62  |  B4ML = (VMA' & A23' & A22  )
 63  || B2ML -> BLOCCO 2MB 200000 - 3FFFFF
 64  |  B2ML = (VMA' & A23' & A22' & A21  )
 65  || B1ML -> BLOCCO 1MB 100000 - 1FFFFF
 66  |  B1ML = (VMA' & A23' & A22' & A21' & A20  )
 67  || B5KL -> BLOCCO 512KB 080000 - 0FFFFF
 68  |  B5KL = (VMA' & A23' & A22' & A21' & A20' & A19  )
 69  ||
 70  || /ME   -> ABILITAZIONE RAM RANGE 080000 - F7FFFF
 71  |  MXH = (B4MH # B2MH # B1MH # B5KA # B5KB)
 72  |  MXL = (B4ML # B2ML # B1ML # B5KL)
 73  |  ME  = (MXL # MXH # B6RM)
 74  ||
 75  || --------------------------------------------------------
 76  ||
 77  |  BANK0 = (A23' & A22' & A21' & A20' & A19' & A18' & A17' & A16' & VMA')
 78  |  BANK1 = (A23' & A22' & A21' & A20' & A19' & A18' & A17' & A16  & VMA')
 79  || --------------------------------------------------------
 80  ||
 81  || B0M -> ABILITAZIONE RAM RANGE 000000 - 00FFFF (BANCO 0)
 82  || 
 83  || BLOCCO 32K
 84  |  RB0 = (BANK0 & A15' )
 85  || BLOCCO 16K
 86  |  RB1 = (BANK0 & A15  & A14' )
 87  || BLOCCO 8K
 88  |  RB2 = (BANK0 & A15  & A14  & A13' )
 89  || BLOCCO 4K
 90  |  RB3 = (BANK0 & A15  & A14  & A13  & A12' )
 91  || BLOCCO 2K
 92  |  RB4 = (BANK0 & A15  & A14  & A13  & A12  & A11' )
 93  || BLOCCO 1K
 94  |  RB5 = (BANK0 & A15  & A14  & A13  & A12  & A11  & A10')
 95  || ULTIMO BLOCCO 512B (00FE00 - 00FFFF)
 96  |  RB7 = (BANK0 & A15  & A14  & A13  & A12  & A11  & A10 & A9)
 97  || RB7A -> RANGE 00FE00 - 00FFFF IN RAM SOLO SE HIM=1
 98  |  RB7A = (RB7 & HIM)
 99  || RB7B -> RANGE 00FE00 - 00FFFF IN RAM SOLO SE RW=0
100  |  RB7B = (RB7 & RW')
101  ||
102  |  B0M = (RB0 # RB1 # RB2 # RB3 # RB4 # RB5 # RB7A # RB7B)
103  || --------------------------------------------------------
104  ||
105  || B1M -> ABILITAZIONE RAM RANGE 010000 - 01FFFF (BANCO 1)
106  ||
107  || B32KH -> BLOCCO 32KB 018000 - 01FFFF
108  |  B32KH = (BANK1 & A15)
109  || B16KH -> BLOCCO 16KB 014000 - 017FFF
110  |  B16KH = (BANK1 & A15' & A14)
111  || B08KL -> BLOCCO 8KB 010000 - 011FFF
112  |  B08KL = (BANK1 & A15' & A14' & A13' & X0E')


113  || B08KH -> BLOCCO 8KB 012000 - 013FFF
114  |  B08KH = (BANK1 & A15' & A14' & A13  & X1E')
115  ||
116  |  B1M = (B32KH # B16KH # B08KL # B08KH)
117  || --------------------------------------------------------
118  ||
119  || /CS0 -> ABILITAZIONE RAM RANGE 000000 - 01FFFF (BANCHI 0 & 1)
120  |  CS0 = (B0M # B1M)
121  || --------------------------------------------------------
122  ||
123  || FS0  -> ABILITA FLASH RANGE F00000 - F7FFFF SOLO SE XFE=1
124  || FS0R -> ABILITA FLASH RANGE F00000 - F7FFFF SOLO LETTURA
125  |  FS0R = (A23 & A22 & A21 & A20 & A19' & VMA' & RW  & XFE)
126  || FS0W -> ABILITA FLASH RANGE F00000 - F7FFFF SOLO SCRITTURA (FWE=1)
127  |  FS0W = (A23 & A22 & A21 & A20 & A19' & VMA' & RW' & XFE & FWE)
128  ||
129  || /FE -> ABILITAZIONE FLASH RANGE F00000 - F7FFFF
130  |  FE = (FS0R # FS0W)
131  || --------------------------------------------------------
132  ||
133  || FS1  -> ABILITA FLASH RANGE F80000 - FFFFFF
134  || FS1R -> ABILITA FLASH RANGE F80000 - FFFFFF SOLO LETTURA
135  ||  FS1R = (A23 & A22 & A21 & A20 & A19 & VMA' & RW & HIM')
136  || FS1W -> ABILITA FLASH RANGE F80000 - FFFFFF SOLO SCRITTURA (FWE=1)
137  |  FS1W = (A23 & A22 & A21 & A20 & A19 & VMA' & RW' & FWE & HIM)
138  || FS2R -> MAPPA RANGE 00FE00 - 00FFFF IN F8FE00 - F8FFFF (HIM=0, RW=1)
139  |  FS2R = (RB7 & RW & HIM')
140  ||
141  || /CSF -> ABILITAZIONE FLASH RANGE F80000 - FFFFFF
142  |  CSF = (FS2R # FS1W)



I200  No fatal errors found in source code (logic phase).
I201  No warnings.


I202  5/27/13  9:23 am  (Monday)
I203  Memory usage 133K
I204  Elapsed time 1 second

OrCAD DEVICE FITTER  v2.01   12/09/94  (Source file .\PLD\#0053L.PLA)




RESOLVED EXPRESSIONS (Reduction 0)

Signal name      Row   Terms

ME                49   A19' A20  A21  A22  A23  VMA' RW' XFE  FWE' 
                  50   A19  A20  A21  A22  A23  VMA' RW' HIM' FWE  
                  51   A19' A20  A21  A22  A23  VMA' XFE' 
                  52   A19  A20  A21  A22  A23  VMA' RW  
                  53   A19  A20' A21' A22' A23' VMA' 
                  54   A20' A21  A22  A23  VMA' 
                  55   A20  A21' A22' A23' VMA' 
                  56   A21' A22  A23  VMA' 
                  57   A21  A22' A23' VMA' 
                  58   A22' A23  VMA' 
                  59   A22  A23' VMA' 

CS0               62   A9  A10  A11  A12  A13  A14  A15  A16' A17' A18' A19' 
                       A20' A21' A22' A23' VMA' RW' 
                  63   A9  A10  A11  A12  A13  A14  A15  A16' A17' A18' A19' 
                       A20' A21' A22' A23' VMA' HIM  
                  64   A10' A11  A12  A13  A14  A15  A16' A17' A18' A19' A20' 
                       A21' A22' A23' VMA' 
                  65   A11' A12  A13  A14  A15  A16' A17' A18' A19' A20' A21' 
                       A22' A23' VMA' 
                  66   A12' A13  A14  A15  A16' A17' A18' A19' A20' A21' A22' 
                       A23' VMA' 
                  67   A13' A14' A15' A16  A17' A18' A19' A20' A21' A22' A23' 
                       VMA' X0E' 
                  68   A13  A14' A15' A16  A17' A18' A19' A20' A21' A22' A23' 
                       VMA' X1E' 
                  69   A13' A14  A15  A16' A17' A18' A19' A20' A21' A22' A23' 
                       VMA' 
                  70   A14' A15  A16' A17' A18' A19' A20' A21' A22' A23' VMA' 
                  71   A14  A15' A16  A17' A18' A19' A20' A21' A22' A23' VMA' 
                  72   A15' A16' A17' A18' A19' A20' A21' A22' A23' VMA' 
                  73   A15  A16  A17' A18' A19' A20' A21' A22' A23' VMA' 

FE                75   A19' A20  A21  A22  A23  VMA' RW' XFE  FWE  
                  76   A19' A20  A21  A22  A23  VMA' RW  XFE  

CSF               38   A9  A10  A11  A12  A13  A14  A15  A16' A17' A18' A19' 
                       A20' A21' A22' A23' VMA' RW  HIM' 
                  39   A19  A20  A21  A22  A23  VMA' RW' HIM  FWE  




SIGNAL ASSIGNMENT
                                      Rows
 Pin    Signal name   Column     --------------    Activity
                                 Beg Avail Used

  1.     A9              0        -    -    -        High    (Clock)
  2.     A10             4        -    -    -        High     
  3.     A11             8        -    -    -        High     
  4.     A12            12        -    -    -        High     
  5.     A13            16        -    -    -        High     
  6.     A14            20        -    -    -        High     
  8.     A15            24        -    -    -        High     
  9.     A16            28        -    -    -        High     
 10.     A17            32        -    -    -        High     
 11.     A18            36        -    -    -        High     
 12.     A19            40        -    -    -        High     
 13.     A20            44        -    -    -        High     
 14.     A21            48        -    -    -        High     
 15.     A22            50      112    9    0        High    (Registered)
 16.     A23            46      103    9    0        High    (Registered)
 17.     VMA            42       94    9    0        High    (Registered)
 18.     RW             38       85    9    0        High    (Registered)
 19.     FE             35       74   11    2        Low     (Three-state)
 20.     CS0            31       61   13   12        Low     (Three-state)
 22.     ME             27       48   13   11        Low     (Three-state)
 23.     CSF            23       37   11    2        Low     (Three-state)
 24.     HIM            18       28    9    0        High    (Registered)
 25.     X0E            14       19    9    0        High    (Registered)
 26.     X1E            10       10    9    0        High    (Registered)
 27.     XFE             6        1    9    0        High    (Registered)
 28.     FWE             2        -    -    -        High     
 29.     -               -        0    1    0                 
 30.     -               -      121    1    0                 
                                    ---- ----
                                     122   27  (22%)


I200  No fatal errors found in source code (device phase).
I201  No warnings.



OrCAD DEVICE
Type:       GAL26CV12
*
QP28* QF6432* QV1024*
F0*
L1924 1111111111111111111111111111111111111111111111111111*
L1976 0111011101110111011001110111101110111001101010101010*
L2028 1101111111111111110111111111111111111110011001010101*
L2496 1111111111111111111111111111111111111111111111111111*
L2548 1110110111111111111111111111111111111110101001010101*
L2600 1101111111111111111011111111111111111110011001010101*
L2652 1111111011111111111111111111111111111111101001010101*
L2704 1111111111111111111111111111111111111101011001010101*
L2756 1111111111111111111111111111111111111111011010101010*
L2808 1111111111111111111111111111111111111111111010010101*
L2860 1111111111111111111111111111111111111111111001101010*
L2912 1111111111111111111111111111111111111111111011011001*
L2964 1111111111111111111111111111111111111111111011100110*
L3016 1111111111111111111111111111111111111111111011011110*
L3068 1111111111111111111111111111111111111111111011101101*
L3172 1111111111111111111111111111111111111111111111111111*
L3224 0111011101110111011101110111101110111010101010101010*
L3276 0111011101110111010101110111101110111011101010101010*
L3328 1111101101110111011101110111101110111011101010101010*
L3380 1111111110110111011101110111101110111011101010101010*
L3432 1111111111111011011101110111101110111011101010101010*
L3484 1111111111111110101110111011011110111011101010101010*
L3536 1111111111101111011110111011011110111011101010101010*
L3588 1111111111111111101101110111101110111011101010101010*
L3640 1111111111111111111110110111101110111011101010101010*
L3692 1111111111111111111101111011011110111011101010101010*
L3744 1111111111111111111111111011101110111011101010101010*
L3796 1111111111111111111111110111011110111011101010101010*
L3848 1111111111111111111111111111111111111111111111111111*
L3900 1101110111111111111111111111111111111110101001010101*
L3952 1111110111111111111111111111111111111101101001010101*
L6344 1111111101010101111111110011000000110000001101010011*
L6396 001101001100001000000010000000100000*
CAE1D*

I202  5/27/13  9:23 am  (Monday)
I203  Memory usage 12K
I204  Elapsed time 1 second