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Tue Jul 17 11:00:24 2018 Page 1
2500 A.D. 65816 Macro Assembler #26960 - Version 5.02g
-----------------------------------------------------
Input Filename : src\FF\masmx.asm
Output Filename : obj\FF\masmx.obj
Listing Has Been Relocated
2585 .LIST on
2586
2587 ;; .INCLUDE inc\dirp00.inc
2588 F8FFB1 .INCLUDE inc\dirp01.inc
2589 ;----------------------------------------------------------
2590 ; DIRP02.ASM
2591 ; PROGETTO: B1601
2592 ;
2593 ; Variabili in Direct Page $01
2594 ;----------------------------------------------------------
2595
2596 ; sezione COMMON -- questo permette di includere il file in piu' file
2597
2598
2599 .LIST on
2600
2601 000060 KBDBUFLEN .EQU 96 ; dimensione buffer di tastiera
2602
2603 DIRP01: .SECTION page0, ref_only, common ;Direct-Page 01
2604
2605 000000 .ABSOLUTE ;; inizia sempre da $00
2606 000000 .ORG 0x00
2607
2608 000000
2609 000000 KbdBuf .DS KBDBUFLEN ; buffer della tastiera
2610 000060 00 KbdITail .DB ; coda buffer tastiera
2611 000061 00 KbdIHead .DB ; testa buffer tastiera
2612 000062 00 KbdCnt .DB ; numero bytes nel buffer
2613 000063 00 KbdShift .DB
2614 000064 00 KbdFlag .DB
2615 000065 00 KbdToggle .DB
2616 000066 00 KbdSt .DB ; status tastiera dopo reset
2617 000067 00 PS2Ctl .DB ; flag controller PS2 keyboard
2618
2619 000068 00 LCDFlag .DB
2620 000069 00 LCDTmp .DB
2621 00006A 0000 LCDVal .DW
2622
2623 00006C 00 VBBFlag .DB ; flag video board
2624 00006D 00 VBBRam .DB ; flag video RAM
2625
2626 00006E 00 ScnLinTmp .DB
2627 00006F 00 ScnChBase .DB ; base video ram VDC
2628 000070 00 ScnAttBase .DB ; base ram attributi VDC
2629 000071 00 ScnCursMode .DB ; VDC cursore default
2630 000072 00 ScnSaveAttr .DB
Tue Jul 17 11:00:24 2018 Page 2
2631 000073 00 ScnInsert .DB
2632 000074 00 ScnAutoIns .DB ; bit 7 -> autoins - bit 6 -> modo input
2633 000075 00 ScnScroll .DB
2634 000076 00 ScnMaxRow .DB ; max. righe finestra (-1)
2635 000077 00 ScnMaxCols .DB ; max. colonne finestra (-1)
2636
2637 000078 ScnMapTabs1 .DS 10
2638 000082 ScnMapTabs2 .DS 4
2639 000086
2640 000086 0000 ScnPtr .DW ; puntatore video ram linea corrente
2641 000088 00 .DB
2642
2643 000089 00 ScnFiltLen .DB ; lunghezza set caratteri filtro
2644
2645 00008A 0000 ScnAtPtr .DW ; puntatore attributi ram linea corrente
2646 00008C 00 .DB
2647
2648 00008D 00 ScnTmpx .DB ; temporaneo: durante put char
2649 00008E
2650 00008E 00 ScnTop .DB ; riga superiore finestra
2651 00008F 00 ScnLeft .DB ; colonna sinistra finestra
2652 000090 00 ScnBottom .DB ; riga inferiore finestra
2653 000091 00 ScnRight .DB ; colonna destra finestra
2654 000092 00 ScnAttr .DB ; attributo default
2655 000093 00 ScnAttr2 .DB ; attributo alternativo
2656 000094 00 ScnRow .DB ; riga cursore
2657 000095 00 ScnCol .DB ; colonna cursore
2658 000096 00 ScnRowStart .DB ; riga di start input
2659 000097 00 ScnInput .DB ; riga di fine input
2660 000098 00 ScnColStart .DB ; colonna di start input
2661 000099 00 ScnSaveX .DB
2662 00009A 00 ScnSaveY .DB
2663 00009B 00 ScnTmpL .DB
2664 00009C 00 ScnTmpH .DB
2665 00009D 00 ScnSaveRow .DB
2666 00009E 00 ScnSaveCol .DB
2667 00009F 00 ScnCurChr .DB
2668 0000A0 00 ScnLstChr .DB
2669 0000A1 00 ScnCR .DB
2670 0000A2 0000 ScnPrm .DW ; puntatore long utilizzato da print imm
2671 0000A4 00 .DB ; banco puntatore ScnPrm
2672 0000A5 00 ScnMode .DB ; flag modo schermo
2673
2674 0000A6 ScnPtr1 LP
2675
2676 0000A9 00 ScnDefCol .DB ; default foreground color
2677
2678 0000AA ScnPtr2 LP
2679
2680 0000AD 00 ScnDefBkgCol .DB ; default background color
2681 0000AE 00 ScnInpRow .DB ; modo input line: riga start input
2682 0000AF 00 ScnInpCol .DB ; modo input line: colonna start input
2683 0000B0 00 ScnLstRow .DB ; modo input line: riga stop input
2684 0000B1 00 ScnLstCol .DB ; modo input line: colonna stop input
2685 0000B2 00 ScnFlag .DB ; Bit 7: input line - Bit 6: input riga unica
2686 0000B3 00 ScnMask .DB ; flag tasti funzione editor di linea
2687 0000B4 00 ScnFilt .DB ; filtro tasti editor di linea
Tue Jul 17 11:00:24 2018 Page 3
2688 0000B5 00 ScnCntrl .DB ; flag ASCII/CONTROL
2689 ;DflTxtIn .DB ; device di default text input
2690 ;DflTxtOut .DB ; device di default text output
2691 0000B6
2692 000047 SCNCLRLEN .EQU ($ - ScnLinTmp - 1)
2693
2694 ;SCNCLRLEN .EQU (DflTxtOut - ScnLinTmp)
2695
2696 ; variabili monitor
2697 0000B6 00 SMAddrL .DB ; address low/high
2698 0000B7 00 SMAddrH .DB
2699 0000B8 00 SMAddrK .DB ; address bank
2700 0000B9 00 SMFlag32 .DB ; flag parametro 32 bit
2701 0000BA 00 SMTmpL .DB ; temp. low/high
2702 0000BB 00 SMTmpH .DB
2703 0000BC 00 SMTmpK .DB ; temp. bank
2704 0000BD 00 SMTmpKK .DB ; high byte param. 32 bit
2705 0000BE 00 SMSizeL .DB ; size low/high
2706 0000BF 00 SMSizeH .DB
2707 0000C0 00 SMSizeK .DB ; size bank
2708 0000C1 00 SMXAddrL .DB ; address low/high XM
2709 0000C2 00 SMXAddrH .DB
2710 0000C3 00 SMXAddrK .DB ; address bank XM
2711 0000C4 00 SMbndx .DB ; indice input buffer
2712 0000C5 00 SMnprm .DB ; numero parametri riga di comando
2713 0000C6 00 SMdumb .DB
2714 0000C7 00 SMkr .DB
2715 0000C8 0000 SMpc .DW
2716 0000CA 00 SMsr .DB
2717 0000CB 00 SMbr .DB
2718 0000CC 0000 SMdp .DW
2719 0000CE 0000 SMac .DW
2720 0000D0 0000 SMxr .DW
2721 0000D2 0000 SMyr .DW
2722 0000D4 0000 SMsp .DW
2723
2724 0000D6 00 SMAuxL .DB
2725 0000D7 00 SMAuxH .DB
2726
2727 0000D8 00 asmlong .DB ; flag for CPU in 16 mode
2728 ; <7> -> A/M in 16 bit mode
2729 ; <6> -> X/Y in 16 bit mode
2730 0000D9 00 asmcpu .DB ; <7> -> 8 bit family
2731 ; <6> -> 65C02 cmos version
2732
2733 0000DA 00 SMctx .DB ; context (if = $00 no quit command)
2734 0000DB SMrsm LP ; long pointer to resume caller context
2735
2736 0000DE 00 rtcadr .DB ; rtc internal ram address
2737 0000DF 00 rtcbnk .DB ; RTC internal bank ram
2738 0000E0 00 cmdlin .DB ;
2739 0000E1 00 SMesc .DB
2740
2741 0000E2 SMXTmp: .DS 26 ; 26 bytes tmp
2742
2743 0000E2 SMTmp2 .EQU SMXTmp
2744 0000E4 SMTmp3 .EQU SMXTmp+2
Tue Jul 17 11:00:24 2018 Page 4
2745 0000E6 SMdwTmp1 .EQU SMXTmp+4
2746 0000EA SMdwTmp2 .EQU SMXTmp+8
2747 0000EE SMFsrc .EQU SMXTmp+12 ; source bank for flash update
2748 0000EF SMFflag .EQU SMXTmp+13 ; flag file for flash update
2749 0000F0 SMXPos2 .EQU SMXTmp+14
2750 0000F1 SMYPos2 .EQU SMXTmp+15
2751 0000F2 SMXPos3 .EQU SMXTmp+16
2752 0000F3 SMYPos3 .EQU SMXTmp+17
2753 ;SMAuxL .EQU SMXTmp+18
2754 ;SMAuxH .EQU SMXTmp+19
2755 0000F6 SMXPos .EQU SMXTmp+20
2756 0000F7 SMYPos .EQU SMXTmp+21
2757 0000F8 SMdwTmp3 .EQU SMXTmp+22
2758
2759 0000E2 atcmd .EQU SMXTmp ; save @ command
2760 0000E3 atnum .EQU SMXTmp+1 ; @ command index
2761 0000E4 atflag .EQU SMXTmp+2 ; @ L,S,V,R,W start address flag
2762 0000E5 atbnk .EQU SMXTmp+3 ; @ L,S,V,R,W bank
2763 0000E6 atstr .EQU SMXTmp+4 ; @ command string start (word)
2764 0000E8 atstart .EQU SMXTmp+6 ; @ L,S,V,R,W start address (word)
2765 0000EA atend .EQU SMXTmp+8 ; @ S,W end address (word)
2766 0000EC atbuf .EQU SMXTmp+10 ; @ local buffer pointer (word)
2767 0000EE atipb .EQU SMXTmp+12 ; @ bank of input buffer
2768 0000EF atdir .EQU SMXTmp+13 ; @ load dir flag
2769 0000F0 atptr .EQU SMXTmp+14 ; @ load dir pointer (word)
2770 0000F2 atsiz .EQU SMXTmp+16 ; @ buffer size (word)
2771 0000F5 atlp .EQU SMXTmp+19 ; @ long pointer
2772 0000F8 atsa .EQU SMXTmp+22 ; @ sa
2773
2774 0000E2 btmpx .EQU SMXTmp ; asc2bin conversion
2775 0000E3 brtcsec .EQU SMXTmp+1
2776 0000E4 brtcmin .EQU SMXTmp+2
2777 0000E5 brtchour .EQU SMXTmp+3
2778 0000E6 brtcday .EQU SMXTmp+4
2779 0000E7 brtcmonth .EQU SMXTmp+5
2780 0000E8 brtcyear .EQU SMXTmp+6
2781 0000E9 brtcct .EQU SMXTmp+7
2782
2783
2784 0000FC .RELATIVE
2785
2786 .ENDS
2787
2791 .LIST on
2792
2793 ; encoded addressing mode for 65C816
2794 000000 AIMPL .EQU $00 ; implied/accumulator
2795 000001 AIMM .EQU $01 ; # immediate
2796 000002 ADP .EQU $02 ; DP direct page
2797 000003 AABS .EQU $03 ; absolute
2798 000004 ALONG .EQU $04 ; absolute long
2799 000005 ALONGX .EQU $05 ; absolute long, X
2800 000006 AXIND .EQU $06 ; (DP,X)
2801 000007 AYIND .EQU $07 ; (DP),Y
2802 000008 ADPX .EQU $08 ; DP,X
2803 000009 AABSX .EQU $09 ; absolute, X
2804 00000A AABSY .EQU $0A ; absolute, Y
Tue Jul 17 11:00:24 2018 Page 5
2805 00000B ABIND .EQU $0B ; absolute indirect (abs)
2806 00000C ADPY .EQU $0C ; DP,Y
2807 00000D AREL .EQU $0D ; relative short
2808 00000E ABXI .EQU $0E ; absolute indirect, X (abs,X)
2809 00000F AIND .EQU $0F ; (DP)
2810 000010 ASTK .EQU $10 ; stack relative, S
2811 000011 ALIND .EQU $11 ; indirect long [DP]
2812 000012 AYLIND .EQU $12 ; [DP],Y
2813 000013 AYSTK .EQU $13 ; (rel,S),Y
2814 000014 AMOV .EQU $14 ; move
2815 000015 A16R .EQU $15 ; relative 16 bit
2816 000016 AJML .EQU $16 ; jml [absolute]
2817 000017 A16IMM .EQU $17 ; # immediate 16 bit
2818
2819 ; modified encoding for immediate addressing 8/16 bit
2820 000041 AXIMM .EQU ($40 + AIMM) ; X/Y immediate
2821 000081 AMIMM .EQU ($80 + AIMM) ; A/M immediate
2822
2823 ; equates from page 0 -- local temporary variables from SMXTmp area
2824 0000E2 asmpr .EQU SMXTmp ; word: printing mask
2825 0000E4 asmmode .EQU SMXTmp+2 ; byte: addessing mode
2826 0000E2 TSTR .EQU SMXTmp ; byte: 3 bytes for store mnemonic
2827 0000E2 XBUF .EQU SMXTmp ; byte: 18 bytes for store command
2828 0000E5 asmnb .EQU SMXTmp+3 ; byte: number of bytes of instruction
2829 0000E6 tmpl .EQU SMXTmp+4 ; byte: temp
2830 0000E7 tmph .EQU SMXTmp+5 ; byte: temp
2831 0000E8 asmmov .EQU SMXTmp+6 ; byte: flag move
2832 0000E8 asmbit .EQU SMXTmp+6 ; byte: flag rmb/smb/bbr/bbs
2833 0000E9 asmrel .EQU SMXTmp+7 ; byte: <7> -> relative, <6> -> rel 16
2834 0000E9 asmxop .EQU SMXTmp+7 ; byte: bit number in RMB/SMB/BBR/BBS
2835 0000EA asmstf .EQU SMXTmp+8 ; byte: rep/sep flag
2836 0000EB asmcnt .EQU SMXTmp+9 ; byte: temp. counter
2837 0000EC asmtmpL .EQU SMXTmp+10 ; byte: used for 65C02
2838 0000ED asmtmpH .EQU SMXTmp+11 ; byte: used for 65C02
2839 0000EE P0TMP .EQU SMXTmp+12 ; byte: 14 bytes for assempling mask
2840
2841 .CODEFF
2842 .LONGA off
2843 .LONGI off
2844
2845 .EXTERN PrintAddr, PrintByte, PrintWord, PrintHex, PrintHex1, GetCurCh
2846 .EXTERN TmpToAddr, GetParm, CkStop, ErrCls2, DecTmpPtrA, SubTmpAddr
2847 .EXTERN FF_Byte2Hex
2848
2849 .GLOBAL Cmd_d, Cmd_a
2850
2851 FF1CD8 test:
2852 FF1CD8 EA nop
2853 FF1CD9 EA nop
2854 ;CPU08
2855 FF1CDA A9 FF ?02: lda #$FF
2856 FF1CDC AA tax
2857 FF1CDD A8 tay
2858 FF1CDE 62 F9 FF per -($+3-?02)
2859 FF1CE1 62 10 00 per -($+3-?04)
2860 FF1CE4 62 E5 1C per ?04
2861 FF1CE7 AA ?00: tax
Tue Jul 17 11:00:24 2018 Page 6
2862 FF1CE8 A8 tay
2863 FF1CE9 9A txs
2864 FF1CEA 82 ED FF brl ?02
2865 FF1CED 82 04 00 brl ?04
2866 FF1CF0 EA nop
2867 FF1CF1 EA nop
2868 FF1CF2 EA nop
2869 FF1CF3 EA nop
2870 FF1CF4 AA ?04: tax
2871 FF1CF5 48 pha
2872 FF1CF6 68 pla
2873
2874 ;---------------------------------------------------------------------------
2875 ; disassembler
2876 ;---------------------------------------------------------------------------
2877 FF1CF7
2878 FF1CF7 Cmd_d:
2879 FF1CF7 B0 08 bcs ?01
2880 FF1CF9 20 92 18 jsr TmpToAddr
2881 FF1CFC 20 5A 01 jsr GetParm
2882 FF1CFF 90 06 bcc ?02
2883 FF1D01 A9 14 ?01: lda #$14
2884 FF1D03 85 BA sta SMTmpL
2885 FF1D05 D0 05 bne ?03
2886 FF1D07 20 9F 18 ?02: jsr SubTmpAddr
2887 FF1D0A 90 1B bcc ?20
2888 FF1D0C ?03: TXT_CR
2889 FF1D0C TXTPRCHAR
2890 .MLIST
2891 FF1D0C 02 08 cop $08
2892 .MNLIST
2893 FF1D0E 0D .DB $0D
2894 .MNLIST
2895 FF1D0F 20 80 1A jsr CkStop
2896 FF1D12 F0 12 beq ?10
2897 FF1D14 20 3B 1D jsr disx16
2898 FF1D17 A5 E5 lda asmnb
2899 FF1D19 1A inc a
2900 FF1D1A 85 E5 sta asmnb
2901 FF1D1C 20 2A 1D jsr IncPtr
2902 FF1D1F A5 E5 lda asmnb
2903 FF1D21 20 B3 18 jsr DecTmpPtrA
2904 FF1D24 B0 E6 bcs ?03
2905 FF1D26 60 ?10: rts
2906 FF1D27
2907 FF1D27 4C 34 01 ?20: jmp ErrCls2
2908
2909 FF1D2A IncPtr:
2910 FF1D2A EB xba
2911 FF1D2B A9 00 lda #0
2912 FF1D2D EB xba
2913 FF1D2E ACC16CLC
2914 FF1D2E C2 21 rep #(PMFLAG.OR.PCFLAG)
2915 .LONGA on
2916 .MNLIST
2917 FF1D30 65 B6 adc SMAddrL
2918 FF1D32 85 B6 sta SMAddrL
Tue Jul 17 11:00:24 2018 Page 7
2919 FF1D34 ACC08
2920 FF1D34 E2 20 sep #PMFLAG
2921 .LONGA off
2922 .MNLIST
2923 FF1D36 90 02 bcc ?01
2924 FF1D38 E6 B8 inc SMAddrK
2925 FF1D3A 60 ?01: rts
2926
2927 ; disassemble 65C816 code at address SMAddrL/H/K
2928 FF1D3B disx16:
2929 FF1D3B TXTPRINT
2930 FF1D3B 02 02 cop $02
2931 .MNLIST
2932 FF1D3D 2E 20 00 .DB '. ', 0
2933
2934 ; entry point for line assembler
2935 FF1D40 disx162:
2936 FF1D40 20 37 19 jsr PrintAddr ; print address SMAddrL/H/K + blank
2937 FF1D43 TXTPRCHAR ; one more blank
2938 FF1D43 02 08 cop $08
2939 .MNLIST
2940 FF1D45 20 .DB ' '
2941 FF1D46 A9 04 lda #$04 ; fetch max. 4 bytes for 65C816
2942 FF1D48 24 D9 bit asmcpu
2943 FF1D4A 10 02 bpl ?00
2944 FF1D4C A9 03 lda #$03 ; fetch max. 3 bytes for 6502/65C02
2945 FF1D4E 85 EB ?00: sta asmcnt
2946 FF1D50 A7 B6 lda [SMAddrL] ; fetch op-code
2947 FF1D52 20 48 1E jsr getindx ; translate op-code
2948 FF1D55 48 pha ; save
2949 FF1D56 A0 00 ldy #0
2950 FF1D58 A6 E5 ldx asmnb ; # bytes instruction
2951 FF1D5A E8 inx
2952 FF1D5B CA ?01: dex
2953 FF1D5C 10 08 bpl ?02 ; next byte
2954 FF1D5E TXTPRINT ; print 3 blank
2955 FF1D5E 02 02 cop $02
2956 .MNLIST
2957 FF1D60 20 20 20 00 .DB ' ', 0
2958 FF1D64 80 05 bra ?03
2959 FF1D66 B7 B6 ?02: lda [SMAddrL],y ; next byte
2960 FF1D68 20 4E 19 jsr PrintByte ; print hex + blank
2961 FF1D6B C8 ?03: iny
2962 FF1D6C C4 EB cpy asmcnt ; max. 4/3 bytes
2963 FF1D6E 90 EB bcc ?01
2964 FF1D70 68 pla ; mnemonic index
2965 FF1D71 20 F7 1F jsr printm ; print mnemonic + blank
2966 FF1D74 24 D9 bit asmcpu
2967 FF1D76 10 03 bpl ?04 ; 65C816
2968 FF1D78 4C FF 1D jmp ?50 ; 6502/65C02
2969 FF1D7B A2 09 ?04: ldx #9 ; number of bit to scan
2970 FF1D7D E0 05 ?05: cpx #5
2971 FF1D7F D0 1E bne ?08 ; don't print byte
2972 FF1D81 A4 E5 ldy asmnb
2973 FF1D83 F0 1A beq ?08 ; single byte
2974 FF1D85 B7 B6 ?06: lda [SMAddrL],y ; fetch next byte
2975 FF1D87 24 E9 bit asmrel ; test relative addressing
Tue Jul 17 11:00:24 2018 Page 8
2976 FF1D89 30 43 bmi ?20 ; yes, relative
2977 FF1D8B 20 71 19 jsr PrintHex
2978 FF1D8E 24 E8 bit asmmov
2979 FF1D90 10 0A bpl ?07
2980 FF1D92 C0 02 cpy #$02 ; mvn/mvp op-code print ',#$' after dest bank
2981 FF1D94 90 06 bcc ?07
2982 FF1D96 TXTPRINT
2983 FF1D96 02 02 cop $02
2984 .MNLIST
2985 FF1D98 2C 23 24 00 .DB ',#$', 0
2986 FF1D9C 88 ?07: dey
2987 FF1D9D D0 E6 bne ?06
2988 FF1D9F ?08: ACC16
2989 FF1D9F C2 20 rep #PMFLAG
2990 .LONGA on
2991 .MNLIST
2992 FF1DA1 06 E2 asl asmpr
2993 FF1DA3 ACC08
2994 FF1DA3 E2 20 sep #PMFLAG
2995 .LONGA off
2996 .MNLIST
2997 FF1DA5 90 0E bcc ?10
2998 FF1DA7 BF 7B 24 FF lda >PRTAB1-1,x
2999 FF1DAB TXTCHAROUT
3000 FF1DAB 02 06 cop $06
3001 .MNLIST
3002 FF1DAD BF 84 24 FF lda >PRTAB2-1,x
3003 FF1DB1 F0 02 beq ?10
3004 FF1DB3 TXTCHAROUT
3005 FF1DB3 02 06 cop $06
3006 .MNLIST
3007 FF1DB5 CA ?10: dex
3008 FF1DB6 D0 C5 bne ?05
3009 FF1DB8 24 EA bit asmstf ; rep/sep op-code ?
3010 FF1DBA 10 11 bpl ?18 ; no -- end
3011 FF1DBC A0 01 ldy #1 ; load the byte after op-code
3012 FF1DBE B7 B6 lda [SMAddrL],y
3013 FF1DC0 29 30 and #PMFLAG.OR.PXFLAG
3014 FF1DC2 F0 09 beq ?18 ; no 16 bit flags affected
3015 FF1DC4 0A asl a ; bit 7 -> A/M flag
3016 FF1DC5 0A asl a ; bit 6 -> X/Y flag
3017 FF1DC6 70 03 bvs ?12 ; rep op-code
3018 FF1DC8 14 D8 trb asmlong ; clear bit 7 and/or bit 6
3019 FF1DCA 60 rts
3020 FF1DCB 04 D8 ?12: tsb asmlong ; set bit 7 and/or bit 6
3021 FF1DCD 60 ?18: rts
3022 FF1DCE 38 ?20: sec ; for later adc (add 1 more to address)
3023 FF1DCF 70 1D bvs ?30 ; relative 16 bit
3024 FF1DD1 A6 B7 ?21: ldx SMAddrH ; relative 8 bit
3025 FF1DD3 A8 tay ; A = offset 8 bit
3026 FF1DD4 10 01 bpl ?22
3027 FF1DD6 CA dex ; previous page if offset is negative
3028 FF1DD7 65 B6 ?22: adc SMAddrL ; add offset + carry
3029 FF1DD9 90 01 bcc ?24
3030 FF1DDB E8 inx
3031 FF1DDC 1A ?24: inc a ; add one more to final address because
3032 FF1DDD D0 01 bne ?26 ; relative 8 bit is 2 bytes instruction
Tue Jul 17 11:00:24 2018 Page 9
3033 FF1DDF E8 inx
3034 FF1DE0 24 D9 ?26: bit asmcpu
3035 FF1DE2 10 18 bpl ?40 ; print address
3036 FF1DE4 24 E8 bit asmbit
3037 FF1DE6 10 14 bpl ?40 ; print address
3038 FF1DE8 1A inc a ; BBR/BBS are 3 bytes
3039 FF1DE9 D0 11 bne ?40
3040 FF1DEB E8 inx
3041 FF1DEC 80 0E bra ?40 ; print address
3042 FF1DEE 88 ?30: dey ; relative 16 bit: here Y = 2 now Y = 1
3043 FF1DEF ACC16 ; add offset 16 bit to current address
3044 FF1DEF C2 20 rep #PMFLAG
3045 .LONGA on
3046 .MNLIST
3047 FF1DF1 A5 B6 lda SMAddrL
3048 FF1DF3 77 B6 adc [SMAddrL],y
3049 FF1DF5 1A inc a ; add 2 more to final address because
3050 FF1DF6 1A inc a ; relative 16 bit is 3 bytes istruction
3051 FF1DF7 ACC08
3052 FF1DF7 E2 20 sep #PMFLAG
3053 .LONGA off
3054 .MNLIST
3055 FF1DF9 EB xba
3056 FF1DFA AA tax ; X = high address
3057 FF1DFB EB xba ; A = low address
3058 FF1DFC 4C 48 19 ?40: jmp PrintWord
3059 ?50: ; 6502/65C02
3060 FF1DFF 24 E8 bit asmbit ; test SMB/RMB/BBR/BBS
3061 FF1E01 10 17 bpl ?54 ; no
3062 FF1E03 A5 E9 lda asmxop ; #bit
3063 FF1E05 09 30 ora #'0'
3064 FF1E07 TXTCHAROUT
3065 FF1E07 02 06 cop $06
3066 .MNLIST
3067 FF1E09 A9 2C lda #','
3068 FF1E0B TXTCHAROUT
3069 FF1E0B 02 06 cop $06
3070 .MNLIST
3071 FF1E0D A5 E2 lda asmpr
3072 FF1E0F C9 9D cmp #$9D ; relative addressing mode ?
3073 FF1E11 D0 07 bne ?54 ; no
3074 FF1E13 A0 01 ldy #1 ; fetch next byte
3075 FF1E15 B7 B6 lda [SMAddrL],y
3076 FF1E17 20 67 19 jsr PrintHex1 ; stampa '$XX,'
3077 FF1E1A A2 06 ?54: ldx #6
3078 FF1E1C E0 03 ?55: cpx #3
3079 FF1E1E D0 12 bne ?58 ; no print byte
3080 FF1E20 A4 E5 ldy asmnb
3081 FF1E22 F0 0E beq ?58 ; single byte
3082 FF1E24 A5 E2 ?56: lda asmpr
3083 FF1E26 C9 E8 cmp #$E8 ; relative addressing ?
3084 FF1E28 B7 B6 lda [SMAddrL],y
3085 FF1E2A B0 A5 bcs ?21 ; print address
3086 FF1E2C 20 71 19 jsr PrintHex
3087 FF1E2F 88 dey
3088 FF1E30 D0 F2 bne ?56
3089 FF1E32 06 E2 ?58: asl asmpr
Tue Jul 17 11:00:24 2018 Page 10
3090 FF1E34 90 0E bcc ?60
3091 FF1E36 BF C4 25 FF lda PRTAB11-1,x
3092 FF1E3A TXTCHAROUT
3093 FF1E3A 02 06 cop $06
3094 .MNLIST
3095 FF1E3C BF CA 25 FF lda PRTAB21-1,x
3096 FF1E40 F0 02 beq ?60
3097 FF1E42 TXTCHAROUT
3098 FF1E42 02 06 cop $06
3099 .MNLIST
3100 FF1E44 CA ?60: dex
3101 FF1E45 D0 D5 bne ?55
3102 FF1E47 60 rts
3103
3104 ; get index mnemonic and addressing mode for op-code Y (65C816)
3105 ; return in A the index for access mnemonic table and in asmpr
3106 ; the printing mode; in asmnb the number of the bytes of the op-code
3107 FF1E48 getindx:
3108 FF1E48 A8 tay ; op-code
3109 FF1E49 24 D9 bit asmcpu
3110 FF1E4B 10 03 bpl ?02 ; 65C816
3111 FF1E4D 4C 26 1F jmp ?100 ; 6502/C02
3112 FF1E50 4A ?02: lsr a
3113 FF1E51 90 0E bcc ?08 ; even op-code (A = 00..7F)
3114 FF1E53 4A lsr a
3115 FF1E54 90 07 bcc ?04 ; op-code with final pattern '01'
3116 FF1E56
3117 ; final pattern '11' -> op-code = X3, X7, XB, XF
3118 ; all are op-code for group I instructions except op-code XB
3119 ; these are op-codes relative to accumulator new addressing
3120 ; mode in 65C816, except pattern XB that i relative to new
3121 ; istructions of 65C816 (all implied)
3122 ; these pattern are translated to 87..8F
3123 ; here value is 00XXXPPP where XXX encode istruction and
3124 ; PPP (where PPP not equal 010 and not equal 110) encode addressing
3125 ; PPP = 010 or PPP = 110 (op-code XB) mean istruction with 1 byte
3126 FF1E56 EA nop
3127 FF1E57 29 07 and #$07 ; mask PPP
3128 FF1E59 69 07 adc #$07 ; translate to 08..0F (here CF = 1)
3129 FF1E5B 80 02 bra ?06 ; value 0A and 0E are implied instructions
3130
3131 ?04: ; final pattern '01' -> op-code = X1, X5, X9, XD
3132 ; are all op-codes in group 1 instructions (relative to accumulator)
3133 ; here value is 00XXXYYY where XXX encode the instruction and YYY
3134 ; the addressing mode (the standard addressing mode of 6502 family)
3135 ; all these op-codes are translated to 80..87
3136
3137 FF1E5D 29 07 and #$07 ; mask YYY
3138 FF1E5F 09 80 ?06: ora #$80 ; translate to 80..8F
3139 FF1E61 AA ?08: tax ; index to access table AMODE
3140 FF1E62 BF EC 23 FF lda >AMODE,x ; here X = 00..8F
3141 FF1E66 85 E4 sta asmmode ; save bit 7 & 6 flag (immediate 16 bit)
3142 FF1E68 29 1F and #$1F ; mask addressing mode
3143 FF1E6A 64 E9 stz asmrel ; clear flag relative address
3144 FF1E6C 64 E8 stz asmmov ; clear flag mvn/mvp op-code
3145 FF1E6E 64 EA stz asmstf ; clear flag rep/sep op-code
3146 FF1E70 C9 0D cmp #AREL ; test relative addressing 8 bit
Tue Jul 17 11:00:24 2018 Page 11
3147 FF1E72 D0 04 bne ?10
3148 FF1E74 A2 80 ldx #$80 ; flag relative 8 bit
3149 FF1E76 80 06 bra ?12
3150 FF1E78 C9 15 ?10 cmp #A16R ; test relative addressing 16 bit
3151 FF1E7A D0 06 bne ?14
3152 FF1E7C A2 C0 ldx #$C0 ; flag relative 16 bit
3153 FF1E7E 86 E9 ?12: stx asmrel
3154 FF1E80 80 1A bra ?20
3155 FF1E82 C9 14 ?14: cmp #AMOV
3156 FF1E84 D0 06 bne ?16
3157 FF1E86 A2 80 ldx #$80
3158 FF1E88 86 E8 stx asmmov ; flag mvn/mvp op-code
3159 FF1E8A 80 10 bra ?20
3160 FF1E8C C0 C2 ?16: cpy #$C2 ; rep # op-code?
3161 FF1E8E D0 04 bne ?17
3162 FF1E90 A2 C0 ldx #$C0 ; flag rep #
3163 FF1E92 80 06 bra ?18
3164 FF1E94 C0 E2 ?17: cpy #$E2 ; sep # op-code?
3165 FF1E96 D0 04 bne ?20
3166 FF1E98 A2 80 ldx #$80 ; flag sep #
3167 FF1E9A 86 EA ?18: stx asmstf
3168 FF1E9C 0A ?20: asl a
3169 FF1E9D AA tax ; index to access printing mode table
3170 FF1E9E ACC16
3171 FF1E9E C2 20 rep #PMFLAG
3172 .LONGA on
3173 .MNLIST
3174 FF1EA0 BF 8E 24 FF lda >ENCTAB,x
3175 FF1EA4 85 E2 sta asmpr ; save printing mode
3176 FF1EA6 ACC08
3177 FF1EA6 E2 20 sep #PMFLAG
3178 .LONGA off
3179 .MNLIST
3180 FF1EA8 29 03 and #$03
3181 FF1EAA AA tax ; number of bytes
3182 FF1EAB 24 E4 bit asmmode
3183 FF1EAD 30 08 bmi ?24 ; test A/M 16 bit
3184 FF1EAF 50 0B bvc ?28 ; no #immediate 16 bit mode for X/Y
3185 FF1EB1 24 D8 bit asmlong ; test bit 6 -> X/Y 16 bit ?
3186 FF1EB3 50 07 bvc ?28 ; no -- X/Y 8 bit
3187 FF1EB5 70 04 bvs ?26 ; yes, X/Y #immdediate 16 bit
3188 FF1EB7 24 D8 ?24: bit asmlong ; test bit 7 -> A/M 16 bit ?
3189 FF1EB9 10 01 bpl ?28 ; no -- A/M 8 bit
3190 FF1EBB E8 ?26: inx ; add one more byte (#immediate 16 bit)
3191 FF1EBC 86 E5 ?28: stx asmnb ; number of bytes of instruction
3192 FF1EBE 98 tya ; A = op-code
3193 FF1EBF A2 0D ldx #OPTABLEN
3194 FF1EC1 DF D0 23 FF ?32: cmp >OPTAB,x ; translate index op-code
3195 FF1EC5 F0 05 beq ?34 ; found
3196 FF1EC7 CA dex
3197 FF1EC8 10 F7 bpl ?32 ; loop
3198 FF1ECA 30 05 bmi ?36 ; not found
3199 FF1ECC BF DE 23 FF ?34: lda >TRANSL,x
3200 FF1ED0 60 rts
3201 FF1ED1 29 8F ?36: and #$8F
3202 FF1ED3 AA tax
3203 FF1ED4 98 tya
Tue Jul 17 11:00:24 2018 Page 12
3204 FF1ED5 29 9F and #$9F
3205 FF1ED7 85 E6 sta tmpl
3206 FF1ED9 98 tya
3207 FF1EDA 29 1F and #$1F
3208 FF1EDC 85 E7 sta tmph
3209 FF1EDE 98 tya
3210 FF1EDF A0 03 ldy #$03
3211 FF1EE1 E0 8A cpx #$8A
3212 FF1EE3 F0 30 beq ?44
3213 FF1EE5 4A ?38: lsr a
3214 FF1EE6 90 2D bcc ?44
3215 FF1EE8 4A lsr a
3216 FF1EE9 90 08 bcc ?40
3217 FF1EEB E0 0B cpx #$0B
3218 FF1EED F0 2A beq ?48
3219 FF1EEF E0 8B cpx #$8B
3220 FF1EF1 F0 26 beq ?48
3221 FF1EF3 4A ?40: lsr a
3222 FF1EF4 09 20 ora #$20
3223 FF1EF6 88 dey
3224 FF1EF7 D0 FA bne ?40
3225 FF1EF9 E0 03 cpx #$03
3226 FF1EFB F0 1B beq ?46
3227 FF1EFD E0 83 cpx #$83
3228 FF1EFF F0 17 beq ?46
3229 FF1F01 A6 E7 ldx tmph
3230 FF1F03 E0 12 cpx #$12
3231 FF1F05 F0 17 beq ?50
3232 FF1F07 E0 02 cpx #$02
3233 FF1F09 F0 17 beq ?52
3234 FF1F0B A6 E6 ldx tmpl
3235 FF1F0D E0 1A cpx #$1A
3236 FF1F0F D0 03 bne ?42
3237 FF1F11 18 clc
3238 FF1F12 69 28 adc #$28
3239 FF1F14 60 ?42: rts
3240 FF1F15 88 ?44: dey
3241 FF1F16 D0 CD bne ?38
3242 FF1F18 60 ?46: rts
3243 FF1F19 4A ?48: lsr a
3244 FF1F1A 4A lsr a
3245 FF1F1B 09 40 ora #$40
3246 FF1F1D 60 rts
3247 FF1F1E 18 ?50: clc
3248 FF1F1F 69 08 adc #$08
3249 FF1F21 60 rts
3250 FF1F22 18 ?52: clc
3251 FF1F23 69 20 adc #$20
3252 FF1F25 60 rts
3253 ;; 6502/65C02
3254 FF1F26 64 E8 ?100: stz asmbit ; flag rmb/smb/bbr/bbs
3255 FF1F28 70 0D bvs ?101a ; 65C02
3256 FF1F2A A2 11 ldx #INVLEN
3257 FF1F2C DF 56 25 FF ?101c: cmp >OPTAB1,x
3258 FF1F30 F0 74 beq ?112 ; 6502 invalid op-code
3259 FF1F32 CA dex
3260 FF1F33 10 F7 bpl ?101c
Tue Jul 17 11:00:24 2018 Page 13
3261 FF1F35 80 14 bra ?103
3262 FF1F37 A2 07 ?101a: ldx #OPTAB1LEN ; translation for 65C02
3263 FF1F39 DF 56 25 FF ?101: cmp >OPTAB1,x
3264 FF1F3D D0 09 bne ?102
3265 FF1F3F 48 pha
3266 FF1F40 BF 68 25 FF lda >TRANSL1,x
3267 FF1F44 A8 tay
3268 FF1F45 68 pla
3269 FF1F46 80 03 bra ?103
3270 FF1F48 CA ?102: dex
3271 FF1F49 10 EE bpl ?101
3272 FF1F4B 4A ?103: lsr a
3273 FF1F4C 90 2B bcc ?106 ; even op-code
3274 FF1F4E 4A lsr a
3275 FF1F4F 90 37 bcc ?108 ; op-code with final '01' pattern
3276
3277 ; '11' final pattern: X3, X7, XB, XF op-code
3278 ; for 65C02 valid X7 ed XF only -- all invalid for 6502
3279 FF1F51
3280 FF1F51 24 D9 bit asmcpu
3281 FF1F53 50 51 bvc ?112 ; invalid op-code for 6502
3282 FF1F55 4A lsr a
3283 FF1F56 90 4E bcc ?112 ; invalid op-code for 65C02
3284 FF1F58
3285 ; BBRX -> 0XXX1111 => 0000XXX1
3286 ; BBSX -> 1XXX1111 => 0001XXX1
3287 ; RMBX -> 0XXX0111 => 0000XXX0
3288 ; SMBX -> 1XXX0111 => 0001XXX0
3289
3290 FF1F58 A2 00 ldx #0 ; X = 0 if RMB/SMB
3291 FF1F5A 48 pha
3292 FF1F5B 4A lsr a ; test bit 0
3293 FF1F5C 29 07 and #$07
3294 FF1F5E 85 E9 sta asmxop ; asmxop = 0..7
3295 FF1F60 68 pla
3296 FF1F61
3297 ; now C = 1 if BBR/BBS - CF = 0 if RMB/SMB
3298 FF1F61 90 01 bcc ?104
3299 FF1F63 E8 inx ; X = 1 if BBR/BBS
3300 FF1F64 08 ?104: php ; salva C
3301 FF1F65 0A asl a ; A<5> = 0 per BBR/RMB
3302 FF1F66 29 20 and #$20 ; mask bit 5
3303 FF1F68 28 plp
3304 FF1F69 90 02 bcc ?105
3305 FF1F6B 09 40 ora #$40 ; A<6> = 1 if BBR/BBS
3306 FF1F6D
3307 ; A = 000 00000 if RMB
3308 ; A = 001 00000 if SMB
3309 ; A = 010 00000 if BBR
3310 ; A = 011 00000 if BBS
3311 FF1F6D
3312 FF1F6D 09 03 ?105: ora #$03
3313 FF1F6F A8 tay ; translate code for 65C02
3314 FF1F70
3315 ; Y = 03 if RMB
3316 ; Y = 23 if SMB
3317 ; Y = 43 if BBR
Tue Jul 17 11:00:24 2018 Page 14
3318 ; Y = 63 if BBS
3319 FF1F70
3320 FF1F70 A9 80 lda #$80
3321 FF1F72 85 E8 sta asmbit ; flag rmb/smb/bbr/bbs
3322 FF1F74 8A txa
3323 FF1F75 09 88 ora #$88 ; A = 88..89
3324 FF1F77 80 1D bra ?110 ; access table
3325 FF1F79
3326 ?106: ; final pattern '10010' for 65C02 op-code as LDA(ZP)
3327 FF1F79 AA tax
3328 FF1F7A 29 0F and #$0F
3329 FF1F7C C9 09 cmp #$09
3330 FF1F7E D0 05 bne ?107
3331 FF1F80 24 D9 bit asmcpu
3332 FF1F82 50 22 bvc ?112 ; invalid 6502 opcode
3333 FF1F84 88 dey ; translate 65C02 opcode
3334 FF1F85 8A ?107: txa
3335 FF1F86 80 0E bra ?110
3336 FF1F88
3337 ?108: ; '01' final pattern all valid for 65C02 -- $89 is invalid for 6502
3338 ; after 2 lsr -> $89 = $22 -- if 6502 this is invalid
3339 ; for 65C02 this is BIT # op-code, that will be translated to $24
3340 FF1F88 C9 22 cmp #$22 ; opcode $89 ?
3341 FF1F8A D0 06 bne ?109 ; no
3342 FF1F8C 24 D9 bit asmcpu
3343 FF1F8E 50 16 bvc ?112 ; invalid 6502 opcode
3344 FF1F90 A0 24 ldy #$24 ; translate 65C02 op-code
3345
3346 ?109: ; A = 00XXXYYY where YYY encode addressing mode
3347 FF1F92 29 07 and #$07 ; mask YYY
3348 FF1F94 09 80 ora #$80 ; A = 80..87
3349
3350 ?110: ; access addressing mode table
3351 FF1F96 4A lsr a
3352 FF1F97 AA tax
3353 FF1F98 BF 70 25 FF lda >AMODE1,x
3354 FF1F9C B0 04 bcs ?111 ; odd -> low
3355 FF1F9E 4A lsr a ; even -> high
3356 FF1F9F 4A lsr a
3357 FF1FA0 4A lsr a
3358 FF1FA1 4A lsr a
3359 FF1FA2 29 0F ?111: and #$0F
3360 FF1FA4 D0 04 bne ?114 ; valid !
3361 FF1FA6 A0 E3 ?112: ldy #$E3 ; invalid opcode
3362 FF1FA8 A9 00 lda #$00
3363 FF1FAA AA ?114: tax
3364 FF1FAB BF B5 25 FF lda >ENCTAB1,x
3365 FF1FAF 85 E2 sta asmpr ; printing bits
3366 FF1FB1 29 03 and #$03
3367 FF1FB3 85 E5 sta asmnb ; # bytes
3368 FF1FB5 E0 0D cpx #$0D ; test realtive addressing
3369 FF1FB7 D0 06 bne ?115a
3370 FF1FB9 24 E8 bit asmbit
3371 FF1FBB 10 02 bpl ?115a ; no BBR/BBS/RMS/SMB
3372 FF1FBD E6 E5 inc asmnb ; BBR/BBS 3 bytes instructions
3373 FF1FBF 98 ?115a: tya
3374 FF1FC0 29 8F and #$8F
Tue Jul 17 11:00:24 2018 Page 15
3375 FF1FC2 85 E7 sta tmph
3376 FF1FC4 AA tax
3377 FF1FC5 98 tya
3378 FF1FC6 29 9F and #$9F
3379 FF1FC8 85 E6 sta tmpl
3380 FF1FCA 98 tya
3381 FF1FCB A0 03 ldy #$03
3382 FF1FCD E0 8A cpx #$8A
3383 FF1FCF F0 22 beq ?120
3384 FF1FD1 4A ?115: lsr a
3385 FF1FD2 90 1F bcc ?120
3386 FF1FD4 4A lsr a
3387 FF1FD5 4A ?116: lsr a
3388 FF1FD6 09 20 ora #$20
3389 FF1FD8 88 dey
3390 FF1FD9 D0 FA bne ?116
3391 FF1FDB A6 E7 ldx tmph
3392 FF1FDD E0 03 cpx #$03
3393 FF1FDF F0 04 beq ?117
3394 FF1FE1 E0 83 cpx #$83
3395 FF1FE3 D0 04 bne ?118
3396 FF1FE5 18 ?117: clc
3397 FF1FE6 69 0C adc #$0C
3398 FF1FE8 60 rts
3399 FF1FE9 A6 E6 ?118: ldx tmpl
3400 FF1FEB E0 1A cpx #$1A
3401 FF1FED D0 03 bne ?119
3402 FF1FEF 18 clc
3403 FF1FF0 69 10 adc #$10
3404 FF1FF2 60 ?119: rts
3405 FF1FF3 88 ?120: dey
3406 FF1FF4 D0 DB bne ?115
3407 FF1FF6 60 rts
3408
3409 ; print mnemonic of the translated op-code
3410 FF1FF7 printm:
3411 FF1FF7 AA tax
3412 FF1FF8 24 D9 bit asmcpu
3413 FF1FFA 10 0C bpl ?06 ; 65C816
3414 FF1FFC BF BE 24 FF lda >MEMTBLL1,x ; 6502/C02
3415 FF2000 85 E6 sta tmpl
3416 FF2002 BF 0A 25 FF lda >MEMTBLH1,x
3417 FF2006 80 0A bra ?08
3418 FF2008 BF 0A 23 FF ?06: lda >MEMTBLL,x
3419 FF200C 85 E6 sta tmpl
3420 FF200E BF 6D 23 FF lda >MEMTBLH,x
3421 FF2012 85 E7 ?08: sta tmph
3422 FF2014 A2 03 ldx #3
3423 FF2016 A9 00 ?10: lda #$00
3424 FF2018 A0 05 ldy #$05
3425 FF201A 06 E7 ?12: asl tmph
3426 FF201C 26 E6 rol tmpl
3427 FF201E 2A rol a
3428 FF201F 88 dey
3429 FF2020 D0 F8 bne ?12
3430 FF2022 69 3F adc #'?'
3431 FF2024 TXTCHAROUT ; print mnemonic
Tue Jul 17 11:00:24 2018 Page 16
3432 FF2024 02 06 cop $06
3433 .MNLIST
3434 FF2026 CA dex
3435 FF2027 D0 ED bne ?10
3436 FF2029 TXTPRCHAR ; print blank
3437 FF2029 02 08 cop $08
3438 .MNLIST
3439 FF202B 20 .DB ' '
3440 FF202C 60 rts
3441
3442 ;---------------------------------------------------------------------------
3443 ; assembler
3444 ;---------------------------------------------------------------------------
3445
3446 FF202D Cmd_a:
3447 FF202D B0 33 bcs ?20 ; error: missing start address
3448 FF202F 20 92 18 jsr TmpToAddr
3449 FF2032 A2 00 ?01: ldx #0
3450 FF2034 86 EF stx P0TMP+1
3451 FF2036 20 48 1A ?02: jsr GetCurCh ; next char
3452 FF2039 D0 04 bne ?03
3453 FF203B E0 00 cpx #0
3454 FF203D F0 22 beq ?19 ; empty buffer: exit
3455 FF203F C9 20 ?03: cmp #' '
3456 FF2041 F0 EF beq ?01 ; skip starting blank
3457 FF2043 20 BF 22 jsr upcase
3458 FF2046 95 E2 sta TSTR,x ; buffer mnemonic
3459 FF2048 E8 inx
3460 FF2049 E0 03 cpx #3 ; must be 3 chars.
3461 FF204B D0 E9 bne ?02
3462 FF204D CA ?04: dex ; compact mnemonic
3463 FF204E 30 15 bmi ?21
3464 FF2050 B5 E2 lda TSTR,x
3465 FF2052 38 sec
3466 FF2053 E9 3F sbc #'?'
3467 FF2055 A0 05 ldy #5
3468 FF2057 4A ?05: lsr a
3469 FF2058 66 EF ror P0TMP+1
3470 FF205A 66 EE ror P0TMP
3471 FF205C 88 dey
3472 FF205D D0 F8 bne ?05
3473 FF205F F0 EC beq ?04
3474 FF2061 60 ?19: rts
3475 FF2062 4C 34 01 ?20: jmp ErrCls2 ; error
3476 FF2065 A5 EE ?21: lda P0TMP ; test mnemonic '???'
3477 FF2067 05 EF ora P0TMP+1
3478 FF2069 F0 F7 beq ?20
3479 FF206B A2 02 ldx #2
3480 FF206D 20 48 1A ?22: jsr GetCurCh
3481 FF2070 F0 39 beq ?24
3482 FF2072 C9 20 cmp #' '
3483 FF2074 F0 F7 beq ?22 ; skip blank
3484 FF2076 20 BF 22 jsr upcase
3485 FF2079 20 CA 22 jsr chkdgt
3486 FF207C B0 26 bcs ?23 ; no hex digit
3487 FF207E 20 D8 22 jsr dgt2hex
3488
Tue Jul 17 11:00:24 2018 Page 17
3489 ; if 6502/65C02:
3490 ; for BBR/BBS: SMTmpL/SMTmpH -> absolute address
3491 ; asmtmpL -> ZP address
3492 ; asmtmpH -> # bit
3493 ; for SMB/RMB SMTmpL -> ZP address
3494 ; SMTmpH -> # bit
3495 ; others: SMTmpL -> SMTmpL/SMTmpH -> address
3496 ; if 65C816: SMTmpL/H/K -> address
3497 FF2081
3498 FF2081 24 D9 bit asmcpu
3499 FF2083 30 0C bmi ?22a
3500 FF2085 A4 BB ldy SMTmpH ; translate
3501 FF2087 84 BC sty SMTmpK
3502 FF2089 A4 BA ldy SMTmpL
3503 FF208B 84 BB sty SMTmpH
3504 FF208D 85 BA sta SMTmpL
3505 FF208F 80 0E bra ?23a
3506 FF2091 A4 EC ?22a: ldy asmtmpL ; translate values
3507 FF2093 84 ED sty asmtmpH
3508 FF2095 A4 BB ldy SMTmpH
3509 FF2097 84 EC sty asmtmpL
3510 FF2099 A4 BA ldy SMTmpL
3511 FF209B 84 BB sty SMTmpH
3512 FF209D 85 BA sta SMTmpL
3513 FF209F A9 30 ?23a: lda #'0'
3514 FF20A1 95 EE sta P0TMP,x
3515 FF20A3 E8 inx
3516 FF20A4 95 EE ?23: sta P0TMP,x
3517 FF20A6 E8 inx
3518 FF20A7 E0 0E cpx #$0E ; max. chars expected
3519 FF20A9 90 C2 bcc ?22
3520 FF20AB 86 99 ?24: stx ScnSaveX ; salva #bytes maschera input
3521 FF20AD 64 9B stz ScnTmpL ; op-code iniziale: 00
3522 FF20AF 64 9C ?25: stz ScnTmpH ; indice iniziale maschera
3523 FF20B1 A5 9B lda ScnTmpL ; op-code corrente
3524 FF20B3 20 48 1E jsr getindx ; ricava dati op-code
3525 FF20B6 A6 E2 ldx asmpr ; salva modo istruzione
3526 FF20B8 86 9A stx ScnSaveY
3527 FF20BA AA tax ; indice
3528 FF20BB 24 D9 bit asmcpu
3529 FF20BD 30 11 bmi ?25a ; cpu 8 bit
3530 FF20BF BF 6D 23 FF lda >MEMTBLH,x ; test mnemonico H
3531 FF20C3 20 C8 21 jsr ?210
3532 FF20C6 BF 0A 23 FF lda >MEMTBLL,x ; test mnemonico L
3533 FF20CA 20 C8 21 jsr ?210
3534 FF20CD 4C E1 21 jmp ?300
3535 FF20D0 BF 0A 25 FF ?25a: lda >MEMTBLH1,x ; test mnemonico H
3536 FF20D4 20 C8 21 jsr ?210
3537 FF20D7 BF BE 24 FF lda >MEMTBLL1,x ; test mnemonico L
3538 FF20DB 20 C8 21 jsr ?210
3539 FF20DE 24 E8 bit asmbit ; test SMB/RMB/BBR/BBS
3540 FF20E0 10 32 bpl ?29 ; no
3541 FF20E2 A6 E2 ldx asmpr ; modo ind.
3542 FF20E4 A5 BB lda SMTmpH ; # bit per SMB/RMB
3543 FF20E6 E0 9D cpx #$9D ; relativo ?
3544 FF20E8 D0 02 bne ?26 ; no
3545 FF20EA A5 ED lda asmtmpH ; # bit per BBR/BBS
Tue Jul 17 11:00:24 2018 Page 18
3546 FF20EC E6 9C ?26: inc ScnTmpH ; scarta primo digit della maschera
3547 FF20EE A6 9C ldx ScnTmpH
3548 FF20F0 95 EE sta P0TMP,x
3549 FF20F2 A5 C4 lda SMbndx ; # bit op code
3550 FF20F4 20 C8 21 jsr ?210 ; check # bit
3551 FF20F7 A9 2C lda #','
3552 FF20F9 20 C8 21 jsr ?210 ; check virgola
3553 FF20FC A6 E2 ldx asmpr ; modo ind.
3554 FF20FE E0 9D cpx #$9D ; relativo ?
3555 FF2100 D0 12 bne ?29 ; no
3556 FF2102 A9 24 lda #'$'
3557 FF2104 20 C8 21 jsr ?210 ; check ZP
3558 FF2107 A9 30 lda #'0'
3559 FF2109 20 C8 21 jsr ?210
3560 FF210C 20 C8 21 jsr ?210
3561 FF210F A9 2C lda #','
3562 FF2111 20 C8 21 jsr ?210 ; check virgola
3563 FF2114 A2 06 ?29: ldx #6
3564 FF2116 E0 03 ?30: cpx #3
3565 FF2118 D0 15 bne ?40
3566 FF211A A4 E5 ldy asmnb ; numero bytes
3567 FF211C F0 11 beq ?40
3568 FF211E A5 E2 ?35: lda asmpr
3569 FF2120 C9 E8 cmp #$E8
3570 FF2122 A9 30 lda #'0'
3571 FF2124 B0 22 bcs ?50
3572 FF2126 20 C8 21 jsr ?210
3573 FF2129 20 C8 21 jsr ?210
3574 FF212C 88 dey
3575 FF212D D0 EF bne ?35
3576 FF212F 06 E2 ?40: asl asmpr
3577 FF2131 90 10 bcc ?45
3578 FF2133 BF C4 25 FF lda >PRTAB11-1,x
3579 FF2137 20 C8 21 jsr ?210
3580 FF213A BF CA 25 FF lda >PRTAB21-1,x
3581 FF213E F0 03 beq ?45
3582 FF2140 20 C8 21 jsr ?210
3583 FF2143 CA ?45: dex
3584 FF2144 D0 D0 bne ?30
3585 FF2146 F0 0C beq ?55
3586 FF2148 20 C8 21 ?50: jsr ?210 ; check $XXXX
3587 FF214B 20 C8 21 jsr ?210
3588 FF214E 20 C8 21 jsr ?210
3589 FF2151 20 C8 21 jsr ?210
3590 FF2154 A5 99 ?55: lda ScnSaveX ; maschera coincide ?
3591 FF2156 C5 9C cmp ScnTmpH
3592 FF2158 D0 78 bne ?211 ; no, prova next op-code
3593 FF215A A4 E5 ?60: ldy asmnb ; numero bytes
3594 FF215C F0 51 beq ?96
3595 FF215E A5 9A lda ScnSaveY
3596 FF2160 C9 9D cmp #$9D
3597 FF2162 D0 43 bne ?90 ; no ind. relativo
3598 FF2164
3599 ; SMAddrL/H = ptr. opcode
3600 ; il salto relativo va calcolato su ptr + #bytes istruzione
3601 ; attualmente #bytes = SAddrL + 1
3602 ; indirizzo del salto relativo in SMTmpL/H
Tue Jul 17 11:00:24 2018 Page 19
3603 FF2164
3604 FF2164 A5 B6 ?60a: lda SMAddrL ; A,X = ptr opcode attuale
3605 FF2166 A6 B7 ldx SMAddrH
3606 FF2168 18 clc
3607 FF2169 65 E5 adc asmnb
3608 FF216B 90 01 bcc ?61
3609 FF216D E8 inx
3610 FF216E 1A ?61: inc a
3611 FF216F D0 01 bne ?62
3612 FF2171 E8 inx
3613 FF2172 85 E6 ?62: sta tmpl ; TmpL/H = ptr next istruzione
3614 FF2174 86 E7 stx tmph
3615 FF2176 38 sec ; calcolo offset
3616 FF2177 A5 BA lda SMTmpL
3617 FF2179 E5 E6 sbc tmpl
3618 FF217B 85 ED sta asmtmpH ; salva offset low
3619 FF217D A5 BB lda SMTmpH
3620 FF217F E5 E7 sbc tmph
3621 FF2181 90 08 bcc ?70 ; offset negativo
3622 FF2183 D0 54 bne ?215 ; errore: offset > 00FF
3623 FF2185 A6 ED ldx asmtmpH ; offset 1 byte
3624 FF2187 30 50 bmi ?215 ; errore: offset positivo max. = 7F
3625 FF2189 10 08 bpl ?80 ; offset positivo OK
3626 FF218B A8 ?70: tay ; offset negativo parte high
3627 FF218C C8 iny ; deve essere FF
3628 FF218D D0 4A bne ?215 ; errore: offset negativo fuori range
3629 FF218F A6 ED ldx asmtmpH ; offset negativo
3630 FF2191 10 46 bpl ?215 ; errore: deve essere negativo
3631 FF2193 8A ?80: txa
3632 FF2194 A4 E5 ldy asmnb ; # bytes
3633 FF2196 24 D9 bit asmcpu
3634 FF2198 10 10 bpl ?94 ; no rmb/smb/bbr/bbs for 65C816
3635 FF219A 24 E8 bit asmbit
3636 FF219C 10 0C bpl ?94 ; no BBR/BBS
3637 FF219E 97 B6 sta [SMAddrL],y ; BBR/BBS: store offset
3638 FF21A0 88 dey
3639 FF21A1 A5 EC lda asmtmpL ; BBR/BBS: store ZP
3640 FF21A3 97 B6 sta [SMAddrL],y
3641 FF21A5 80 08 bra ?96 ; store op-code
3642 FF21A7 BB ?90: tyx
3643 FF21A8 B5 B9 lda SMTmpL-1,x ; memorizza i bytes
3644 FF21AA 97 B6 ?94: sta [SMAddrL],y
3645 FF21AC 88 dey
3646 FF21AD D0 F8 bne ?90
3647 FF21AF A5 9B ?96: lda ScnTmpL ; store op-code
3648 FF21B1 87 B6 sta [SMAddrL]
3649 FF21B3 SCNPRINT
3650 FF21B3 02 01 cop $01
3651 .MNLIST
3652 FF21B5 0D 01 .DB KB_CR, SCN_CSRUP ; CR + cursore up
3653 FF21B7 61 20 1B 51 00 .DB 'a ', KB_ESC, 'Q', 0
3654 FF21BC 20 40 1D jsr disx162 ; disassembla SMAddrL/H
3655 FF21BF A5 E5 lda asmnb ; #bytes
3656 FF21C1 1A inc a ; offset next istruzione
3657 FF21C2 20 2A 1D jsr IncPtr ; update SMAddrL/H
3658
3659 ; inserisce ora nel buffer tastiera il seguente comando:
Tue Jul 17 11:00:24 2018 Page 20
3660 ; 'A YYXXXX '
3661 ; si disabilita temporaneamente auto insert nel
3662 ; caso il comando venisse dato dopo un d
3663 FF21C5
3664 FF21C5 4C 6D 22 jmp ?500
3665 FF21C8
3666 ; check maschera op-code
3667 FF21C8 DA ?210: phx
3668 FF21C9 A6 9C ldx ScnTmpH
3669 FF21CB D5 EE cmp P0TMP,x
3670 FF21CD F0 0D beq ?220
3671 FF21CF FA plx
3672 FF21D0 68 pla
3673 FF21D1 68 pla
3674 FF21D2 E6 9B ?211: inc ScnTmpL ; next op-code
3675 FF21D4 F0 03 beq ?215
3676 FF21D6 4C AF 20 jmp ?25
3677 FF21D9 4C 34 01 ?215: jmp ErrCls2
3678 FF21DC E8 ?220: inx
3679 FF21DD 86 9C stx ScnTmpH
3680 FF21DF FA plx
3681 FF21E0 60 rts
3682
3683 ;; 65C816
3684 FF21E1 A2 09 ?300: ldx #9
3685 FF21E3 E0 05 ?330: cpx #5
3686 FF21E5 D0 2A bne ?340
3687 FF21E7 A4 E5 ldy asmnb ; numero bytes
3688 FF21E9 F0 26 beq ?340
3689 FF21EB A9 30 ?335: lda #'0'
3690 FF21ED 24 E9 bit asmrel
3691 FF21EF 30 3D bmi ?350 ; check XXXX - full hex address
3692 FF21F1 20 C8 21 jsr ?210 ; check XX (a pair of hex digits)
3693 FF21F4 20 C8 21 jsr ?210
3694 FF21F7 24 E8 bit asmmov
3695 FF21F9 10 13 bpl ?337
3696 FF21FB C0 02 cpy #$02 ; mvn/mvp op-code: '#$src,#$dst' syntax
3697 FF21FD 90 0F bcc ?337
3698 FF21FF A9 2C lda #','
3699 FF2201 20 C8 21 jsr ?210 ; check virgola
3700 FF2204 A9 23 lda #'#'
3701 FF2206 20 C8 21 jsr ?210 ; check '#'
3702 FF2209 A9 24 lda #'$'
3703 FF220B 20 C8 21 jsr ?210 ; check '$'
3704 FF220E 88 ?337: dey
3705 FF220F D0 DA bne ?335
3706 FF2211 ?340: ACC16
3707 FF2211 C2 20 rep #PMFLAG
3708 .LONGA on
3709 .MNLIST
3710 FF2213 06 E2 asl asmpr
3711 FF2215 ACC08
3712 FF2215 E2 20 sep #PMFLAG
3713 .LONGA off
3714 .MNLIST
3715 FF2217 90 10 bcc ?345
3716 FF2219 BF 7B 24 FF lda >PRTAB1-1,x
Tue Jul 17 11:00:24 2018 Page 21
3717 FF221D 20 C8 21 jsr ?210
3718 FF2220 BF 84 24 FF lda >PRTAB2-1,x
3719 FF2224 F0 03 beq ?345
3720 FF2226 20 C8 21 jsr ?210
3721 FF2229 CA ?345: dex
3722 FF222A D0 B7 bne ?330
3723 FF222C F0 0C beq ?355
3724 FF222E 20 C8 21 ?350: jsr ?210 ; check $XXXX
3725 FF2231 20 C8 21 jsr ?210
3726 FF2234 20 C8 21 jsr ?210
3727 FF2237 20 C8 21 jsr ?210
3728 FF223A A5 99 ?355: lda ScnSaveX ; maschera coincide ?
3729 FF223C C5 9C cmp ScnTmpH
3730 FF223E D0 92 bne ?211 ; no, prova next op-code
3731 FF2240 A4 E5 ?360: ldy asmnb ; numero bytes
3732 FF2242 D0 03 bne ?361
3733 FF2244 4C AF 21 jmp ?96 ; store op-code
3734 FF2247 24 E9 ?361: bit asmrel
3735 FF2249 30 03 bmi ?362
3736 FF224B 4C A7 21 jmp ?90 ; store all bytes
3737 FF224E 70 03 ?362: bvs ?363
3738 FF2250 4C 64 21 jmp ?60a
3739 FF2253
3740 FF2253 ?363:
3741 ; SMAddrL/H = ptr. opcode
3742 ; il salto relativo va calcolato su ptr + #bytes istruzione
3743 ; attualmente #bytes = SAddrL + 1
3744 ; indirizzo del salto relativo in SMTmpL/H
3745
3746 FF2253 A9 00 lda #0
3747 FF2255 EB xba
3748 FF2256 A5 E5 lda asmnb
3749 FF2258 38 sec
3750 FF2259 ACC16
3751 FF2259 C2 20 rep #PMFLAG
3752 .LONGA on
3753 .MNLIST
3754 FF225B 65 B6 adc SMAddrL ; ptr opcode attuale
3755 FF225D 38 sec
3756 FF225E E5 BA sbc SMTmpL
3757 FF2260 49 FF FF eor #$FFFF
3758 FF2263 1A inc a
3759 FF2264 85 BA sta SMTmpL ; offset
3760 FF2266 ACC08
3761 FF2266 E2 20 sep #PMFLAG
3762 .LONGA off
3763 .MNLIST
3764 FF2268 A4 E5 ldy asmnb ; # bytes
3765 FF226A 4C A7 21 jmp ?90
3766
3767 FF226D A2 00 ?500: ldx #0
3768 FF226F A9 61 lda #'a'
3769 FF2271 85 E3 sta XBUF+1
3770 FF2273 64 E2 stz XBUF
3771 FF2275 A9 20 lda #' '
3772 FF2277 85 E5 sta XBUF+3
3773 FF2279 64 E4 stz XBUF+2
Tue Jul 17 11:00:24 2018 Page 22
3774 FF227B A5 B8 lda SMAddrK
3775 FF227D 20 7C 19 jsr FF_Byte2Hex
3776 FF2280 85 E7 sta XBUF+5
3777 FF2282 64 E6 stz XBUF+4
3778 FF2284 86 E9 stx XBUF+7
3779 FF2286 64 E8 stz XBUF+6
3780 FF2288 A5 B7 lda SMAddrH
3781 FF228A 20 7C 19 jsr FF_Byte2Hex
3782 FF228D 85 EB sta XBUF+9
3783 FF228F 64 EA stz XBUF+8
3784 FF2291 86 ED stx XBUF+11
3785 FF2293 64 EC stz XBUF+10
3786 FF2295 A5 B6 lda SMAddrL
3787 FF2297 20 7C 19 jsr FF_Byte2Hex
3788 FF229A 85 EF sta XBUF+13
3789 FF229C 64 EE stz XBUF+12
3790 FF229E 86 F1 stx XBUF+15
3791 FF22A0 64 F0 stz XBUF+14
3792 FF22A2 A9 20 lda #' '
3793 FF22A4 85 F3 sta XBUF+17
3794 FF22A6 64 F2 stz XBUF+16
3795 FF22A8 78 sei
3796 FF22A9 A2 12 ldx #18
3797 FF22AB 86 62 stx KbdCnt
3798 FF22AD 86 60 stx KbdITail
3799 FF22AF 64 61 stz KbdIHead
3800 FF22B1 CA dex
3801 FF22B2 B5 E2 ?501: lda XBUF,x
3802 FF22B4 95 00 sta KbdBuf,x
3803 FF22B6 CA dex
3804 FF22B7 10 F9 bpl ?501
3805 FF22B9 58 cli
3806 FF22BA A9 80 lda #$80
3807 FF22BC 14 74 trb ScnAutoIns
3808 FF22BE 60 rts
3809
3810 ; convert A to up case
3811 FF22BF upcase:
3812 FF22BF C9 61 cmp #'a'
3813 FF22C1 90 06 bcc ?01
3814 FF22C3 C9 7B cmp #('z'+1)
3815 FF22C5 B0 02 bcs ?01
3816 FF22C7 29 DF and #$DF
3817 FF22C9 60 ?01: rts
3818
3819 ; check A if hex digit
3820 FF22CA chkdgt:
3821 FF22CA C9 41 cmp #'A'
3822 FF22CC 90 03 bcc ?01
3823 FF22CE C9 47 cmp #'G'
3824 FF22D0 60 rts
3825 FF22D1 C9 30 ?01: cmp #'0'
3826 FF22D3 90 28 bcc CRTS
3827 FF22D5 C9 3A cmp #('9'+1)
3828 FF22D7 60 rts
3829
3830 ; return in A the value of the next 2 digits from input buffer
Tue Jul 17 11:00:24 2018 Page 23
3831 FF22D8 dgt2hex:
3832 FF22D8 20 FF 22 jsr dgt2nbl ; convert digit in nibble
3833 FF22DB 85 E6 sta tmpl
3834 FF22DD 20 48 1A jsr GetCurCh ; next byte
3835 FF22E0 20 BF 22 jsr upcase
3836 FF22E3 20 CA 22 jsr chkdgt ; check if digit
3837 FF22E6 90 06 bcc ?01
3838 FF22E8 C6 C4 dec SMbndx
3839 FF22EA A5 E6 lda tmpl
3840 FF22EC 18 clc
3841 FF22ED 60 rts
3842 FF22EE 48 ?01: pha
3843 FF22EF A5 E6 lda tmpl
3844 FF22F1 0A asl a
3845 FF22F2 0A asl a
3846 FF22F3 0A asl a
3847 FF22F4 0A asl a
3848 FF22F5 85 E6 sta tmpl
3849 FF22F7 68 pla
3850 FF22F8 20 FF 22 jsr dgt2nbl ; convert 2nd digt to nibble
3851 FF22FB 05 E6 ora tmpl ; concatene value
3852 FF22FD CRTS:
3853 FF22FD 38 sec
3854 FF22FE 60 rts
3855
3856 ; convert digiut in A in nibble
3857 FF22FF dgt2nbl:
3858 FF22FF C9 3A cmp #('9'+1)
3859 FF2301 08 php
3860 FF2302 29 0F and #$0F
3861 FF2304 28 plp
3862 FF2305 90 02 bcc ?01
3863 FF2307 69 08 adc #$08
3864 FF2309 60 ?01: rts
3865
3866 ;---------------------------------------------------------------------------
3867 ; tables used for 65C816
3868 ;---------------------------------------------------------------------------
3869
3870 ; table of compact mnemonic for 65C816 op-code (low byte)
3871 FF230A MEMTBLL:
3872 ;; BRK PHP BPL CLC JSR PLP BMI SEC
3873 FF230A 1C 8A 1C 23 5D .DB $1C, $8A, $1C, $23, $5D, $8B, $1B, $A1 ; 00
8B 1B A1
3874 ;; RTI PHA BVC CLI RTS PLA BVS SEI
3875 FF2312 9D 8A 1D 23 9D .DB $9D, $8A, $1D, $23, $9D, $8B, $1D, $A1 ; 08
8B 1D A1
3876 ;; BRA DEY BCC TYA LDY TAY BCS CLV
3877 FF231A 1C 29 19 AE 69 .DB $1C, $29, $19, $AE, $69, $A8, $19, $23 ; 10
A8 19 23
3878 ;; CPY INY BNE CLD CPX INX BEQ SED
3879 FF2322 24 53 1B 23 24 .DB $24, $53, $1B, $23, $24, $53, $19, $A1 ; 18
53 19 A1
3880 ;; TSB BIT JMP JMP STY LDY CPY CPX
3881 FF232A AD 1A 5B 5B A5 .DB $AD, $1A, $5B, $5B, $A5, $69, $24, $24 ; 20
69 24 24
3882 ;; TXA TXS TAX TSX DEX PHX NOP PLX
Tue Jul 17 11:00:24 2018 Page 24
3883 FF2332 AE AE A8 AD 29 .DB $AE, $AE, $A8, $AD, $29, $8A, $7C, $8B ; 28
8A 7C 8B
3884 ;; ASL ROL LSR ROR STX LDX DEC INC
3885 FF233A 15 9C 6D 9C A5 .DB $15, $9C, $6D, $9C, $A5, $69, $29, $53 ; 30
69 29 53
3886 ;; ORA AND EOR ADC STA LDA CMP SBC
3887 FF2342 84 13 34 11 A5 .DB $84, $13, $34, $11, $A5, $69, $23, $A0 ; 38
69 23 A0
3888 ;; PHD TCS PLD TSC PHK TCD RTL TDC
3889 FF234A 8A A9 8B AD 8A .DB $8A, $A9, $8B, $AD, $8A, $A9, $9D, $A9 ; 40
A9 9D A9
3890 ;; PHB TXY PLB TYX WAI STP XBA XCE
3891 FF2352 8A AE 8B AE C0 .DB $8A, $AE, $8B, $AE, $C0, $A5, $C8, $C9 ; 48
A5 C8 C9
3892 ;; COP JSL WDM PER BRL LDX REP SEP
3893 FF235A 24 5D C1 89 1C .DB $24, $5D, $C1, $89, $1C, $69, $99, $A1 ; 50
69 99 A1
3894 ;; INC DEC PHY PLY TRB STZ MVP MVN
3895 FF2362 53 29 8A 8B AC .DB $53, $29, $8A, $8B, $AC, $A5, $75, $75 ; 58
A5 75 75
3896 ;; PEI PEA JML
3897 FF236A 89 89 5B .DB $89, $89, $5B
3898
3899 ; table of compact mnemonic for 65C816 op-code (high byte)
3900 FF236D MEMTBLH:
3901 ;; BRK PHP BPL CLC JSR PLP BMI SEC
3902 FF236D D8 62 5A 48 26 .DB $D8, $62, $5A, $48, $26, $62, $94, $88 ; 00
62 94 88
3903 ;; RTI PHA BVC CLI RTS PLA BVS SEI
3904 FF2375 54 44 C8 54 68 .DB $54, $44, $C8, $54, $68, $44, $E8, $94 ; 08
44 E8 94
3905 ;; BRA DEY BCC TYA LDY TAY BCS CLV
3906 FF237D C4 B4 08 84 74 .DB $C4, $B4, $08, $84, $74, $B4, $28, $6E ; 10
B4 28 6E
3907 ;; CPY INY BNE CLD CPX INX BEQ SED
3908 FF2385 74 F4 CC 4A 72 .DB $74, $F4, $CC, $4A, $72, $F2, $A4, $8A ; 18
F2 A4 8A
3909 ;; TSB BIT JMP JMP STY LDY CPY CPX
3910 FF238D 06 AA A2 A2 74 .DB $06, $AA, $A2, $A2, $74, $74, $74, $72 ; 20
74 74 72
3911 ;; TXA TXS TAX TSX DEX PHX NOP PLX
3912 FF2395 44 68 B2 32 B2 .DB $44, $68, $B2, $32, $B2, $72, $22, $72 ; 28
72 22 72
3913 ;; ASL ROL LSR ROR STX LDX DEC INC
3914 FF239D 1A 1A 26 26 72 .DB $1A, $1A, $26, $26, $72, $72, $88, $C8 ; 30
72 88 C8
3915 ;; ORA AND EOR ADC STA LDA CMP SBC
3916 FF23A5 C4 CA 26 48 44 .DB $C4, $CA, $26, $48, $44, $44, $A2, $C8 ; 38
44 A2 C8
3917 ;; PHD TCS PLD TSC PHK TCD RTL TDC
3918 FF23AD 4A 28 4A 08 58 .DB $4A, $28, $4A, $08, $58, $0A, $5A, $48 ; 40
0A 5A 48
3919 ;; PHB TXY PLB TYX WAI STP XBA XCE
3920 FF23B5 46 74 46 B2 94 .DB $46, $74, $46, $B2, $94, $62, $C4, $0C ; 48
62 C4 0C
3921 ;; COP JSL WDM PER BRL LDX REP SEP
3922 FF23BD 22 1A 5C A6 DA .DB $22, $1A, $5C, $A6, $DA, $72, $A2, $A2 ; 50
Tue Jul 17 11:00:24 2018 Page 25
72 A2 A2
3923 ;; INC DEC PHY PLY TRB STZ MVP MVN
3924 FF23C5 C8 88 74 74 C6 .DB $C8, $88, $74, $74, $C6, $76, $E2, $DE ; 58
76 E2 DE
3925 ;; PEI PEA JML
3926 FF23CD 94 84 9A .DB $94, $84, $9A
3927
3928 ; table of op-code that will be trnslated for access mnemonics table
3929 FF23D0 OPTAB:
3930 ;; STZ STZ STZ STZ TRB TRB JML JML
3931 FF23D0 64 74 9C 9E 14 .DB $64, $74, $9C, $9E, $14, $1C, $5C, $DC
1C 5C DC
3932 ;; JSR MVP MVN PEI PEA BIT
3933 FF23D8 FC 44 54 D4 F4 .DB $FC, $44, $54, $D4, $F4, $89
89
3934 FF23DE
3935 00000D OPTABLEN .EQU ($ - OPTAB - 1)
3936
3937 ; translated index for access mnemonics table
3938 FF23DE TRANSL:
3939 FF23DE 5D 5D 5D 5D 5C .DB $5D, $5D, $5D, $5D, $5C, $5C, $62, $62
5C 62 62
3940 FF23E6 04 5E 5F 60 61 .DB $04, $5E, $5F, $60, $61, $21
21
3941
3942 ; table of addressing mode for even op-code
3943 ; this table is indexed by value 00..7F
3944 FF23EC AMODE:
3945 ;; 00..0E
3946 ;; BRK COP # TSB dp ASL dp
3947 FF23EC 00 01 02 02 .DB AIMPL, AIMM, ADP, ADP
3948 FF23F0
3949 ;; PHP ASL A TSB abs ASL abs
3950 FF23F0 00 00 03 03 .DB AIMPL, AIMPL, AABS, AABS
3951
3952 FF23F4
3953 ;; 10..1E
3954 ;; BPL ORA (dp) TRB dp ASL dp,x
3955 FF23F4 0D 0F 02 08 .DB AREL, AIND, ADP, ADPX
3956
3957 ;; CLC INC A TRB abs ASL abs,x
3958 FF23F8 00 00 03 09 .DB AIMPL, AIMPL, AABS, AABSX
3959
3960 ;; 20..2E
3961 ;; JSR abs JSL long BIT dp ROL dp
3962 FF23FC 03 04 02 02 .DB AABS, ALONG, ADP, ADP
3963 FF2400
3964 ;; PLP ROL A BIT abs ROL abs
3965 FF2400 00 00 03 03 .DB AIMPL, AIMPL, AABS, AABS
3966
3967
3968 ;; 30..3E
3969 ;; BMI AND (dp) BIT dp,x ROL dp,x
3970 FF2404 0D 0F 08 08 .DB AREL, AIND, ADPX, ADPX
3971
3972 ;; SEC DEC A BIT abs,x ROL abs,x
3973 FF2408 00 00 09 09 .DB AIMPL, AIMPL, AABSX, AABSX
Tue Jul 17 11:00:24 2018 Page 26
3974
3975
3976 ;; 40..4E
3977 ;; RTI WDM # MVP LSR dp
3978 FF240C 00 01 14 02 .DB AIMPL, AIMM, AMOV, ADP
3979
3980 ;; PHA LSR A JMP abs LSR abs
3981 FF2410 00 00 03 03 .DB AIMPL, AIMPL, AABS, AABS
3982
3983
3984 ;; 50.5E
3985 ;; BVC EOR (dp) MVN LSR dp,x
3986 FF2414 0D 0F 14 08 .DB AREL, AIND, AMOV, ADPX
3987
3988 ;; CLI PHY JML long LSR abs,x
3989 FF2418 00 00 04 09 .DB AIMPL, AIMPL, ALONG, AABSX
3990
3991
3992 ;; 60..6E
3993 ;; RTS PER rel16 STZ dp ROR dp
3994 FF241C 00 15 02 02 .DB AIMPL, A16R, ADP, ADP
3995
3996 ;; PLA ROR A JMP (abs) ROR abs
3997 FF2420 00 00 0B 03 .DB AIMPL, AIMPL, ABIND, AABS
3998
3999
4000 ;; 70..7E
4001 ;; BVS ADC (dp) STZ dp,x ROR dp,x
4002 FF2424 0D 0F 08 08 .DB AREL, AIND, ADPX, ADPX
4003
4004 ;; SEI PLY JMP (abs,x) ROR abs,x
4005 FF2428 00 00 0E 09 .DB AIMPL, AIMPL, ABXI, AABSX
4006
4007
4008 ;; 80..8E
4009 ;; BRA BRL STY dp STX dp
4010 FF242C 0D 15 02 02 .DB AREL, A16R, ADP, ADP
4011
4012 ;; DEY TXA STY abs STX abs
4013 FF2430 00 00 03 03 .DB AIMPL, AIMPL, AABS, AABS
4014
4015
4016 ;; 90..9E
4017 ;; BCC STA (dp) STY dp,x STX dp,y
4018 FF2434 0D 0F 08 0C .DB AREL, AIND, ADPX, ADPY
4019
4020 ;; TYA TXS STZ abs STZ abs,x
4021 FF2438 00 00 03 09 .DB AIMPL, AIMPL, AABS, AABSX
4022
4023
4024 ;; A0..AE
4025 ;; LDY # LDX # LDY dp LDX dp
4026 FF243C 41 41 02 02 .DB AXIMM, AXIMM, ADP, ADP
4027 FF2440
4028 ;; TAY TAX LDY abs LDX abs
4029 FF2440 00 00 03 03 .DB AIMPL, AIMPL, AABS, AABS
4030
Tue Jul 17 11:00:24 2018 Page 27
4031
4032 ;; B0..BE
4033 ;; BCS LDA (dp) LDY dp,x LDX dp,y
4034 FF2444 0D 0F 08 0C .DB AREL, AIND, ADPX, ADPY
4035
4036 ;; CLV TSX LDY abs,x LDX abs,y
4037 FF2448 00 00 09 0A .DB AIMPL, AIMPL, AABSX, AABSY
4038
4039
4040 ;; C0..CE
4041 ;; CPY # REP # CPY dp DEC dp
4042 FF244C 41 01 02 02 .DB AXIMM, AIMM, ADP, ADP
4043 FF2450
4044 ;; INY DEX CPY abs DEC abs
4045 FF2450 00 00 03 03 .DB AIMPL, AIMPL, AABS, AABS
4046 FF2454
4047 FF2454
4048 ;; D0..DE
4049 ;; BNE CMP (dp) PEI (dp) DEC dp,x
4050 FF2454 0D 0F 0F 08 .DB AREL, AIND, AIND, ADPX
4051
4052 ;; CLD PHX JML [abs] DEC abs,x
4053 FF2458 00 00 16 09 .DB AIMPL, AIMPL, AJML, AABSX
4054
4055
4056 ;; E0..EE
4057 ;; CPX # SEP # CPX dp INC dp
4058 FF245C 41 01 02 02 .DB AXIMM, AIMM, ADP, ADP
4059
4060 ;; INX NOP CPX abs INC abs
4061 FF2460 00 00 03 03 .DB AIMPL, AIMPL, AABS, AABS
4062
4063
4064 ;; F0..FE
4065 ;; BEQ SBC (dp) PEA #16 INC dp,x
4066 FF2464 0D 0F 17 08 .DB AREL, AIND, A16IMM, ADPX,
4067
4068 ;; SED PLX JSR (abs,x) INC abs,x
4069 FF2468 00 00 0E 09 .DB AIMPL, AIMPL, ABXI, AABSX
4070
4071 ; addressing mode for odd op-code -- note that all op-code <XB> are implied
4072 ; op-code <X1>, <X3>, <X5>, <X7>, <X9>, <XD>, <XF> are relative to accumulator
4073 ; this table is indexed by value 80..8F
4074 ;; X1, X5, X9, XD
4075 ;; (dp,x) dp # abs
4076 FF246C 06 02 81 03 .DB AXIND, ADP, AMIMM, AABS
4077
4078 ;; X1, X5, X9, XD
4079 ;; (dp),y dp,x abs,y abs,x
4080 FF2470 07 08 0A 09 .DB AYIND, ADPX, AABSY, AABSX
4081
4082 ;; X3, X7, XB, XF
4083 ;; rel,s [dp] implied long
4084 FF2474 10 11 00 04 .DB ASTK, ALIND, AIMPL, ALONG
4085
4086 ;; X3, X7, XB, XF
4087 ;; (rel,s),y [dp],y implied long,x
Tue Jul 17 11:00:24 2018 Page 28
4088 FF2478 13 12 00 05 .DB AYSTK, AYLIND, AIMPL, ALONGX
4089
4090
4091 ;; table for print symbols for the addressing mode
4092 FF247C PRTAB1:
4093 FF247C 2C 29 5D 2C 2C .DB ',)],,#([$'
23 28 5B 24
4094
4095 FF2485 PRTAB2:
4096 FF2485 59 00 00 53 58 .DB 'Y', 0, 0, 'SX$$$', 0
24 24 24 00
4097
4098 ;; table that encode printing symbols and number of bytes for the op-code
4099 ;; this table is indexed by a value given by table AMODE
4100 ;; last 2 bits give the numbers of bytes
4101 ;; bit <15:5> specify what must be printed (index in array PRTABx)
4102 ;; after bit 12 and bit 06 must be printed an hexadecimal value
4103 ;; <15> $ NULL
4104 ;; <14> [ $
4105 ;; <13> ( $
4106 ;; <12> # $
4107 ;; <11> , X
4108 ;; <10> , S
4109 ;; <09> ] NULL
4110 ;; <08> ) NULL
4111 ;; <07> , Y
4112 ;; <06>
4113 ;; <05>
4114 ;; <04>
4115 ;; <03>
4116 ;; <02>
4117 ;; <01:00> number of bytes (0..3)
4118 FF248E ENCTAB:
4119 FF248E 0000 0110 0180 .DW $0000, $1001, $8001, $8002, $8003, $8803, $2901, $2181
0280 0380 0388
0129 8121
4120 FF249E 0188 0288 8280 .DW $8801, $8802, $8082, $2102, $8081, $8001, $2902, $2101
0221 8180 0180
0229 0121
4121 FF24AE 0184 0142 8142 .DW $8401, $4201, $4281, $2581, $1002, $8002, $4202, $1002
8125 0210 0280
0242 0210
4122
4123 ;---------------------------------------------------------------------------
4124 ; tables used for 6502/65C02
4125 ;---------------------------------------------------------------------------
4126
4127 ; compact mnemonics for 6502/65C02
4128 FF24BE MEMTBLL1:
4129 FF24BE 1C 8A 1C 23 5D .DB $1C, $8A, $1C, $23, $5D, $8B, $1B, $A1
8B 1B A1
4130 FF24C6 9D 8A 1D 23 9D .DB $9D, $8A, $1D, $23, $9D, $8B, $1D, $A1
8B 1D A1
4131 FF24CE 1C 29 19 AE 69 .DB $1C, $29, $19, $AE, $69, $A8, $19, $23
A8 19 23
4132 FF24D6 24 53 1B 23 24 .DB $24, $53, $1B, $23, $24, $53, $19, $A1
53 19 A1
Tue Jul 17 11:00:24 2018 Page 29
4133 FF24DE 00 1A 5B 5B A5 .DB $00, $1A, $5B, $5B, $A5, $69, $24, $24
69 24 24
4134 FF24E6 AE AE A8 AD 29 .DB $AE, $AE, $A8, $AD, $29, $8A, $7C, $8B
8A 7C 8B
4135 FF24EE 15 9C 6D 9C A5 .DB $15, $9C, $6D, $9C, $A5, $69, $29, $53
69 29 53
4136 FF24F6 84 13 34 11 A5 .DB $84, $13, $34, $11, $A5, $69, $23, $A0
69 23 A0
4137 FF24FE 53 29 8A 8B 9B .DB $53, $29, $8A, $8B, $9B, $A3, $18, $18
A3 18 18
4138 FF2506 A5 AD AC 00 .DB $A5, $AD, $AC, $00
4139 FF250A
4140 FF250A MEMTBLH1:
4141 FF250A D8 62 5A 48 26 .DB $D8, $62, $5A, $48, $26, $62, $94, $88
62 94 88
4142 FF2512 54 44 C8 54 68 .DB $54, $44, $C8, $54, $68, $44, $E8, $94
44 E8 94
4143 FF251A C4 B4 08 84 74 .DB $C4, $B4, $08, $84, $74, $B4, $28, $6E
B4 28 6E
4144 FF2522 74 F4 CC 4A 72 .DB $74, $F4, $CC, $4A, $72, $F2, $A4, $8A
F2 A4 8A
4145 FF252A 00 AA A2 A2 74 .DB $00, $AA, $A2, $A2, $74, $74, $74, $72
74 74 72
4146 FF2532 44 68 B2 32 B2 .DB $44, $68, $B2, $32, $B2, $72, $22, $72
72 22 72
4147 FF253A 1A 1A 26 26 72 .DB $1A, $1A, $26, $26, $72, $72, $88, $C8
72 88 C8
4148 FF2542 C4 CA 26 48 44 .DB $C4, $CA, $26, $48, $44, $44, $A2, $C8
44 A2 C8
4149 FF254A C8 88 74 74 86 .DB $C8, $88, $74, $74, $86, $86, $E6, $E8
86 E6 E8
4150 FF2552 76 06 C6 00 .DB $76, $06, $C6, $00
4151
4152 ; 6502 invalid opcode
4153 FF2556 OPTAB1:
4154 FF2556 64 74 9C 9E 04 .DB $64, $74, $9C, $9E, $04, $0C, $14, $1C
0C 14 1C
4155 FF255E
4156 000007 OPTAB1LEN .EQU ($ - OPTAB1 - 1)
4157
4158 FF255E 80 34 1A 3A 5A .DB $80, $34, $1A, $3A, $5A, $7A, $DA, $FA, $3C, $7C
7A DA FA 3C 7C
4159
4160 000011 INVLEN .EQU ($ - OPTAB1 - 1)
4161
4162 ; translation table for some 65C02 op-code
4163 FF2568 TRANSL1:
4164 FF2568 83 83 83 83 A3 .DB $83, $83, $83, $83, $A3, $A3, $C3, $C3
A3 C3 C3
4165
4166 ; encoded addressing mode
4167 ;
4168 ; 0: invalid
4169 ; 1: #
4170 ; 2: ZP (tesrt asmbit)
4171 ; 3: ABS
4172 ; 4: IMPLIED
Tue Jul 17 11:00:24 2018 Page 30
4173 ; 5: ACCUM
4174 ; 6: (ZP,X)
4175 ; 7: (ZP),Y
4176 ; 8: ZP,X
4177 ; 9: ABS,X
4178 ; A: ABS,Y
4179 ; B: (ABS)
4180 ; C: ZP,Y
4181 ; D: REL (test asmbit)
4182 ; E: (ABS,X)
4183 ; F: (ZP)
4184
4185 ; 6502/65C02 addressing mode table
4186 FF2570 AMODE1:
4187 ; even op-code
4188 FF2570 40 22 45 33 DF .DB $40, $22, $45, $33, $DF, $28, $45, $39 ; 00..07 - OP 00..1E
28 45 39
4189 FF2578 30 22 45 33 DF .DB $30, $22, $45, $33, $DF, $88, $45, $99 ; 08..0F - OP 20..3E
88 45 99
4190 FF2580 40 02 45 33 DF .DB $40, $02, $45, $33, $DF, $08, $44, $09 ; 10..17 - OP 40..5E
08 44 09
4191 FF2588 40 22 45 B3 DF .DB $40, $22, $45, $B3, $DF, $88, $44, $E9 ; 18..1F - OP 60..7E
88 44 E9
4192 FF2590 D0 22 44 33 DF .DB $D0, $22, $44, $33, $DF, $8C, $44, $39 ; 20..27 - OP 80..9E
8C 44 39
4193 FF2598 11 22 44 33 DF .DB $11, $22, $44, $33, $DF, $8C, $44, $9A ; 28..2F - OP A0..BE
8C 44 9A
4194 FF25A0 10 22 44 33 DF .DB $10, $22, $44, $33, $DF, $08, $44, $09 ; 30..37 - OP C0..DE
08 44 09
4195 FF25A8 10 22 44 33 DF .DB $10, $22, $44, $33, $DF, $08, $44, $09 ; 38..3F - OP E0..FE
08 44 09
4196 FF25B0
4197 ; odd op-code
4198 FF25B0 62 13 78 A9 .DB $62, $13, $78, $A9 ; 80..87
4199 FF25B4
4200 FF25B4 2D .DB $2D ; 88..89 - RMB/BBR
4201
4202 FF25B5 ENCTAB1:
4203 FF25B5 00 21 81 82 00 .DB $00, $21, $81, $82, $00, $00, $59, $4D
00 59 4D
4204 FF25BD 91 92 86 4A 85 .DB $91, $92, $86, $4A, $85, $9D, $5A, $49
9D 5A 49
4205
4206 ;; table for print symbols for the 6502/65C02 addressing mode
4207 FF25C5 PRTAB11:
4208 FF25C5 2C 29 2C 23 28 .DB ',),#($'
24
4209 FF25CB PRTAB21:
4210 FF25CB 59 00 58 24 24 .DB 'Y', 0, 'X$$', 0
00
Lines Assembled : 4132 Errors : 0