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  Tue Jul 17 11:00:18 2018                                                                                               Page    1







          2500 A.D. 65816 Macro Assembler #26960 - Version 5.02g
          -----------------------------------------------------

                       Input  Filename : src\F8\sp2.asm
                       Output Filename : obj\F8\sp2.obj
                       Listing Has Been Relocated                               


 2605                           .LIST           on
 2606                           
 2607  F8FFB1                           .INCLUDE inc\dirp00.inc
 2608                           ;----------------------------------------------------------
 2609                           ; DIRP00.ASM
 2610                           ; PROGETTO: B1601
 2611                           ;
 2612                           ; Variabili in Direct Page $00
 2613                           ;----------------------------------------------------------
 2614                           
 2615                           ; sezione COMMON -- questo permette di includere il file in piu' file
 2616                           
 2617                           .LIST on
 2618                           
 2619                           DIRP00: .SECTION page0, ref_only, common        ;Direct-Page 00
 2620                           
 2621  000000                           .ABSOLUTE               ;; inizia sempre da $00
 2622  000000                           .ORG            0x00
 2623  000000                           
 2624  000000  0000             JiffyClk        .DW                     ; contatore 10ms 32 bit
 2625  000002  0000                             .DW
 2626  000004                   SysTmr          .DS     SYSTMRCNT       ; system timer 0 (10ms)
 2627  000008                   SysTMF          .DS     SYSTMRCNT       ; flag timer (80 -> start)
 2628  00000C  00               Bnk0Flag        .DB                     ; <7>: flag test RAM banco 0 ok
 2629                                                                   ; <6>: flag warm reset
 2630  00000D  00               RTCFlag         .DB
 2631                           
 2632  00000E                   diskstat        .DS     2       ; flag device on ata bus #0 & #1
 2633                                                           ; <7>: device ready
 2634                                                           ; <6>: compact flash device (C.F.)
 2635                                                           ; <5>: device identification ok
 2636                                                           ; <4>: MBR loaded
 2637                                                           ; <3>: valid signature in MBR
 2638                                                           ; <2>: first partition found&active
 2639                                                           ; <1>:
 2640                                                           ; <0>: valid partition flag
 2641                           
 2642                                                           ; <7>: device ready
 2643                                                           ; <6>: USB device
 2644                                                           ; <5>: compact flash device (C.F.)
 2645                                                           ; <4>: device identification ok
 2646                                                           ; <3>: MBR loaded
 2647                                                           ; <2>: first partition found&active
 2648                                                           ; <1>: always 1
 2649                                                           ; <0>: valid partition flag
 2650  000010                                                   
  Tue Jul 17 11:00:18 2018                                                                                               Page    2




 2651                           
 2652          00000E           atadev          .EQU    diskstat
 2653                           
 2654  000010                   usbdev          .DS     2       ; flag flash disk on usb bus #0
 2655                                                           ; <7>: device plugged and ready
 2656                                                           ; <6>: always 1 
 2657                                                           ; <5>: device identification ok
 2658                                                           ; <4>: MBR loaded
 2659                                                           ; <3>: valid signature in MBR
 2660                                                           ; <2>: first partition found&active
 2661                                                           ; <1>:
 2662                                                           ; <0>: valid partition flag
 2663                           
 2664  000012                   diskmax         .DS     16      ; disk max. sector's
 2665          000012           atasec          .EQU    diskmax
 2666          00001A           usbsec          .EQU    diskmax+8
 2667                           
 2668                           
 2669  000022                   atambr          .DS     8       ; data for first partition found in mbr
 2670                                                           ; first 3 bytes for start sector of partition
 2671                                                           ; last byte for partition type
 2672  00002A                   usbmbr          .DS     8
 2673                           
 2674  000032                   ataprt          .DS     8       ; total sec's of first partition
 2675  00003A                   usbprt          .DS     8       ; total sec's of first partition
 2676                           
 2677                           
 2678  000042  00               usb0ch          .DB     ; usb0 (ch375/ch376) flag
 2679                                                   ; <7>: module on
 2680                                                   ; <6>: ch376 flag
 2681                                                   ; <5:0>: chip version
 2682                           
 2683  000043  00               usb0st          .DB     ; usb0 status
 2684                                                   ; <7>: usb0 host mode ok
 2685                                                   ; <6>: flash disk attached flag
 2686                                                   ; <5>: usb device attached
 2687                           
 2688  000044  00               fdcdrv          .DB             ; phisycal drive status (drive #0)
 2689                                                           ; <7>: disk format established in bit 0&1 
 2690                                                           ; <6>: double step seek done
 2691                                                           ; <5>: trust format bit's (set after ok r/w)
 2692                                                           ; <4>: write protect bit (if disk in drive)
 2693                                                           ; <3>: don't care
 2694                                                           ; <2>: don't care                               
 2695                                                           ; <1>: HD disk if set else DD disk
 2696                                                           ; <0>: CBM format if set else IBM format
 2697                           
 2698  000045  00               vdrive          .DB             ; virtual drive status (ram disk, drive #1)
 2699                                                           ; <7>: disk format established in bit 0&1 
 2700                                                           ; <6>: change disk simulation (after format)
 2701                                                           ; <5>: don't care
 2702                                                           ; <4>: write protect bit (under sw control)
 2703                                                           ; <3>: don't care
 2704                                                           ; <2>: don't care                               
 2705                                                           ; <1>: HD disk if set else DD disk
 2706                                                           ; <0>: CBM format if set else IBM format
 2707                           
  Tue Jul 17 11:00:18 2018                                                                                               Page    3




 2708  000046  00               fdcctl          .DB             ; fdc controller status
 2709                                                           ; <7>: drive is attached
 2710                                                           ; <6>: drive need recalibration (restore)
 2711                                                           ; <5>: FDC controller ok
 2712                                                           ; <4>: motor on
 2713                                                           ; <3>: dma is active
 2714                                                           ; <2>: dma chip ok (post routine)
 2715                                                           ; <1>: clock rate (1=HD,0=DD)
 2716                                                           ; <0>: disk ready
 2717                           
 2718  000047  00               fdctrk          .DB             ; fd: current seek track
 2719  000048  00               fdcerr          .DB             ; fd: last error code
 2720  000049  00               ataerr          .DB             ; ata: last error code
 2721  00004A  00               ataxer          .DB             ; ata: last extended error code
 2722                           
 2723  00004B  00               CtrlBrk         .DB             ; flag CTRL+BREAK (NMI)
 2724                           
 2725  00004C  0000             MemTop          .DW             ; top memoria RAM
 2726  00004E  00                               .DB             ; banco top mem
 2727                           
 2728  00004F  00               DflTxtIn        .DB             ; device di default text input 
 2729  000050  00               DflTxtOut       .DB             ; device di default text output
 2730                           
 2731  000051                   COPPtr          LP              ; long pointer for COP decoding
 2732  000054  00               COPIdx          .DB             ; COP signature/index
 2733                           
 2734  000055  00               BiosEnt         .DB             ; flag accesso a bios setup
 2735                           
 2736                           ; variabili utilizzate da ACIA
 2737  000056                   spwrk           .DS     $30
 2738                           
 2739                           ; bios mem
 2740  000086  0000             nsize           .DW     ; dimensione blocco da allocare
 2741                           ;bsize          .DW     ; dimensione vera blocco free
 2742  000088  0000             splitsz         .DW     ; dimensione blocco splittato
 2743  00008A  0000             bfree           .DW     ; puntatore blocco free
 2744  00008C  0000             hdrptr          .DW     ; puntatore header heap
 2745                           
 2746  00008E  0000             pbrklv          .DW     ; current break level of current process
 2747  000090  0000             pbrkmin         .DW     ; minimum breal level of current process
 2748  000092  0000             pbrkmax         .DW     ; maximum breal level of current process
 2749  000094                           
 2750                           ; bios temp. work area
 2751  000094                   bwrktmp         .DS     $28
 2752                           
 2753  0000BC  00               coptmp          .DB     ; temp. used while cop
 2754                           
 2755  0000BD  00               tstser          .DB     ; check ser/usb test board post
 2756                                                   ; <7>: VIA2 ok
 2757                                                   ; <6>: PICRAM ok
 2758                                                   ; <1>: UART 16C550 ok
 2759                                                   ; <0>: R65C51 ok
 2760                           
 2761                           
 2762                           ;crc16          .DW
 2763                           
 2764  0000BD                           .RELATIVE
  Tue Jul 17 11:00:18 2018                                                                                               Page    4




 2765                           
 2766                                   .ENDS
 2767                           
 2768          [01]             .IFDEF          _ACIA_INC_
 2769                                   .INCLUDE INC\SP.INC
 2770          [00]             .ENDIF
 2771                           
 2795                           .LIST on
 2796                           
 2797          05C000           SOBUFADDR3      .EQU    SPOUTBUFF3
 2798          05D000           SIBUFADDR3      .EQU    SPINBUFF3
 2799          001000           SOBUFSIZ3       .EQU    $1000
 2800          001000           SIBUFSIZ3       .EQU    $1000
 2801                           
 2802          060000           SOBUFADDR4      .EQU    SPOUTBUFF4
 2803          068000           SIBUFADDR4      .EQU    SPINBUFF4
 2804                           ;SOBUFSIZ4      .EQU    $1000
 2805                           ;SIBUFSIZ4      .EQU    $1000
 2806          008000           SOBUFSIZ4       .EQU    $8000
 2807          008000           SIBUFSIZ4       .EQU    $8000
 2808                           
 2809          000200           NGUARD31        .EQU    $0200   ; numero bytes di guardia buffer RX XON/XOFF
 2810          000100           NGUARD32        .EQU    $0100   ; numero bytes di guardia buffer RX handshake
 2811          000800           NFREE31         .EQU    $0800   ; minimo posto in coda RX per cancellare pausa remota
 2812          000400           NFREE32         .EQU    $0400
 2813                           
 2814                           ;---------------------------------------------------------------------------
 2815                           ; direct page var's for test serial ports/usb handling 
 2816                           ;---------------------------------------------------------------------------
 2817                           
 2818                           DPSP2:  .SECTION page0, common, ref_only        ;UART D.P.
 2819                           
 2820  000000  00               usbslv          .DB     ; <7>: plugged-in, <6>: plug-in pending 
 2821  000001  00               usbum           .DB     ; <7>: pending message, <6>: connected  
 2822  000002  00               usbcnt1         .DB     ; timeout UM245 plug-in detection
 2823  000003                   usbbuf          .DS     8       
 2824  00000B  00               usbtim          .DB
 2825  00000C  00               usbcnt          .DB
 2826  00000D  00               usbmst          .DB
 2827  00000E  0000             usbsiz          .DW
 2828  000010                   usbptr          LP
 2829  000013  00               usbtmp          .DB
 2830  000014  00               usbcmp          .DB
 2831                           
 2832                           ; serial port 65C51
 2833  000015  00               spmode3         .DB     ; <7>: 0=no handshake, 1=handshake
 2834                                                   ; <6>: 0=software/1=hardware handshake
 2835                                                   ; <5>: not used
 2836                                                   ; <4>: not used
 2837                                                   ; <3>: 0=odd parity, 1=even parity
 2838                                                   ; <2>: 0=no parity, 1=parity as specified
 2839                                                   ;      by bit <3>
 2840                                                   ; <1:0> : baud rate
 2841                                                   ;       00 =  19200
 2842                                                   ;       01 =  38400
 2843                                                   ;       10 =  57600
 2844                                                   ;       11 = 115200
  Tue Jul 17 11:00:18 2018                                                                                               Page    5




 2845  000016                                           
 2846  000016  00               splin3          .DB     ; <7>: /CTS line level
 2847                                                   ; <6>: /DSR line status
 2848  000017                                           
 2849  000017  00               sppause3        .DB
 2850  000018  00               spout3          .DB
 2851  000019  00               spstat3         .DB     ; staus
 2852                                                   ; <7>: rx error (data discarded)
 2853                                                   ; <6>: rx buffer overflow
 2854                                                   ; <5>: remote disconnession (/DSR line = 1)
 2855                                                   ; <4>: output buffer overflow
 2856                                                   ; <3>: not used
 2857                                                   ; <2>: framing error
 2858                                                   ; <1>: parity error
 2859                                                   ; <0>: overrun error
 2860                           
 2861  00001A  00               sptmp3          .DB
 2862                           
 2863  00001B  0000             ibuftail3       .DW
 2864  00001D  0000             ibufhead3       .DW
 2865  00001F  0000             obuftail3       .DW
 2866  000021  0000             obufhead3       .DW
 2867  000023  0000             ibufcnt3        .DW
 2868  000025  0000             obufcnt3        .DW
 2869  000027  0000             icntmin3        .DW
 2870  000029  0000             icntmax3        .DW
 2871                           
 2872                           ; serial port 16C550
 2873  00002B  00               spmode4         .DB     ; <7>: 0=no handshake, 1=handshake
 2874                                                   ; <6>: 0=software/1=hardware handshake
 2875                                                   ; <5>: not used
 2876                                                   ; <4>: not used
 2877                                                   ; <3>: 0=odd parity, 1=even parity
 2878                                                   ; <2>: 0=no parity, 1=parity as specified
 2879                                                   ;      by bit <3>
 2880                                                   ; <1:0> : baud rate
 2881                                                   ;       00 =  19200
 2882                                                   ;       01 =  38400
 2883                                                   ;       10 =  57600
 2884                                                   ;       11 = 115200
 2885  00002C                                           
 2886  00002C  00               splin4          .DB     ; <7>: /DSR line level
 2887                                                   ; <6>: /CTS line status
 2888  00002D                                           
 2889  00002D  00               sppause4        .DB
 2890  00002E  00               spout4          .DB
 2891  00002F  00               spstat4         .DB     ; staus
 2892                                                   ; <7>: rx error (data discarded)
 2893                                                   ; <6>: rx buffer overflow
 2894                                                   ; <5>: remote disconnession (/DSR line = 1)
 2895                                                   ; <4>: output buffer overflow
 2896                                                   ; <3>: break
 2897                                                   ; <2>: framing error
 2898                                                   ; <1>: parity error
 2899                                                   ; <0>: overrun error
 2900                           
 2901  000030  00               sptmp4          .DB
  Tue Jul 17 11:00:18 2018                                                                                               Page    6




 2902                           
 2903  000031  0000             ibuftail4       .DW
 2904  000033  0000             ibufhead4       .DW
 2905  000035  0000             obuftail4       .DW
 2906  000037  0000             obufhead4       .DW
 2907  000039  0000             ibufcnt4        .DW
 2908  00003B  0000             obufcnt4        .DW
 2909  00003D  0000             icntmin4        .DW
 2910  00003F  0000             icntmax4        .DW
 2911                           
 2912  000041  00               spcnt4          .DB
 2913  000042  00               uartlsr         .DB
 2914  000043  00               uartiir         .DB
 2915                           
 2916  000044                   usb0name        .DS     36
 2917                           
 2918                                   .ENDS
 2919                           
 2923                           .LIST   on
 2924                           
 2925                                   .CODEF8
 2926  F80ABC                           
 2927                                   .LONGA  off
 2928                                   .LONGI  off
 2929                           
 2930                           ; set serial port #2 - 65C51
 2931                           ; A=mode
 2932  F80ABC                   spset2:
 2933  F80ABC  78                       sei                     ; disable interrupt
 2934  F80ABD  0B                       phd
 2935  F80ABE  F4 00 05                 pea     #DP05ADDR
 2936  F80AC1  2B                       pld
 2937  F80AC2  85 15                    sta     spmode3         ; save mode
 2938  F80AC4  AA                       tax
 2939  F80AC5  8D 29 FC                 sta     !ACIASR         ; software reset
 2940  F80AC8  A9 02                    lda     #ACIACMDOFF     ; disable all
 2941  F80ACA  8D 2A FC                 sta     !ACIACMD
 2942  F80ACD  AD 28 FC                 lda     !ACIADR         ; clear flags
 2943  F80AD0  AD 29 FC                 lda     !ACIASR
 2944  F80AD3  29 40                    and     #01000000B      ; get /DSR status
 2945  F80AD5  F0 04                    beq     ?dsrl
 2946  F80AD7  04 16                    tsb     splin3          ; /DSR high
 2947  F80AD9  80 04                    bra     ?cts
 2948  F80ADB  A9 40            ?dsrl:  lda     #01000000B
 2949  F80ADD  14 16                    trb     splin3          ; /DSR low
 2950  F80ADF  A0 80            ?cts:   ldy     #$80
 2951  F80AE1  A9 08                    lda     #00001000B      ; check /CTS line level: PA<3>
 2952  F80AE3  2C 1F FC                 bit     !VIA2+VIAPRANH
 2953  F80AE6  F0 05                    beq     ?ctsl           ; /CTS is low
 2954  F80AE8  98                       tya
 2955  F80AE9  04 16                    tsb     splin3          ; /CTS is high
 2956  F80AEB  80 03                    bra     ?br
 2957  F80AED  98               ?ctsl:  tya
 2958  F80AEE  14 16                    trb     splin3          ; /CTS is low
 2959  F80AF0  8A               ?br:    txa                     ; <1:0> = baud rate select
 2960  F80AF1  29 03                    and     #00000011B
 2961  F80AF3  85 1A                    sta     sptmp3
  Tue Jul 17 11:00:18 2018                                                                                               Page    7




 2962  F80AF5  AD 1F FC                 lda     !VIA2+VIAPRANH
 2963  F80AF8  29 F8                    and     #11111000B      ; /RTS low
 2964  F80AFA  05 1A                    ora     sptmp3
 2965  F80AFC  8D 1F FC                 sta     !VIA2+VIAPRANH  
 2966  F80AFF  A9 10                    lda     #00010000B      ; 8 bits, 1 stop bit, divisor = 1/16
 2967  F80B01  8D 2B FC                 sta     !ACIACTRL       
 2968  F80B04  8A                       txa                     ; mode
 2969  F80B05  29 0C                    and     #00001100B      ; mask on bits 3 & 2 (parity mode)
 2970  F80B07  0A                       asl     a               ; shift <3:2> to <6:5>
 2971  F80B08  0A                       asl     a
 2972  F80B09  0A                       asl     a
 2973  F80B0A  09 05                    ora     #00000101B      ; enable all int., /DTR=low
 2974  F80B0C  85 1A                    sta     sptmp3          ; byte for command register
 2975  F80B0E  64 17                    stz     sppause3        ; init work area
 2976  F80B10  64 18                    stz     spout3
 2977  F80B12  64 19                    stz     spstat3
 2978  F80B14  24 15                    bit     spmode3
 2979  F80B16                           CPU16                   ; init buffer's pointer's
 2980  F80B16  C2 30                    rep     #(PMFLAG.OR.PXFLAG)
 2981                                   .LONGA  on
 2982                                   .LONGI  on
 2983                                   .MNLIST
 2984  F80B18  70 08                    bvs     ?hw             ; hardware handshake
 2985  F80B1A  A9 00 02                 lda     #NGUARD31
 2986  F80B1D  A0 00 08                 ldy     #NFREE31
 2987  F80B20  80 06                    bra     ?do
 2988  F80B22  A9 00 01         ?hw:    lda     #NGUARD32
 2989  F80B25  A0 00 04                 ldy     #NFREE32
 2990  F80B28  85 29            ?do:    sta     icntmax3
 2991  F80B2A  84 27                    sty     icntmin3
 2992  F80B2C  38                       sec
 2993  F80B2D  A9 00 10                 lda     #SIBUFSIZ3
 2994  F80B30  E5 29                    sbc     icntmax3
 2995  F80B32  85 29                    sta     icntmax3
 2996  F80B34  64 1B                    stz     ibuftail3
 2997  F80B36  64 1D                    stz     ibufhead3
 2998  F80B38  64 23                    stz     ibufcnt3
 2999  F80B3A  64 1F                    stz     obuftail3
 3000  F80B3C  64 21                    stz     obufhead3
 3001  F80B3E  64 25                    stz     obufcnt3
 3002  F80B40                           CPU08
 3003  F80B40  E2 30                    sep     #(PMFLAG.OR.PXFLAG)
 3004                                   .LONGA  off
 3005                                   .LONGI  off
 3006                                   .MNLIST
 3007  F80B42  24 15                    bit     spmode3
 3008  F80B44  10 06                    bpl     ?ok             ; no handshake
 3009  F80B46  50 04                    bvc     ?ok             ; software handshake
 3010  F80B48  24 16                    bit     splin3          ; check /DSR line
 3011  F80B4A  50 00                    bvc     ?ok             ; remote terminal is connected
 3012                                   ;lda    #$20
 3013                                   ;tsb    spstat3         ; remote terminal not connected now
 3014  F80B4C  AD 28 FC         ?ok:    lda     .ABS.ACIADR     ; discard any pending received data
 3015  F80B4F  AD 29 FC                 lda     .ABS.ACIASR     ; read current interrupt status
 3016  F80B52  A5 1A                    lda     sptmp3          ; enable interrupts
 3017  F80B54  8D 2A FC                 sta     .ABS.ACIACMD
 3018  F80B57  2B                       pld
  Tue Jul 17 11:00:18 2018                                                                                               Page    8




 3019  F80B58  58                       cli
 3020  F80B59  60                       rts
 3021                           
 3022                           ; reset serial port #2 - 65C51
 3023  F80B5A                   spres2:
 3024  F80B5A  8D 29 FC                 sta     !ACIASR         ; software reset
 3025  F80B5D  A9 02                    lda     #ACIACMDOFF     ; disable all
 3026  F80B5F  8D 2A FC                 sta     !ACIACMD
 3027  F80B62  AD 28 FC                 lda     !ACIADR         ; clear flags
 3028  F80B65  AD 29 FC                 lda     !ACIASR
 3029  F80B68  60                       rts
 3030  F80B69                           
 3031                           ; send A to serial port 65C51
 3032  F80B69                   spput2:
 3033  F80B69  78                       sei                     ; disable interrupt
 3034  F80B6A  0B                       phd
 3035  F80B6B  F4 00 05                 pea     #DP05ADDR
 3036  F80B6E  2B                       pld
 3037  F80B6F  86 1A                    stx     sptmp3          ; save X reg. 
 3038  F80B71  A0 00                    ldy     #0              ; Y = 0
 3039  F80B73                           INDEX16
 3040  F80B73  C2 10                    rep     #PXFLAG
 3041                                   .LONGI  on
 3042                                   .MNLIST
 3043  F80B75  A6 25                    ldx     obufcnt3
 3044  F80B77  E0 00 10                 cpx     #SOBUFSIZ3      ; output buffer is full?
 3045  F80B7A  90 07                    bcc     ?str            ; no, store byte
 3046  F80B7C  24 16                    bit     splin3
 3047  F80B7E  50 2D                    bvc     ?done           ; exit with CF=1, Y=0: output buffer is full
 3048  F80B80  88                       dey
 3049  F80B81  80 2A                    bra     ?done           ; exit with CF=1, Y=$FF: remote terminal off
 3050  F80B83  E8               ?str:   inx                     ; update count
 3051  F80B84  86 25                    stx     obufcnt3
 3052  F80B86  A6 1F                    ldx     obuftail3       ; output buffer tail pointer
 3053  F80B88  9F 00 C0 05              sta     >SOBUFADDR3,x   ; store byte in output buffer
 3054  F80B8C  E8                       inx                     ; update tail pointer
 3055  F80B8D  E0 00 10                 cpx     #SOBUFSIZ3      
 3056  F80B90  90 01                    bcc     ?upd
 3057  F80B92  BB                       tyx                     ; circular queue
 3058  F80B93  86 1F            ?upd:   stx     obuftail3
 3059                           
 3060                                   ; here at least one byte to send so check if tx interrupt is enabled
 3061                                   ;
 3062  F80B95  EB                       xba                     ; save A
 3063  F80B96  AD 2A FC                 lda     !ACIACMD
 3064  F80B99  89 04                    bit     #00000100B      ; check CMD<2>
 3065  F80B9B  D0 0E                    bne     ?xba            ; tx interrupt enabled
 3066  F80B9D  24 17                    bit     sppause3
 3067  F80B9F  70 0A                    bvs     ?xba            ; local pause is on, can't enable tx interrupt
 3068  F80BA1  A9 08                    lda     #00001000B      ; first clear CMD<3>    
 3069  F80BA3  1C 2A FC                 trb     !ACIACMD
 3070  F80BA6  A9 04                    lda     #00000100B      ; then set CMD<2>       
 3071  F80BA8  0C 2A FC                 tsb     !ACIACMD        ; re-enable tx interrupt        
 3072  F80BAB  EB               ?xba:   xba                     ; return A = sent data
 3073  F80BAC  18                       clc                     ; no error
 3074  F80BAD                   ?done:  INDEX08
 3075  F80BAD  E2 10                    sep     #PXFLAG
  Tue Jul 17 11:00:18 2018                                                                                               Page    9




 3076                                   .LONGI  off
 3077                                   .MNLIST
 3078  F80BAF  A6 1A                    ldx     sptmp3          ; restore X reg.        
 3079  F80BB1  2B                       pld
 3080  F80BB2  58                       cli
 3081  F80BB3  60                       rts
 3082                           
 3083  F80BB4                   spget2:
 3084  F80BB4  78                       sei                     ; disable interrupt
 3085  F80BB5  0B                       phd
 3086  F80BB6  F4 00 05                 pea     #DP05ADDR
 3087  F80BB9  2B                       pld
 3088  F80BBA  38                       sec                     ; assume error
 3089  F80BBB  86 1A                    stx     sptmp3          ; save X reg.
 3090  F80BBD  A5 19                    lda     spstat3         ; rx pending error?
 3091  F80BBF  30 47                    bmi     ?done           ; yes, exit
 3092  F80BC1  A9 00                    lda     #0              ; assume no data available
 3093  F80BC3  A8                       tay                     ; Y = 0
 3094  F80BC4                           INDEX16
 3095  F80BC4  C2 10                    rep     #PXFLAG
 3096                                   .LONGI  on
 3097                                   .MNLIST
 3098  F80BC6  A6 23                    ldx     ibufcnt3        ; available new data?
 3099  F80BC8  F0 3E                    beq     ?done           ; input queue is empty (exit with CF=1, A=0)
 3100  F80BCA  CA                       dex                     ; update count
 3101  F80BCB  86 23                    stx     ibufcnt3
 3102  F80BCD  A6 1D                    ldx     ibufhead3       ; head input buffer pointer
 3103  F80BCF  BF 00 D0 05              lda     >SIBUFADDR3,x   ; get byte from queue
 3104  F80BD3  E8                       inx                     ; update head pointer
 3105  F80BD4  E0 00 10                 cpx     #SIBUFSIZ3
 3106  F80BD7  90 01                    bcc     ?upd
 3107  F80BD9  BB                       tyx                     ; circular queue
 3108  F80BDA  86 1D            ?upd:   stx     ibufhead3
 3109  F80BDC  24 17                    bit     sppause3        ; remote pause is on?
 3110  F80BDE  10 27                    bpl     ?ok             ; no
 3111  F80BE0  A6 23                    ldx     ibufcnt3        
 3112  F80BE2  E4 27                    cpx     icntmin3        ; can clear remote pause?
 3113  F80BE4  B0 21                    bcs     ?ok             ; no
 3114  F80BE6  24 15                    bit     spmode3         ; handshake is on?
 3115  F80BE8  10 1D                    bpl     ?ok             ; no
 3116  F80BEA  EB                       xba                     ; save data
 3117  F80BEB  70 10                    bvs     ?hw             ; hardware handshake
 3118  F80BED  A9 11                    lda     #SPXON          ; software handshake: send an XON
 3119  F80BEF  85 18                    sta     spout3          ; XON is deffered
 3120  F80BF1  A9 0C                    lda     #00001100B      ; re-enable tx interrupt
 3121  F80BF3  1C 2A FC                 trb     !ACIACMD
 3122  F80BF6  A9 04                    lda     #00000100B
 3123  F80BF8  0C 2A FC                 tsb     !ACIACMD        
 3124  F80BFB  80 09                    bra     ?xba
 3125  F80BFD  A9 04            ?hw:    lda     #$04            ; hardware handshake: set RTS=0
 3126  F80BFF  1C 1F FC                 trb     .ABS.VIA2+VIAPRANH
 3127  F80C02  A9 80                    lda     #$80
 3128  F80C04  14 17                    trb     sppause3        ; clear remote pause flag
 3129  F80C06  EB               ?xba:   xba                     ; recover data
 3130  F80C07  18               ?ok:    clc
 3131  F80C08                   ?done:  INDEX08
 3132  F80C08  E2 10                    sep     #PXFLAG
  Tue Jul 17 11:00:18 2018                                                                                               Page   10




 3133                                   .LONGI  off
 3134                                   .MNLIST
 3135  F80C0A  A6 1A                    ldx     sptmp3          ; restore X reg.
 3136  F80C0C  2B                       pld
 3137  F80C0D  58                       cli
 3138  F80C0E  60                       rts                     ; CF=1 & A=0 mean: no data available 
 3139                           
 3140                           ;------------------
 3141                           
 3142                           ; set serial port 16C550
 3143                           ; A=mode
 3144  F80C0F                   spset3:
 3145  F80C0F  78                       sei                     ; disable interrupt
 3146  F80C10  0B                       phd
 3147  F80C11  F4 00 05                 pea     #DP05ADDR
 3148  F80C14  2B                       pld
 3149  F80C15  85 2B                    sta     spmode4         ; save mode
 3150  F80C17  9C 23 FC                 stz     !UART_LCR
 3151  F80C1A  9C 21 FC                 stz     !UART_IER       ; disable all UART interrupts
 3152  F80C1D  9C 24 FC                 stz     !UART_MCR       ; /RTS and /DTR high
 3153  F80C20  9C 22 FC                 stz     !UART_FCR       ; disable FIFO
 3154  F80C23  AE 20 FC                 ldx     .ABS.UART_RXTX  ; clear any pending interrupt
 3155  F80C26  AE 25 FC                 ldx     .ABS.UART_LSR
 3156  F80C29  AE 22 FC                 ldx     .ABS.UART_IIR   
 3157  F80C2C  A2 80                    ldx     #$80            ; set DLAB = 1 in LCR
 3158  F80C2E  8E 23 FC                 stx     .ABS.UART_LCR
 3159  F80C31  A8                       tay                     ; save mode
 3160  F80C32  29 03                    and     #00000011B      ; baud rate select
 3161  F80C34  AA                       tax
 3162  F80C35  BF A8 0C F8              lda     >?div,x         ; select divisor
 3163  F80C39  8D 20 FC                 sta     !UART_DLL       ; set low latch
 3164  F80C3C  9C 21 FC                 stz     !UART_DLH       ; set high latch
 3165  F80C3F  98                       tya                     ; mode
 3166  F80C40  29 0C                    and     #00001100B      ; mask on bits 3 & 2 (parity mode)
 3167  F80C42  0A                       asl     a               ; shift <3:2> to <4:3>
 3168  F80C43  09 03                    ora     #00000011B      ; 8N1 (8 bits data, 1 stop bit)
 3169  F80C45  8D 23 FC                 sta     !UART_LCR
 3170  F80C48  AD 26 FC                 lda     !UART_MSR       ; get /DSR & /CTS status
 3171  F80C4B  AA                       tax
 3172  F80C4C  0A                       asl     a
 3173  F80C4D  0A                       asl     a               ; <7>: /DSR, <6>: /CTS
 3174  F80C4E  29 C0                    and     #11000000B
 3175  F80C50  49 C0                    eor     #11000000B
 3176  F80C52  85 2C                    sta     splin4          ; update line status
 3177  F80C54  64 2D                    stz     sppause4        ; init work area
 3178  F80C56  64 2F                    stz     spstat4
 3179  F80C58  A9 01                    lda     #1              ; set tx count = 1
 3180  F80C5A  85 41                    sta     spcnt4
 3181  F80C5C                           CPU16                   ; init buffer's pointer's
 3182  F80C5C  C2 30                    rep     #(PMFLAG.OR.PXFLAG)
 3183                                   .LONGA  on
 3184                                   .LONGI  on
 3185                                   .MNLIST
 3186  F80C5E  A9 00 01                 lda     #NGUARD32
 3187  F80C61  A0 00 04                 ldy     #NFREE32
 3188  F80C64  85 3F                    sta     icntmax4
 3189  F80C66  84 3D                    sty     icntmin4
  Tue Jul 17 11:00:18 2018                                                                                               Page   11




 3190  F80C68  38                       sec
 3191  F80C69  A9 00 80                 lda     #SIBUFSIZ4
 3192  F80C6C  E5 3F                    sbc     icntmax4
 3193  F80C6E  85 3F                    sta     icntmax4
 3194  F80C70  64 31                    stz     ibuftail4
 3195  F80C72  64 33                    stz     ibufhead4
 3196  F80C74  64 39                    stz     ibufcnt4
 3197  F80C76  64 35                    stz     obuftail4
 3198  F80C78  64 37                    stz     obufhead4
 3199  F80C7A  64 3B                    stz     obufcnt4
 3200  F80C7C                           CPU08
 3201  F80C7C  E2 30                    sep     #(PMFLAG.OR.PXFLAG)
 3202                                   .LONGA  off
 3203                                   .LONGI  off
 3204                                   .MNLIST
 3205  F80C7E  A9 03                    lda     #00000011B      ; set /RTS = /DTR low
 3206  F80C80  8D 24 FC                 sta     !UART_MCR
 3207  F80C83  A9 20                    lda     #$20
 3208  F80C85  24 2B                    bit     spmode4
 3209  F80C87  D0 0E                    bne     ?nof            ; no fifo
 3210  F80C89  A9 01                    lda     #1
 3211  F80C8B  8D 22 FC                 sta     !UART_FCR
 3212  F80C8E  A9 87                    lda     #10000111B      ; enable fifo, reset rx/tx fifo, trigger level = 8      
 3213  F80C90  8D 22 FC                 sta     !UART_FCR       ; rx fifo trigger = 8
 3214  F80C93  A9 10                    lda     #16             ; set tx count = 16 in FIFO mode
 3215  F80C95  85 41                    sta     spcnt4  
 3216  F80C97  AD 25 FC         ?nof:   lda     !UART_LSR       ; again reset all interrupts
 3217  F80C9A  AD 26 FC                 lda     !UART_MSR       
 3218  F80C9D  AD 22 FC                 lda     !UART_IIR
 3219  F80CA0  A9 0F                    lda     #00001111B      ; enable all interrupts
 3220  F80CA2  8D 21 FC                 sta     !UART_IER       
 3221  F80CA5  2B                       pld
 3222  F80CA6  58                       cli
 3223  F80CA7  60                       rts
 3224                           
 3225                           ;               19.200, 38.400, 57.600, 115.200
 3226  F80CA8  06 03 02 01      ?div:   .DB     6,      3,      2,      1 
 3227                           
 3228  F80CAC                   spres3:
 3229                                   ;stz    !UART_LCR
 3230  F80CAC  9C 21 FC                 stz     !UART_IER       ; clear all interrupts
 3231                                   ;stz    !UART_MCR       ; /RTS and /DTR high
 3232  F80CAF  A9 87                    lda     #10000111B      ; enable fifo, reset rx/tx fifo
 3233  F80CB1  9C 22 FC                 stz     !UART_FCR       ; rx fifo trigger = 8
 3234  F80CB4  AD 25 FC                 lda     !UART_LSR
 3235  F80CB7  AD 26 FC                 lda     !UART_MSR
 3236  F80CBA  60                       rts
 3237                           
 3238                           ; send A to serial port 16C550
 3239  F80CBB                   spput3:
 3240  F80CBB  78                       sei                     ; disable interrupt
 3241  F80CBC  0B                       phd
 3242  F80CBD  F4 00 05                 pea     #DP05ADDR
 3243  F80CC0  2B                       pld
 3244  F80CC1  86 30                    stx     sptmp4          ; save X reg. 
 3245  F80CC3  A0 00                    ldy     #0              ; Y = 0
 3246  F80CC5                           INDEX16
  Tue Jul 17 11:00:18 2018                                                                                               Page   12




 3247  F80CC5  C2 10                    rep     #PXFLAG
 3248                                   .LONGI  on
 3249                                   .MNLIST
 3250  F80CC7  A6 3B                    ldx     obufcnt4
 3251  F80CC9  E0 00 80                 cpx     #SOBUFSIZ4      ; output buffer is full?
 3252  F80CCC  90 17                    bcc     ?str            ; no, store byte
 3253  F80CCE  24 2C                    bit     splin4          ; test /DSR line status
 3254  F80CD0  30 09                    bmi     ?ofl            ; remote terminal disconnected
 3255  F80CD2  EB                       xba                     ; save A
 3256  F80CD3  A9 02                    lda     #00000010B      ; enable TX interrupt...
 3257  F80CD5  0C 21 FC                 tsb     !UART_IER       ; ... hoping that ISR can make room in output buffer
 3258  F80CD8  EB                       xba
 3259  F80CD9  80 24                    bra     ?done           ; exit with CF=1, Y=0: output buffer is full
 3260  F80CDB  88               ?ofl:   dey                     ; /DSR high
 3261  F80CDC  EB                       xba
 3262  F80CDD  A9 02                    lda     #00000010B
 3263  F80CDF  1C 21 FC                 trb     !UART_IER       ; disable tx interrupt  
 3264  F80CE2  EB                       xba
 3265  F80CE3  80 1A                    bra     ?done           ; exit with CF=1, Y=$FF: remote terminal offline
 3266  F80CE5  E8               ?str:   inx                     ; update count
 3267  F80CE6  86 3B                    stx     obufcnt4
 3268  F80CE8  A6 37                    ldx     obufhead4       ; output buffer head pointer
 3269  F80CEA  9F 00 00 06              sta     >SOBUFADDR4,x   ; store byte in output buffer
 3270  F80CEE  E8                       inx                     ; update head pointer
 3271  F80CEF  E0 00 80                 cpx     #SOBUFSIZ4      
 3272  F80CF2  90 01                    bcc     ?upd
 3273  F80CF4  BB                       tyx                     ; circular queue
 3274  F80CF5  86 37            ?upd:   stx     obufhead4
 3275  F80CF7  EB                       xba     
 3276                                   ;lda    #00000010B
 3277                                   ;trb    !UART_IER       ; re-enable tx interrupt        
 3278  F80CF8  A9 02                    lda     #00000010B
 3279  F80CFA  0C 21 FC                 tsb     !UART_IER       ; re-enable tx interrupt        
 3280  F80CFD  EB                       xba                     ; return A = sent data
 3281  F80CFE  18                       clc                     ; no error
 3282  F80CFF                   ?done:  INDEX08
 3283  F80CFF  E2 10                    sep     #PXFLAG
 3284                                   .LONGI  off
 3285                                   .MNLIST
 3286  F80D01  A6 30                    ldx     sptmp4          ; restore X reg.        
 3287  F80D03  2B                       pld
 3288  F80D04  58                       cli
 3289  F80D05  60                       rts
 3290                           
 3291  F80D06                   spget3:
 3292  F80D06  78                       sei                     ; disable interrupt
 3293  F80D07  0B                       phd
 3294  F80D08  F4 00 05                 pea     #DP05ADDR
 3295  F80D0B  2B                       pld
 3296  F80D0C  38                       sec                     ; assume error
 3297  F80D0D  86 30                    stx     sptmp4          ; save X reg.
 3298  F80D0F  A5 2F                    lda     spstat4         ; rx pending error?
 3299  F80D11  30 3A                    bmi     ?done           ; yes, exit (CF = 1, A = error code)
 3300  F80D13  A9 00                    lda     #0              ; assume no data available
 3301  F80D15  A8                       tay                     ; Y = 0
 3302  F80D16                           INDEX16
 3303  F80D16  C2 10                    rep     #PXFLAG
  Tue Jul 17 11:00:18 2018                                                                                               Page   13




 3304                                   .LONGI  on
 3305                                   .MNLIST
 3306  F80D18  A6 39                    ldx     ibufcnt4        ; available new data?
 3307  F80D1A  F0 31                    beq     ?done           ; input queue is empty (exit with CF=1, A=0)
 3308  F80D1C  CA                       dex                     ; update count
 3309  F80D1D  86 39                    stx     ibufcnt4
 3310  F80D1F  A6 31                    ldx     ibuftail4       ; tail input buffer pointer
 3311  F80D21  BF 00 80 06              lda     >SIBUFADDR4,x   ; get byte from queue
 3312  F80D25  E8                       inx                     ; update tail pointer
 3313  F80D26  E0 00 80                 cpx     #SIBUFSIZ4
 3314  F80D29  90 01                    bcc     ?upd
 3315  F80D2B  BB                       tyx                     ; circular queue
 3316  F80D2C  86 31            ?upd:   stx     ibuftail4
 3317  F80D2E  24 2B                    bit     spmode4         ; handshake is on?
 3318  F80D30  10 1A                    bpl     ?ok             ; no, exit
 3319  F80D32  24 2D                    bit     sppause4        ; remote pause is on?
 3320  F80D34  10 16                    bpl     ?ok             ; no, exit
 3321  F80D36  A6 39                    ldx     ibufcnt4        
 3322  F80D38  E4 3D                    cpx     icntmin4        ; can clear remote pause?
 3323  F80D3A  B0 10                    bcs     ?ok             ; no, exit
 3324  F80D3C  EB                       xba                     ; save data
 3325  F80D3D  A9 02                    lda     #00000010B      ; hardware handshake...
 3326  F80D3F  0C 24 FC                 tsb     !UART_MCR       ; ...set /RTS=0
 3327  F80D42  A9 80                    lda     #$80
 3328  F80D44  14 2D                    trb     sppause4        ; clear remote pause flag
 3329  F80D46  A9 02                    lda     #00000010B      ; set IER<1>
 3330  F80D48  0C 21 FC                 tsb     !UART_IER       ; re-enable tx interrupt        
 3331  F80D4B  EB                       xba                     ; recover data
 3332  F80D4C  18               ?ok:    clc                     ; no error
 3333  F80D4D                   ?done:  CPU08
 3334  F80D4D  E2 30                    sep     #(PMFLAG.OR.PXFLAG)
 3335                                   .LONGA  off
 3336                                   .LONGI  off
 3337                                   .MNLIST
 3338  F80D4F  A6 30                    ldx     sptmp4          ; restore X reg.
 3339  F80D51  2B                       pld
 3340  F80D52  58                       cli
 3341  F80D53  60                       rts                     ; CF=1 & A=0 mean: no data available 
 3342                           
 3343                           ;------------------
 3344                           
 3345  F80D54                   lspget2:
 3346                                   .PUBLIC lspget2
 3347  F80D54  8B                       phb                     ; save DBR
 3348  F80D55  A0 00                    ldy     #0              ; set DBR = $00
 3349  F80D57  5A                       phy
 3350  F80D58  AB                       plb
 3351  F80D59  9B                       txy
 3352  F80D5A  D0 05                    bne     ?get2
 3353  F80D5C  20 06 0D                 jsr     spget3
 3354  F80D5F  AB                       plb
 3355  F80D60  6B                       rtl
 3356  F80D61  20 B4 0B         ?get2:  jsr     spget2
 3357  F80D64  AB                       plb
 3358  F80D65  6B                       rtl
 3359  F80D66                           
 3360  F80D66                   lspput2:
  Tue Jul 17 11:00:18 2018                                                                                               Page   14




 3361                                   .PUBLIC lspput2
 3362  F80D66  8B                       phb                     ; save DBR
 3363  F80D67  A0 00                    ldy     #0              ; set DBR = $00
 3364  F80D69  5A                       phy
 3365  F80D6A  AB                       plb
 3366  F80D6B  9B                       txy
 3367  F80D6C  D0 05                    bne     ?put2
 3368  F80D6E  20 BB 0C                 jsr     spput3
 3369  F80D71  AB                       plb
 3370  F80D72  6B                       rtl
 3371  F80D73  20 69 0B         ?put2:  jsr     spput2
 3372  F80D76  AB                       plb
 3373  F80D77  6B                       rtl
 3374                           
 3375  F80D78                   lspset2:
 3376                                   .PUBLIC lspset2
 3377  F80D78  8B                       phb                     ; save DBR
 3378  F80D79  A0 00                    ldy     #0              ; set DBR = $00
 3379  F80D7B  5A                       phy
 3380  F80D7C  AB                       plb
 3381  F80D7D  9B                       txy
 3382  F80D7E  D0 05                    bne     ?set2
 3383  F80D80  20 0F 0C                 jsr     spset3
 3384  F80D83  AB                       plb
 3385  F80D84  6B                       rtl     
 3386  F80D85  20 BC 0A         ?set2:  jsr     spset2
 3387  F80D88  AB                       plb
 3388  F80D89  6B                       rtl
 3389                           
 3390  F80D8A                   lspres2:
 3391                                   .PUBLIC lspres2
 3392  F80D8A  8B                       phb                     ; save DBR
 3393  F80D8B  A0 00                    ldy     #0              ; set DBR = $00
 3394  F80D8D  5A                       phy
 3395  F80D8E  AB                       plb
 3396  F80D8F  9B                       txy
 3397  F80D90  D0 05                    bne     ?res2
 3398  F80D92  20 AC 0C                 jsr     spres3
 3399  F80D95  AB                       plb
 3400  F80D96  6B                       rtl             
 3401  F80D97  20 5A 0B         ?res2:  jsr     spres2
 3402  F80D9A  AB                       plb
 3403  F80D9B  6B                       rtl
 3404                           
 3405  F80D9C                   test0:
 3406  F80D9C  78                       sei
 3407  F80D9D  0B                       phd
 3408  F80D9E  F4 00 05                 pea     #DP05ADDR
 3409  F80DA1  2B                       pld
 3410  F80DA2  85 30                    sta     sptmp4
 3411  F80DA4  A9 00                    lda     #0
 3412  F80DA6  8D 22 FC                 sta     !UART_FCR
 3413  F80DA9                           
 3414  F80DA9  A5 30                    lda     sptmp4
 3415  F80DAB  3A               ?00:    dec     a
 3416  F80DAC  D0 FD                    bne     ?00
 3417  F80DAE                           
  Tue Jul 17 11:00:18 2018                                                                                               Page   15




 3418  F80DAE  A9 40                    lda     #'@'
 3419  F80DB0  A2 0F                    ldx     #15
 3420  F80DB2  EB                       xba
 3421  F80DB3  A9 20            ?01:    lda     #$20
 3422  F80DB5  2C 25 FC                 bit     !UART_LSR
 3423  F80DB8  EA                       nop
 3424  F80DB9  EA                       nop
 3425  F80DBA  EA                       nop
 3426  F80DBB  EA                       nop
 3427  F80DBC  F0 F5                    beq     ?01
 3428                           
 3429  F80DBE  A5 30                    lda     sptmp4
 3430  F80DC0  3A               ?02:    dec     a
 3431  F80DC1  D0 FD                    bne     ?02
 3432  F80DC3                           
 3433  F80DC3  EB                       xba
 3434  F80DC4  8D 20 FC                 sta     !UART_RXTX
 3435  F80DC7  1A                       inc     a
 3436  F80DC8  EB                       xba
 3437  F80DC9                           
 3438  F80DC9  A5 30                    lda     sptmp4
 3439  F80DCB  3A               ?02a:   dec     a
 3440  F80DCC  D0 FD                    bne     ?02a
 3441                           
 3442  F80DCE  CA                       dex
 3443  F80DCF  D0 E2                    bne     ?01
 3444                           
 3445  F80DD1  A9 20            ?03:    lda     #$20
 3446  F80DD3  2C 25 FC                 bit     !UART_LSR
 3447  F80DD6  EA                       nop
 3448  F80DD7  EA                       nop
 3449  F80DD8  EA                       nop
 3450  F80DD9  EA                       nop
 3451  F80DDA  F0 F5                    beq     ?03
 3452                           
 3453  F80DDC  A5 30                    lda     sptmp4
 3454  F80DDE  3A               ?02b:   dec     a
 3455  F80DDF  D0 FD                    bne     ?02b
 3456  F80DE1                           
 3457  F80DE1  A9 0D                    lda     #$0D
 3458  F80DE3  8D 20 FC                 sta     !UART_RXTX
 3459  F80DE6  A5 30                    lda     sptmp4
 3460  F80DE8  2B                       pld
 3461  F80DE9  58                       cli
 3462  F80DEA  00 00                    brk
 3463                           
 3464  F80DEC                   test1:
 3465  F80DEC  78                       sei
 3466  F80DED  0B                       phd
 3467  F80DEE  F4 00 05                 pea     #DP05ADDR
 3468  F80DF1  2B                       pld
 3469  F80DF2  85 30                    sta     sptmp4
 3470  F80DF4  A9 01                    lda     #1
 3471  F80DF6  8D 22 FC                 sta     !UART_FCR
 3472  F80DF9                           
 3473  F80DF9  A5 30                    lda     sptmp4
 3474  F80DFB  3A               ?00:    dec     a
  Tue Jul 17 11:00:18 2018                                                                                               Page   16




 3475  F80DFC  D0 FD                    bne     ?00
 3476  F80DFE                           
 3477  F80DFE  A9 40                    lda     #'@'
 3478  F80E00  A2 0F                    ldx     #15
 3479  F80E02  EB                       xba
 3480  F80E03  A9 20            ?01:    lda     #$20
 3481  F80E05  2C 25 FC                 bit     !UART_LSR
 3482  F80E08  EA                       nop
 3483  F80E09  EA                       nop
 3484  F80E0A  EA                       nop
 3485  F80E0B  EA                       nop
 3486  F80E0C  F0 F5                    beq     ?01
 3487                           
 3488  F80E0E  A5 30                    lda     sptmp4
 3489  F80E10  3A               ?02:    dec     a
 3490  F80E11  D0 FD                    bne     ?02
 3491  F80E13                           
 3492  F80E13  EB               ?0l:    xba
 3493  F80E14  8D 20 FC                 sta     !UART_RXTX
 3494  F80E17  1A                       inc     a
 3495  F80E18  EB                       xba
 3496  F80E19                           
 3497  F80E19  A5 30                    lda     sptmp4
 3498  F80E1B  3A               ?02a:   dec     a
 3499  F80E1C  D0 FD                    bne     ?02a
 3500                           
 3501  F80E1E  CA                       dex
 3502  F80E1F  D0 F2                    bne     ?0l
 3503  F80E21                           
 3504  F80E21  A9 0D                    lda     #$0D
 3505  F80E23  8D 20 FC                 sta     !UART_RXTX
 3506  F80E26  A5 30                    lda     sptmp4
 3507  F80E28  2B                       pld
 3508  F80E29  58                       cli
 3509  F80E2A  00 00                    brk
 3510                           
 3511  F80E2C                   test2:
 3512  F80E2C  78                       sei
 3513  F80E2D  0B                       phd
 3514  F80E2E  F4 00 05                 pea     #DP05ADDR
 3515  F80E31  2B                       pld
 3516  F80E32  A0 00                    ldy     #0
 3517  F80E34  A9 01                    lda     #1
 3518  F80E36  8D 22 FC                 sta     !UART_FCR       
 3519  F80E39  A9 40            ?00:    lda     #'@'
 3520  F80E3B  A2 0F                    ldx     #15
 3521  F80E3D  EB                       xba
 3522  F80E3E  A9 20            ?01:    lda     #$20
 3523  F80E40  2C 25 FC                 bit     !UART_LSR
 3524  F80E43  EA                       nop
 3525  F80E44  EA                       nop
 3526  F80E45  EA                       nop
 3527  F80E46  EA                       nop
 3528  F80E47  F0 F5                    beq     ?01
 3529                           
 3530  F80E49  EB               ?ll:    xba
 3531  F80E4A  8D 20 FC                 sta     !UART_RXTX
  Tue Jul 17 11:00:18 2018                                                                                               Page   17




 3532  F80E4D  1A                       inc     a
 3533  F80E4E  EB                       xba
 3534  F80E4F  CA                       dex
 3535  F80E50  D0 F7                    bne     ?ll
 3536  F80E52                           
 3537  F80E52  A9 0D                    lda     #$0D
 3538  F80E54  8D 20 FC                 sta     !UART_RXTX
 3539  F80E57  88                       dey
 3540  F80E58  D0 DF                    bne     ?00
 3541  F80E5A  2B                       pld
 3542  F80E5B  58                       cli
 3543  F80E5C  00 00                    brk
 3544                           
 3545                           ;==========================================
 3546                           ; UM245R
 3547                           
 3548  F80E5E                   umgetcmd:
 3549                                   .PUBLIC umgetcmd
 3550                           
 3551  F80E5E  A9 40                    lda     #$40
 3552  F80E60  14 01                    trb     usbum           ; clear bit <6>: fifo data not available
 3553  F80E62  24 01                    bit     usbum
 3554  F80E64  30 1D                    bmi     ?cmd            ; already connected: check command
 3555  F80E66                           
 3556                                   ; check connession request
 3557  F80E66  A2 07                    ldx     #7
 3558  F80E68  B5 03            ?chk1:  lda     usbbuf,x
 3559  F80E6A  DF B7 0E F8              cmp     >?usbconn,x
 3560  F80E6E  F0 06                    beq     ?nxt
 3561  F80E70  A9 55            ?nack:  lda     #$55            ; NACK
 3562  F80E72  8D 2F FC                 sta     !UM245R
 3563  F80E75  6B                       rtl
 3564  F80E76  CA               ?nxt:   dex
 3565  F80E77  10 EF                    bpl     ?chk1
 3566  F80E79  A9 AA                    lda     #$AA            ; ACK
 3567  F80E7B  8D 2F FC                 sta     !UM245R
 3568  F80E7E  A9 80                    lda     #$80
 3569  F80E80  04 01                    tsb     usbum
 3570  F80E82  6B                       rtl
 3571  F80E83  A2 00            ?cmd:   ldx     #(?usbtab2 - ?usbtab1 - 1)
 3572  F80E85  A5 03                    lda     usbbuf
 3573  F80E87  DF BF 0E F8      ?cmdl:  cmp     >?usbtab1,x
 3574  F80E8B  F0 05                    beq     ?cmd2
 3575  F80E8D  CA                       dex
 3576  F80E8E  10 F7                    bpl     ?cmdl
 3577  F80E90  30 DE                    bmi     ?nack           ; not found
 3578  F80E92  A5 04            ?cmd2:  lda     usbbuf+1
 3579  F80E94  DF C0 0E F8              cmp     >?usbtab2,x
 3580  F80E98  D0 D6                    bne     ?nack           ; not found
 3581  F80E9A  8A                       txa
 3582  F80E9B  0A                       asl     a
 3583  F80E9C  AA                       tax
 3584  F80E9D  A9 01                    lda     #CA2IFRB        ; disable CA2 interrupt
 3585  F80E9F  8D 1E FC                 sta     !VIA2+VIAIER
 3586  F80EA2  8D 1D FC                 sta     !VIA2+VIAIFR
 3587  F80EA5  20 1B 10                 jsr     usbsndack
 3588  F80EA8  FC B5 0E                 jsr     (?umjmp,x)
  Tue Jul 17 11:00:18 2018                                                                                               Page   18




 3589  F80EAB  78                       sei
 3590  F80EAC  A9 81                    lda     #SETFRB.OR.CA2IFRB ; enable CA2 interrupt
 3591  F80EAE  8D 1E FC                 sta     !VIA2+VIAIER
 3592  F80EB1  8D 1D FC                 sta     !VIA2+VIAIFR
 3593  F80EB4  6B                       rtl
 3594                           
 3595  F80EB5                   ?umjmp:
 3596  F80EB5  C10E                     .DW     usbgetfmw
 3597                           
 3598  F80EB7                   ?usbconn:
 3599  F80EB7  87 E9 5D 93 B7           .DB     $87, $E9, $5D, $93, $B7, $57, $7D, $3B
               57 7D 3B 
 3600                           
 3601  F80EBF                   ?usbtab1:
 3602  F80EBF  99                       .DB     $99
 3603                           
 3604  F80EC0                   ?usbtab2:
 3605  F80EC0  51                       .DB     $51
 3606                           
 3607                           
 3608                           ; get firmware (512K)
 3609  F80EC1                   usbgetfmw:
 3610  F80EC1  58                       cli
 3611  F80EC2  64 10                    stz     usbptr
 3612  F80EC4  64 11                    stz     usbptr+1
 3613  F80EC6  A9 70                    lda     #$70
 3614  F80EC8  85 12                    sta     usbptr+2        ; put firmware in bank $30
 3615  F80ECA  64 0E                    stz     usbsiz          ; full 64K bank
 3616  F80ECC  64 0F                    stz     usbsiz+1
 3617  F80ECE  A9 08                    lda     #$08            ; 8 banks
 3618  F80ED0  85 13                    sta     usbtmp
 3619  F80ED2  A9 08            ?lp:    lda     #$08
 3620  F80ED4  38                       sec
 3621  F80ED5  E5 13                    sbc     usbtmp
 3622  F80ED7  48                       pha
 3623  F80ED8  4B                       phk
 3624  F80ED9  F4 3F 0F                 pea     #!?fmt1
 3625  F80EDC  A9 05                    lda     #5
 3626  F80EDE  48                       pha
 3627  F80EDF                           BPRINTF
 3628  F80EDF  02 11                    cop     $11
 3629                                   .MNLIST
 3630  F80EE1  20 8A 0F                 jsr     usbgetblk
 3631  F80EE4  B0 4E                    bcs     ?err            ; error
 3632  F80EE6  20 1B 10                 jsr     usbsndack
 3633  F80EE9                           SCNPRINT
 3634  F80EE9  02 01                    cop     $01
 3635                                   .MNLIST
 3636  F80EEB  64 6F 6E 65 2E           .DB     'done.', 13, 0
               0D 00 
 3637  F80EF2  E6 12                    inc     usbptr+2
 3638  F80EF4  C6 13                    dec     usbtmp
 3639  F80EF6  D0 DA                    bne     ?lp
 3640                           
 3641  F80EF8  A9 70                    lda     #$70
 3642  F80EFA  85 12                    sta     usbptr+2
 3643  F80EFC  64 14                    stz     usbcmp
  Tue Jul 17 11:00:18 2018                                                                                               Page   19




 3644  F80EFE  A9 08                    lda     #$08            ; 8 banks
 3645  F80F00  85 13                    sta     usbtmp
 3646  F80F02  A9 08            ?lp2:   lda     #$08
 3647  F80F04  38                       sec
 3648  F80F05  E5 13                    sbc     usbtmp
 3649  F80F07  48                       pha
 3650  F80F08  4B                       phk
 3651  F80F09  F4 71 0F                 pea     #!?fmt3
 3652  F80F0C  A9 05                    lda     #5
 3653  F80F0E  48                       pha
 3654  F80F0F                           BPRINTF
 3655  F80F0F  02 11                    cop     $11
 3656                                   .MNLIST
 3657  F80F11                           
 3658                                   ;jsr    usbcmpblk
 3659                                   ;bcs    ?err            ; error
 3660                                   ;bit    usbcmp
 3661                                   ;bpl    ?ok
 3662                                   ;jsr    usbsndnack
 3663                                   ;bra    ?err
 3664                           ?ok:    ;jsr    usbsndack
 3665                           
 3666  F80F11  20 DE 0F                 jsr     usbputbank
 3667  F80F14  B0 1E                    bcs     ?err
 3668                           
 3669  F80F16                           SCNPRINT
 3670  F80F16  02 01                    cop     $01
 3671                                   .MNLIST
 3672  F80F18  64 6F 6E 65 2E           .DB     'done.', 13, 0
               0D 00 
 3673  F80F1F  E6 12                    inc     usbptr+2
 3674  F80F21  C6 13                    dec     usbtmp
 3675  F80F23  D0 DD                    bne     ?lp2
 3676  F80F25                           
 3677                           .COMMENT @
 3678                                   ; send back for check
 3679                                   lda     #$08            ; 8 banks
 3680                                   sta     usbtmp
 3681                                   lda     #$70
 3682                                   sta     usbptr+2
 3683                           ?lp1:   lda     #$08
 3684                                   sec
 3685                                   sbc     usbtmp
 3686                                   pha
 3687                                   phk
 3688                                   pea     #!?fmt2
 3689                                   lda     #5
 3690                                   pha
 3691                                   BPRINTF
 3692                                   ;jsr    usbputblk
 3693                                   jsr     usbputbank
 3694                                   ;jsr    usbrx
 3695                                   bcs     ?err
 3696                                   ;bne    ?err            ; NACK
 3697                                   SCNPRINT
 3698                                   .DB     'done.', 13, 0
 3699                                   inc     usbptr+2
  Tue Jul 17 11:00:18 2018                                                                                               Page   20




 3700                                   dec     usbtmp
 3701                                   bne     ?lp1
 3702                           @
 3703                           
 3704                                   ; wait final ACK
 3705  F80F25  20 26 10                 jsr     usbrx
 3706  F80F28  B0 0A                    bcs     ?err
 3707  F80F2A  D0 08                    bne     ?err            ; NACK
 3708  F80F2C                           SCNPRINT
 3709  F80F2C  02 01                    cop     $01
 3710                                   .MNLIST
 3711  F80F2E  4F 4B 2E 0D 00           .DB     'OK.', 13, 0
 3712  F80F33  60                       rts
 3713  F80F34                   ?err:
 3714  F80F34                           SCNPRINT
 3715  F80F34  02 01                    cop     $01
 3716                                   .MNLIST
 3717  F80F36  65 72 72 6F 72           .DB     'error.', 13, 0
               2E 0D 00 
 3718  F80F3E  60                       rts
 3719                           
 3720  F80F3F  67 65 74 20 66   ?fmt1:  .DB     'get firmware bank %bu...', 0
               69 72 6D 77 61 
               72 65 20 62 61 
               6E 6B 20 25 62 
               75 2E 2E 2E 00 
 3721  F80F58  73 65 6E 64 20   ?fmt2:  .DB     'send back    bank %bu...', 0
               62 61 63 6B 20 
               20 20 20 62 61 
               6E 6B 20 25 62 
               75 2E 2E 2E 00 
 3722  F80F71  76 65 72 66 2E   ?fmt3:  .DB     'verf. firmw. bank %bu...', 0
               20 66 69 72 6D 
               77 2E 20 62 61 
               6E 6B 20 25 62 
               75 2E 2E 2E 00 
 3723                           
 3724                           ; get block: size in usbsiz, dest in usbptr     
 3725  F80F8A                   usbgetblk:
 3726  F80F8A  A0 00                    ldy     #0
 3727  F80F8C                           INDEX16
 3728  F80F8C  C2 10                    rep     #PXFLAG
 3729                                   .LONGI  on
 3730                                   .MNLIST
 3731  F80F8E  A6 0E                    ldx     usbsiz
 3732  F80F90  A9 01                    lda     #CA2IFRB        ; check CA2 flag
 3733  F80F92  2C 1F FC         ?lp:    bit     !VIA2+VIAPRANH  ; check /TXE
 3734  F80F95  70 17                    bvs     ?err            ; /TXE is high: disconnession?
 3735  F80F97  2C 1D FC                 bit     VIA2+VIAIFR     ; check CA2 flag
 3736  F80F9A  F0 F6                    beq     ?lp
 3737  F80F9C  8D 1D FC                 sta     !VIA2+VIAIFR    ; clear CA2 flag
 3738  F80F9F  EB                       xba
 3739  F80FA0  AD 2F FC                 lda     !UM245R
 3740  F80FA3  97 10                    sta     [usbptr],y
 3741  F80FA5  EB                       xba
 3742  F80FA6  C8                       iny
 3743  F80FA7  CA                       dex
  Tue Jul 17 11:00:18 2018                                                                                               Page   21




 3744  F80FA8  D0 E8                    bne     ?lp
 3745  F80FAA  18                       clc
 3746  F80FAB                           INDEX08
 3747  F80FAB  E2 10                    sep     #PXFLAG
 3748                                   .LONGI  off
 3749                                   .MNLIST
 3750  F80FAD  60                       rts
 3751  F80FAE                   ?err:   CPU08SEC
 3752  F80FAE  E2 31                    sep     #(PMFLAG.OR.PXFLAG.OR.PCFLAG)
 3753                                   .LONGA  off
 3754                                   .LONGI  off
 3755                                   .MNLIST
 3756  F80FB0  60                       rts
 3757                           
 3758                           ; cmp block: size in usbsiz, dest in usbptr     
 3759  F80FB1                   usbcmpblk:
 3760  F80FB1  A0 00                    ldy     #0
 3761  F80FB3                           INDEX16
 3762  F80FB3  C2 10                    rep     #PXFLAG
 3763                                   .LONGI  on
 3764                                   .MNLIST
 3765  F80FB5  A6 0E                    ldx     usbsiz
 3766  F80FB7  A9 01                    lda     #CA2IFRB        ; check CA2 flag
 3767  F80FB9  2C 1F FC         ?lp:    bit     !VIA2+VIAPRANH  ; check /TXE
 3768  F80FBC  70 1D                    bvs     ?err            ; /TXE is high: disconnession?
 3769  F80FBE  2C 1D FC                 bit     VIA2+VIAIFR     ; check CA2 flag
 3770  F80FC1  F0 F6                    beq     ?lp
 3771  F80FC3  8D 1D FC                 sta     !VIA2+VIAIFR    ; clear CA2 flag
 3772  F80FC6  EB                       xba
 3773  F80FC7  AD 2F FC                 lda     !UM245R
 3774  F80FCA  D7 10                    cmp     [usbptr],y
 3775  F80FCC  F0 04                    beq     ?02
 3776  F80FCE  A9 80                    lda     #$80
 3777  F80FD0  85 14                    sta     usbcmp
 3778  F80FD2  EB               ?02:    xba
 3779  F80FD3  C8                       iny
 3780  F80FD4  CA                       dex
 3781  F80FD5  D0 E2                    bne     ?lp
 3782  F80FD7  18                       clc
 3783  F80FD8                           INDEX08
 3784  F80FD8  E2 10                    sep     #PXFLAG
 3785                                   .LONGI  off
 3786                                   .MNLIST
 3787  F80FDA  60                       rts
 3788  F80FDB                   ?err:   CPU08SEC
 3789  F80FDB  E2 31                    sep     #(PMFLAG.OR.PXFLAG.OR.PCFLAG)
 3790                                   .LONGA  off
 3791                                   .LONGI  off
 3792                                   .MNLIST
 3793  F80FDD  60                       rts
 3794                           
 3795                           ; put a full: source in usbptr  
 3796  F80FDE                   usbputbank:
 3797  F80FDE  78                       sei
 3798  F80FDF  A0 00                    ldy     #0
 3799  F80FE1  AD 1F FC         ?lp:    lda     !VIA2+VIAPRANH  ; check /TXE
 3800  F80FE4  CD 1F FC                 cmp     !VIA2+VIAPRANH
  Tue Jul 17 11:00:18 2018                                                                                               Page   22




 3801  F80FE7  D0 F8                    bne     ?lp
 3802  F80FE9  0A                       asl     a
 3803  F80FEA  30 F5                    bmi     ?lp
 3804  F80FEC  B7 10                    lda     [usbptr],y
 3805  F80FEE  8F 2F FC 00              sta     >UM245R 
 3806  F80FF2  C8                       iny
 3807  F80FF3  D0 EC                    bne     ?lp
 3808                                   ;jsr    usbrx
 3809                                   ;bcs    ?rts
 3810                                   ;bne    ?err            ; NACK
 3811  F80FF5  E6 11                    inc     usbptr+1
 3812  F80FF7  D0 E8                    bne     ?lp
 3813  F80FF9  18                       clc
 3814  F80FFA  58               ?rts:   cli     
 3815  F80FFB  60                       rts
 3816  F80FFC  38               ?err:   sec
 3817  F80FFD  58                       cli
 3818  F80FFE  60                       rts
 3819                           
 3820                           ; put block: size in usbsiz, dest in usbptr     
 3821  F80FFF                   usbputblk:
 3822  F80FFF  A0 00                    ldy     #0
 3823  F81001                           INDEX16
 3824  F81001  C2 10                    rep     #PXFLAG
 3825                                   .LONGI  on
 3826                                   .MNLIST
 3827  F81003  A6 0E                    ldx     usbsiz
 3828                           ;       bra     ?lp
 3829                           ;?lp0:  bit     !VIA2+VIAPRANH  ; check /TXE
 3830                           ;       bvs     ?lp
 3831                           ;       bvc     ?lp0
 3832  F81005  2C 1F FC         ?lp:    bit     !VIA2+VIAPRANH  ; check /TXE
 3833                                   ;cmp    !VIA2+VIAPRANH
 3834                                   ;bne    ?lp
 3835                                   ;asl    a
 3836                                   ;bmi    ?lp             ; /TXE is high
 3837  F81008  70 FB                    bvs     ?lp
 3838  F8100A  B7 10                    lda     [usbptr],y
 3839  F8100C  8D 2F FC                 sta     !UM245R
 3840  F8100F  C8                       iny
 3841  F81010  CA                       dex
 3842  F81011  D0 F2                    bne     ?lp
 3843  F81013  18                       clc
 3844  F81014                           INDEX08
 3845  F81014  E2 10                    sep     #PXFLAG
 3846                                   .LONGI  off
 3847                                   .MNLIST
 3848  F81016  60                       rts
 3849                           
 3850                           ; send nack
 3851  F81017                   usbsndnack:
 3852  F81017  A9 55                    lda     #$55
 3853  F81019  80 02                    bra     usbsnd
 3854                           
 3855                           ; send ack
 3856  F8101B                   usbsndack:
 3857  F8101B  A9 AA                    lda     #$AA
  Tue Jul 17 11:00:18 2018                                                                                               Page   23




 3858                           
 3859                           ; send a byte
 3860  F8101D                   usbsnd:
 3861  F8101D  2C 1F FC         ?lp:    bit     !VIA2+VIAPRANH  ; check /TXE
 3862  F81020  70 FB                    bvs     ?lp             ; /TXE is high
 3863  F81022  8D 2F FC                 sta     !UM245R
 3864  F81025  60                       rts
 3865                           
 3866  F81026                   usbrx:
 3867  F81026  A9 01                    lda     #CA2IFRB        ; check CA2 flag
 3868  F81028  2C 1F FC         ?lp:    bit     !VIA2+VIAPRANH  ; check /TXE
 3869  F8102B  70 0F                    bvs     ?err            ; /TXE is high: disconnession?
 3870  F8102D  2C 1D FC                 bit     VIA2+VIAIFR     ; check CA2 flag
 3871  F81030  F0 F6                    beq     ?lp
 3872  F81032  8D 1D FC                 sta     !VIA2+VIAIFR    ; clear CA2 flag
 3873  F81035  AD 2F FC                 lda     !UM245R
 3874  F81038  C9 AA                    cmp     #$AA
 3875  F8103A  18                       clc
 3876  F8103B  60                       rts
 3877  F8103C  38               ?err:   sec
 3878  F8103D  60                       rts


             Lines Assembled : 3788                  Errors : 0