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Tue Jul 17 11:00:16 2018 Page 1
2500 A.D. 65816 Macro Assembler #26960 - Version 5.02g
-----------------------------------------------------
Input Filename : src\F8\fpuemu.asm
Output Filename : obj\F8\fpuemu.obj
Listing Has Been Relocated
2588 .LIST on
2589
2590
2591 ;----------------------------------------------------------
2592 ; variabili in Direct-Page 02
2593 ;----------------------------------------------------------
2594 F8FFB1
2595 F8FFB1 .INCLUDE inc\dirp02.inc
2596 ;----------------------------------------------------------
2597 ; DIRP02.ASM
2598 ; PROGETTO: B1601
2599 ;
2600 ; Variabili in Direct Page $02
2601 ;----------------------------------------------------------
2602
2603 ; sezione COMMON -- questo permette di includere il file in piu' file
2604
2605 DIRP02: .SECTION page0, ref_only, common ;Direct-Page 02
2606
2607 000000 .ABSOLUTE ;; inizia sempre da $00
2608 000000 .ORG 0x00
2609 000000
2610 ; variabili usate nella funzione _vprintl e famiglia funzioni di formattazione
2611 000000 0000 FmtParm .DW ;; ptr array parametri banco 0
2612 000002 FmtLPFmt LP ;; long ptr stringa szFmt
2613 000005 FmtLPPut LP ;; long ptr funzione 'putter'
2614 000008 00 FmtSpec .DB ;; indice '%' corrente in szFmt
2615 000009 00 FmtWidth .DB ;; campo width
2616 00000A 00 FmtPrec .DB ;; campo precision
2617 00000B 00 FmtFlag .DB ;; flag formattazione
2618 00000C 00 FmtSgn .DB ;; segno positivo (se 0 -> no segno)
2619 00000D 00 VStoreF .DB ;; flag modo store
2620 00000E 00 FmtMod .DB ;; flag modificatori
2621 00000F 00 FmtDst .DB ;; ptr stringa szDst banco 0
2622
2623 000010 0000 FmtCnt .DW ;; contatore caratteri
2624 000012 0000 FmtGMax .DW ;; max. len stringa globale
2625 000014
2626 000014 0000 XVDec .DW ; esponente decimale (signed)
2627 000016 00 XVFlag .DB ; flag per conversioni numeriche
2628 000017
2629 000017 00 ACMCmps .DB ; flag compare segno e tipo (intero)
2630
2631 000018 ACM DQ ; accumulatore #1 integer 64 bit
2632 000020 00 ACMSize .DB ; size
2633 000021 00 ACMSgn .DB ; <7>:segno, <6>:tipo signed
Tue Jul 17 11:00:16 2018 Page 2
2634 000022 00 ACMMinSize .DB ; minima dimensione richiesta per ACM
2635 000023 00 IARGMinSize .DB
2636
2637 000024 00 FPTmp1 .DB ; byte temporaneo
2638 000025 00 FPTmp2 .DB ; byte temporaneo
2639 000026 00 FPTmp3 .DB ; byte temporaneo
2640 000027 00 FPTmp4 .DB ; byte temporaneo
2641
2642 000028 IARG DQ ; accumulatore #2 integer 64 bit
2643 000030 00 IARGSize .DB ; size
2644 000031 00 IARGSgn .DB ; <7>:segno, <6>:tipo signed
2645
2646 000032 FOP DS 9 ; temporaneo per FDIV/FMULT/integer MULT/DIV
2647 ; conversione integer -> string
2648 00003B 00 FPIndx .DB ; byte generico indice
2649 00003C 0000 FPWTmp7 .DW ; word temporanea
2650 00003E 0000 FPWTmp8 .DW ; word temporanea
2651
2652 ; variabili temporanee sovrapposte a FOP
2653 000036 FACXM .EQU FOP+4 ; byte temporaneo
2654 000037 ARGXM .EQU FOP+5 ; byte temporaneo
2655 000038 FPWTmp5 .EQU FOP+6 ; word temporanea
2656 00003A FPTmp6 .EQU FOP+8 ; byte temporaneo
2657
2658 ; Floating Point Accumulator #1 - FAC
2659 000040 00 FACSGN .DB ; FAC mantissa sign
2660 000041 00 FACEXT .DB ; FAC 8 bit extension (rounding)
2661 000042 FACM DQ ; FAC Mantissa (64 bit)
2662 00004A 0000 FACExp .DW ; FAC Exponent
2663 00004A FACEXPL .EQU FACExp ; FAC Exponent Low
2664 00004B FACEXPH .EQU FACExp+1 ; FAC Exponent Hi
2665
2666 00004C 00 FACSCMP .DB ; Sign Comparison Result: FAC vs ARG
2667 00004D 00 FACMlt .DB ; flag MULT
2668 00004E 00 FACUndf .DB ; conteggio shift per underflow
2669 00004F 00 FPDCnt .DB ; contatore per inserzione punto decimale
2670 000050
2671 ; Floating Point Accumulator #2 - ARG
2672 000050 00 ARGSGN .DB ; ARG mantissa sign
2673 000051 00 ARGEXT .DB ; ARG 8 bit extension (rounding)
2674 000052 ARGM DQ ; ARG Mantissa (64 bit)
2675 00005A 0000 ARGExp .DW ; ARG Exponent
2676 00005A ARGEXPL .EQU ARGExp ; ARG Exponent Low
2677 00005B ARGEXPH .EQU ARGExp+1 ; ARG Exponent Hi
2678
2679 ; numero bytes FAC
2680 00000A FACSIZE .EQU (FACEXPH - FACEXT)
2681 000008 MANTSIZE .EQU (FACSIZE - 2)
2682 000040 FACMBITS .EQU (MANTSIZE * 8)
2683 000041 FAC .EQU FACEXT
2684 000051 ARG .EQU ARGEXT
2685
2686 00005C 0000 FPWTmp .DW
2687 00005E 0000 FPExp .DW ; esponente conversioni str/float
2688 000060 FPLPtr LP ; long ptr operazioni move
2689 000063 00 FPFlag .DB ; flag generico operazioni FPU
2690 000064 FACTmp .DS 12 ; registro FAC temporaneo (con sgn ed ext)
Tue Jul 17 11:00:16 2018 Page 3
2691
2692 ; buffer per conversione da int/float a string (20 digit + 2)
2693 000016 FPSTRSIZE .EQU 22
2694 000070 FPUStr .DS FPSTRSIZE
2695
2696 ; buffer per formattazione int/float
2697 000030 XFSTRSIZE .EQU 48
2698 000086 XCVTStr .DS XFSTRSIZE
2699 0000B5 XCVTStrEnd .EQU ($ - 1)
2700
2701 0000B6 DUMMY100 .DS 22
2702
2703 000060 PTR1 .EQU FPLPtr ; long ptr operazioni 'move'
2704 000063 FPFLAG .EQU FPFlag
2705 00004F FPDCNT .EQU FPDCnt
2706 0000CC
2707 0000CC .RELATIVE
2708
2709 .ENDS
2710
2711 FFFFB0 MAXMANTSHIFT .EQU (-(FACMBITS + 16)) ; max. shift divisione mant.
2712 00002F XCVTMAXF .EQU (XFSTRSIZE - 1) ; max. caratteri formato F
2713 000027 XCVTMAXE .EQU (XCVTMAXF - 8) ; max. caratteri formato E
2714 00002E XCVTMAXI .EQU (XFSTRSIZE - 2) ; max. caratteri stringa int.
2715
2716 F8FFB1
2717
2718 F8FFB1
2719 ;----------------------------------------------------------
2720 ; segmento codice banco $F8
2721 ;----------------------------------------------------------
2722
2723 .CODEF8
2724 .EXTERN _UI2Str, _iSMult16, Byte2Hex
2725 .GLOBAL _Str2Fl, _MovRndF2A, _feMUL, _MovRF2Mem, _MovMem2A, _feDIV
2726 .GLOBAL _feSUB, _feADD, _feFAC2S, _MovMem2Fa
2727
2728 003FFF EXPBIAS .EQU $3FFF ; bias esponente
2729 007FFF EXPINF .EQU $7FFF ; esponente INF e NAN
2730 008000 MANTINF .EQU $8000 ; mantissa INF
2731 00FF00 MANTNAN .EQU $FF00 ; mantissa NAN
2732 004006 BIASBYTE .EQU (EXPBIAS + 7) ; bias BYTE (8 bit)
2733 00400E BIASWORD .EQU (BIASBYTE + 8) ; bias WORD (16 bit)
2734 00401E BIASDWORD .EQU (BIASWORD + 16) ; bias DWORD (32 bit)
2735 00403E BIASQWORD .EQU (BIASDWORD + 32); bias QWORD (64 bit)
2736 003FFF MAXPEXP .EQU EXPBIAS ; massimo esponente positivo
2737 FFC001 MINNEXP .EQU -(EXPBIAS) ; minimo esponente negativo
2738 004D10 LOG2H .EQU 19728 ; LG(2) * $10000
2739 001387 EXP10LIM .EQU 4999 ; limite esponente in FStr2Float
2740 000013 MAXDIGITS .EQU 19 ; max. numero cifre decimali
2741 000014 MAXINTDGTS .EQU 20 ; max. cifre unsigned int
2742 00007F MAXDECSTR .EQU 127
2743 000007 MAXFEXP .EQU 7 ; max. esp. dec. negativo formato G/F
2744 000024 MAXFDEC .EQU 36 ; max. esp. decimale positivo form. F
2745
2746 .LONGA off
2747 .LONGI off
Tue Jul 17 11:00:16 2018 Page 4
2748
2749
2750 F83387 _test1:
2751 .EXTERN fpmult, fpdiv, ldfac, ldarg, fround
2752 F83387
2753 F83387 8B phb ; salva DBR
2754 F83388 0B phd ; salva DPR
2755 F83389 F4 00 02 pea #DP02ADDR ; imposta DPR a pag 2
2756 F8338C 2B pld
2757 F8338D A0 00 ldy #0
2758 F8338F 5A phy
2759 F83390 AB plb ; imposta DBR su banco 0
2760
2761 F83391 A0 F8 ldy #^?510 ; ARG = 1.0
2762 F83393 A9 36 lda #>?510
2763 F83395 EB xba
2764 F83396 A9 D2 lda #<?510
2765 F83398 20 62 3D jsr _MovMem2F
2766 F8339B A0 F8 ldy #^?500 ; ARG = 1.0
2767 F8339D A9 36 lda #>?510
2768 F8339F EB xba
2769 F833A0 A9 DC lda #<?500
2770 F833A2 20 98 3D jsr _MovMem2A
2771 F833A5 20 30 3A jsr _feDIV ; FAC=ARG/FAC
2772 F833A8 20 43 38 jsr _Round
2773 F833AB
2774 F833AB 0B phd
2775 F833AC F4 00 3F pea #$3f00
2776 F833AF 2B pld
2777 F833B0 A0 F8 ldy #^?610 ; ARG = 1.0
2778 F833B2 A9 36 lda #>?610
2779 F833B4 EB xba
2780 F833B5 A9 F2 lda #<?610
2781 F833B7 20 82 86 jsr ldfac
2782 F833BA A0 F8 ldy #^?600 ; ARG = 1.0
2783 F833BC A9 36 lda #>?600
2784 F833BE EB xba
2785 F833BF A9 E6 lda #<?600
2786 F833C1 20 CF 86 jsr ldarg
2787 F833C4 20 DD 49 jsr fpmult ; FAC=ARG/FAC
2788 F833C7 20 FA 4F jsr fround
2789 F833CA 2B pld
2790 F833CB 2B pld
2791 F833CC AB plb
2792 F833CD 00 00 brk
2793
2794 F833CF 4B phk
2795 F833D0 F4 A0 36 pea #?400
2796 F833D3 4B phk
2797 F833D4 F4 5A 36 pea #?210
2798 F833D7 A9 07 lda #7
2799 F833D9 48 pha
2800 F833DA BPRINTF
2801 F833DA 02 11 cop $11
2802 .MNLIST
2803 F833DC 4B phk
2804 F833DD F4 AA 36 pea #?410
Tue Jul 17 11:00:16 2018 Page 5
2805 F833E0 4B phk
2806 F833E1 F4 5A 36 pea #?210
2807 F833E4 A9 07 lda #7
2808 F833E6 48 pha
2809 F833E7 BPRINTF
2810 F833E7 02 11 cop $11
2811 .MNLIST
2812
2813 F833E9 A9 36 lda #>?100 ; 1.0
2814 F833EB EB xba
2815 F833EC A9 29 lda #<?100
2816 F833EE A2 F8 ldx #^?100
2817 F833F0 20 5A 3F jsr _Str2Fl
2818 F833F3 A0 20 ldy #$20
2819 F833F5 A9 00 lda #0
2820 F833F7 EB xba
2821 F833F8 A9 00 lda #0
2822 F833FA 20 26 3D jsr _MovRF2Mem
2823 F833FD
2824 F833FD A9 36 lda #>?105 ; 1.0001
2825 F833FF EB xba
2826 F83400 A9 2D lda #<?105
2827 F83402 A2 F8 ldx #^?105
2828 F83404 20 5A 3F jsr _Str2Fl
2829 F83407 A0 20 ldy #$20
2830 F83409 A9 00 lda #0
2831 F8340B EB xba
2832 F8340C A9 10 lda #$10
2833 F8340E 20 26 3D jsr _MovRF2Mem
2834
2835 F83411 A9 36 lda #>?110 ; 0.9999
2836 F83413 EB xba
2837 F83414 A9 37 lda #<?110
2838 F83416 A2 F8 ldx #^?110
2839 F83418 20 5A 3F jsr _Str2Fl
2840 F8341B A0 20 ldy #$20
2841 F8341D A9 00 lda #0
2842 F8341F EB xba
2843 F83420 A9 20 lda #$20
2844 F83422 20 26 3D jsr _MovRF2Mem
2845
2846 F83425 A9 36 lda #>?115 ; 0.0001
2847 F83427 EB xba
2848 F83428 A9 41 lda #<?115
2849 F8342A A2 F8 ldx #^?115
2850 F8342C 20 5A 3F jsr _Str2Fl
2851 F8342F A0 20 ldy #$20
2852 F83431 A9 00 lda #0
2853 F83433 EB xba
2854 F83434 A9 30 lda #$30
2855 F83436 20 26 3D jsr _MovRF2Mem
2856
2857 F83439 A0 20 ldy #$20 ; ARG = 1.0
2858 F8343B A9 00 lda #0
2859 F8343D EB xba
2860 F8343E A9 00 lda #0
2861 F83440 20 98 3D jsr _MovMem2A
Tue Jul 17 11:00:16 2018 Page 6
2862
2863 F83443 A0 20 ldy #$20 ; FAC = .0001
2864 F83445 A9 00 lda #0
2865 F83447 EB xba
2866 F83448 A9 30 lda #$30
2867 F8344A 20 62 3D jsr _MovMem2F
2868 F8344D 20 30 3A jsr _feDIV ; FAC=ARG/FAC
2869 F83450 00 00 brk
2870
2871 F83452 A0 20 ldy #$20 ; ARG = 1.0001
2872 F83454 A9 00 lda #0
2873 F83456 EB xba
2874 F83457 A9 10 lda #$10
2875 F83459 20 98 3D jsr _MovMem2A
2876 F8345C 20 FE 36 jsr _feSUB ; FAC=ARG-FAC
2877 F8345F A0 20 ldy #$20
2878 F83461 A9 00 lda #0
2879 F83463 EB xba
2880 F83464 A9 40 lda #$40
2881 F83466 20 26 3D jsr _MovRF2Mem
2882
2883 F83469 A0 20 ldy #$20 ; FAC = 0.9999
2884 F8346B A9 00 lda #0
2885 F8346D EB xba
2886 F8346E A9 20 lda #$20
2887 F83470 20 62 3D jsr _MovMem2F
2888 F83473
2889 F83473 A0 20 ldy #$20 ; ARG = 1.0
2890 F83475 A9 00 lda #0
2891 F83477 EB xba
2892 F83478 A9 00 lda #$00
2893 F8347A 20 98 3D jsr _MovMem2A
2894 F8347D 20 FE 36 jsr _feSUB ; FAC=ARG-FAC
2895 F83480 A0 20 ldy #$20
2896 F83482 A9 00 lda #0
2897 F83484 EB xba
2898 F83485 A9 50 lda #$50
2899 F83487 20 26 3D jsr _MovRF2Mem
2900
2901 F8348A A0 20 ldy #$20 ; FAC = 1.0
2902 F8348C A9 00 lda #0
2903 F8348E EB xba
2904 F8348F A9 00 lda #0
2905 F83491 20 62 3D jsr _MovMem2F
2906 F83494
2907 F83494 A0 20 ldy #$20 ; ARG = 0.0001
2908 F83496 A9 00 lda #0
2909 F83498 EB xba
2910 F83499 A9 30 lda #$30
2911 F8349B 20 98 3D jsr _MovMem2A
2912 F8349E 20 04 37 jsr _feADD ; FAC=ARG+FAC
2913 F834A1 A0 20 ldy #$20
2914 F834A3 A9 00 lda #0
2915 F834A5 EB xba
2916 F834A6 A9 60 lda #$60
2917 F834A8 20 26 3D jsr _MovRF2Mem
2918
Tue Jul 17 11:00:16 2018 Page 7
2919 F834AB A9 36 lda #>?120 ; 0.0001
2920 F834AD EB xba
2921 F834AE A9 4B lda #<?120
2922 F834B0 A2 F8 ldx #^?120
2923 F834B2 20 5A 3F jsr _Str2Fl
2924 F834B5 A0 20 ldy #$20
2925 F834B7 A9 00 lda #0
2926 F834B9 EB xba
2927 F834BA A9 70 lda #$70
2928 F834BC 20 26 3D jsr _MovRF2Mem
2929
2930 F834BF A0 20 ldy #$20 ; FAC = 1.0
2931 F834C1 A9 00 lda #0
2932 F834C3 EB xba
2933 F834C4 A9 00 lda #0
2934 F834C6 20 62 3D jsr _MovMem2F
2935 F834C9 A0 20 ldy #$20 ; ARG = 1.0001
2936 F834CB A9 00 lda #0
2937 F834CD EB xba
2938 F834CE A9 10 lda #$10
2939 F834D0 20 98 3D jsr _MovMem2A
2940 F834D3 20 04 37 jsr _feADD ; FAC=ARG+FAC
2941 F834D6 A0 20 ldy #$20
2942 F834D8 A9 00 lda #0
2943 F834DA EB xba
2944 F834DB A9 80 lda #$80
2945 F834DD 20 26 3D jsr _MovRF2Mem
2946
2947 F834E0 A9 20 lda #$20
2948 F834E2 48 pha
2949 F834E3 F4 30 00 pea #$0030
2950 F834E6 4B phk
2951 F834E7 F4 52 36 pea #?200
2952 F834EA A9 07 lda #7
2953 F834EC 48 pha
2954 F834ED BPRINTF
2955 F834ED 02 11 cop $11
2956 .MNLIST
2957 F834EF A9 20 lda #$20
2958 F834F1 48 pha
2959 F834F2 F4 40 00 pea #$0040
2960 F834F5 4B phk
2961 F834F6 F4 52 36 pea #?200
2962 F834F9 A9 07 lda #7
2963 F834FB 48 pha
2964 F834FC BPRINTF
2965 F834FC 02 11 cop $11
2966 .MNLIST
2967 F834FE A9 20 lda #$20
2968 F83500 48 pha
2969 F83501 F4 50 00 pea #$0050
2970 F83504 4B phk
2971 F83505 F4 52 36 pea #?200
2972 F83508 A9 07 lda #7
2973 F8350A 48 pha
2974 F8350B BPRINTF
2975 F8350B 02 11 cop $11
Tue Jul 17 11:00:16 2018 Page 8
2976 .MNLIST
2977
2978 F8350D A9 20 lda #$20
2979 F8350F 48 pha
2980 F83510 F4 30 00 pea #$0030
2981 F83513 4B phk
2982 F83514 F4 5A 36 pea #?210
2983 F83517 A9 07 lda #7
2984 F83519 48 pha
2985 F8351A BPRINTF
2986 F8351A 02 11 cop $11
2987 .MNLIST
2988 F8351C A9 20 lda #$20
2989 F8351E 48 pha
2990 F8351F F4 40 00 pea #$0040
2991 F83522 4B phk
2992 F83523 F4 5A 36 pea #?210
2993 F83526 A9 07 lda #7
2994 F83528 48 pha
2995 F83529 BPRINTF
2996 F83529 02 11 cop $11
2997 .MNLIST
2998 F8352B A9 20 lda #$20
2999 F8352D 48 pha
3000 F8352E F4 50 00 pea #$0050
3001 F83531 4B phk
3002 F83532 F4 5A 36 pea #?210
3003 F83535 A9 07 lda #7
3004 F83537 48 pha
3005 F83538 BPRINTF
3006 F83538 02 11 cop $11
3007 .MNLIST
3008
3009 F8353A A9 36 lda #>?305
3010 F8353C EB xba
3011 F8353D A9 76 lda #<?305
3012 F8353F A2 F8 ldx #^?305
3013 F83541 20 5A 3F jsr _Str2Fl
3014 F83544 A0 20 ldy #$20
3015 F83546 A9 00 lda #0
3016 F83548 EB xba
3017 F83549 A9 90 lda #$90
3018 F8354B 20 26 3D jsr _MovRF2Mem
3019
3020 F8354E A9 36 lda #>?300
3021 F83550 EB xba
3022 F83551 A9 62 lda #<?300
3023 F83553 A2 F8 ldx #^?300
3024 F83555 20 5A 3F jsr _Str2Fl
3025 F83558 A0 20 ldy #$20
3026 F8355A A9 00 lda #0
3027 F8355C EB xba
3028 F8355D A9 A0 lda #$A0
3029 F8355F 20 26 3D jsr _MovRF2Mem
3030 F83562 A0 20 ldy #$20
3031 F83564 A9 00 lda #0
3032 F83566 EB xba
Tue Jul 17 11:00:16 2018 Page 9
3033 F83567 A9 90 lda #$90
3034 F83569 20 20 3A jsr _feDIVRM
3035 F8356C A0 20 ldy #$20
3036 F8356E A9 00 lda #0
3037 F83570 EB xba
3038 F83571 A9 B0 lda #$B0
3039 F83573 20 26 3D jsr _MovRF2Mem
3040 F83576 A9 20 lda #$20
3041 F83578 48 pha
3042 F83579 F4 B0 00 pea #$00B0
3043 F8357C 4B phk
3044 F8357D F4 5A 36 pea #?210
3045 F83580 A9 07 lda #7
3046 F83582 48 pha
3047 F83583 BPRINTF
3048 F83583 02 11 cop $11
3049 .MNLIST
3050
3051 F83585 A9 36 lda #>?310
3052 F83587 EB xba
3053 F83588 A9 80 lda #<?310
3054 F8358A A2 F8 ldx #^?310
3055 F8358C 20 5A 3F jsr _Str2Fl
3056 F8358F A0 20 ldy #$20
3057 F83591 A9 00 lda #0
3058 F83593 EB xba
3059 F83594 A9 D0 lda #$D0
3060 F83596 20 26 3D jsr _MovRF2Mem
3061 F83599 A0 20 ldy #$20 ; ARG = 1.0
3062 F8359B A9 00 lda #0
3063 F8359D EB xba
3064 F8359E A9 00 lda #$00
3065 F835A0 20 98 3D jsr _MovMem2A
3066 F835A3 20 FE 36 jsr _feSUB ; FAC=ARG-FAC
3067 F835A6 A0 20 ldy #$20
3068 F835A8 A9 00 lda #0
3069 F835AA EB xba
3070 F835AB A9 C0 lda #$C0
3071 F835AD 20 26 3D jsr _MovRF2Mem
3072 F835B0 A9 20 lda #$20
3073 F835B2 48 pha
3074 F835B3 F4 C0 00 pea #$00C0
3075 F835B6 4B phk
3076 F835B7 F4 5A 36 pea #?210
3077 F835BA A9 07 lda #7
3078 F835BC 48 pha
3079 F835BD BPRINTF
3080 F835BD 02 11 cop $11
3081 .MNLIST
3082
3083 F835BF A9 36 lda #>?320
3084 F835C1 EB xba
3085 F835C2 A9 94 lda #<?320
3086 F835C4 A2 F8 ldx #^?320
3087 F835C6 20 5A 3F jsr _Str2Fl
3088 F835C9 A0 20 ldy #$20
3089 F835CB A9 00 lda #0
Tue Jul 17 11:00:16 2018 Page 10
3090 F835CD EB xba
3091 F835CE A9 E0 lda #$E0
3092 F835D0 20 26 3D jsr _MovRF2Mem
3093 F835D3 A9 36 lda #>?325
3094 F835D5 EB xba
3095 F835D6 A9 88 lda #<?325
3096 F835D8 A2 F8 ldx #^?325
3097 F835DA 20 5A 3F jsr _Str2Fl
3098 F835DD A0 20 ldy #$20
3099 F835DF A9 00 lda #0
3100 F835E1 EB xba
3101 F835E2 A9 F0 lda #$F0
3102 F835E4 20 26 3D jsr _MovRF2Mem
3103 F835E7 A0 20 ldy #$20 ; ARG = 1.0
3104 F835E9 A9 00 lda #0
3105 F835EB EB xba
3106 F835EC A9 E0 lda #$E0
3107 F835EE 20 98 3D jsr _MovMem2A
3108 F835F1 20 04 37 jsr _feADD
3109 F835F4 A0 20 ldy #$20
3110 F835F6 A9 01 lda #1
3111 F835F8 EB xba
3112 F835F9 A9 00 lda #$00
3113 F835FB 20 26 3D jsr _MovRF2Mem
3114
3115 F835FE 4B phk
3116 F835FF F4 B4 36 pea #?420
3117 F83602 4B phk
3118 F83603 F4 5A 36 pea #?210
3119 F83606 A9 07 lda #7
3120 F83608 48 pha
3121 F83609 BPRINTF
3122 F83609 02 11 cop $11
3123 .MNLIST
3124
3125 F8360B 4B phk
3126 F8360C F4 BE 36 pea #?425
3127 F8360F 4B phk
3128 F83610 F4 5A 36 pea #?210
3129 F83613 A9 07 lda #7
3130 F83615 48 pha
3131 F83616 BPRINTF
3132 F83616 02 11 cop $11
3133 .MNLIST
3134
3135 F83618 4B phk
3136 F83619 F4 C8 36 pea #?430
3137 F8361C 4B phk
3138 F8361D F4 5A 36 pea #?210
3139 F83620 A9 07 lda #7
3140 F83622 48 pha
3141 F83623 BPRINTF
3142 F83623 02 11 cop $11
3143 .MNLIST
3144 F83625
3145 F83625 2B pld
3146 F83626 AB plb
Tue Jul 17 11:00:16 2018 Page 11
3147 F83627 00 00 brk
3148 F83629
3149 F83629 31 2E 30 00 ?100: .DB '1.0', 0
3150 ;?105: .DB '1.0001', 0
3151 ;?110: .DB '0.9999', 0
3152 ;?115: .DB '0.0001', 0
3153
3154 F8362D 31 2E 30 30 30 ?105: .DB '1.0000001', 0
30 30 30 31 00
3155 F83637 30 2E 39 39 39 ?110: .DB '0.9999999', 0
39 39 39 39 00
3156 F83641 30 2E 30 30 30 ?115: .DB '0.0000001', 0
30 30 30 31 00
3157
3158 F8364B 32 2E 30 30 30 ?120: .DB '2.0001', 0
31 00
3159 F83652 0D 25 32 2E 31 ?200: .DB 13, '%2.16f', 0
36 66 00
3160 F8365A 0D 25 31 2E 32 ?210: .DB 13, '%1.20e', 0
30 65 00
3161
3162 F83662 38 34 35 2E 37 ?300: .DB '845.782345177785467',0
38 32 33 34 35
31 37 37 37 38
35 34 36 37 00
3163 F83676 31 37 2E 31 37 ?305: .DB '17.171779',0
31 37 37 39 00
3164 F83680 31 2E 30 65 2D ?310: .DB '1.0e-17',0
31 37 00
3165
3166 ;?320: .DB '3.645e-4951',0
3167 F83688 33 2E 36 34 35 ?325: .DB '3.645e-4941',0
65 2D 34 39 34
31 00
3168 F83694 33 2E 33 36 32 ?320: .DB '3.362e-4932',0
65 2D 34 39 33
32 00
3169
3170 F836A0 BD 7F 18 F6 D1 ?400: .DB $BD, $7F, $18, $F6, $d1, $8e, $7d, $94, $e4, $0a
8E 7D 94 E4 0A
3171 F836AA 76 CB E2 7B C2 ?410: .DB $76, $cb, $e2, $7b, $c2, $5e, $1e, $ff, $ff, $4a
5E 1E FF FF 4A
3172 F836B4 FF FF FF FF FF ?420: .DB $ff, $ff, $ff, $ff, $ff, $ff, $ff, $7f, $01, $00
FF FF 7F 01 00
3173 F836BE 00 00 00 00 00 ?425: .DB $00, $00, $00, $00, $00, $00, $00, $80, $ff, $00
00 00 80 FF 00
3174 F836C8 FF FF FF 00 00 ?430: .DB $ff, $ff, $ff, $00, $00, $00, $00, $00, $01, $00
00 00 00 01 00
3175 F836D2 00 00 00 00 00 ?510: .DB $00, $00, $00, $00, $00, $00, $00, $88, $ff, $3f
00 00 88 FF 3F
3176 ;?510: .DB $ff, $ff, $ff, $ff, $00, $ff, $ff, $ff, $ff, $3f
3177 F836DC 00 00 00 00 00 ?500: .DB $00, $00, $00, $00, $00, $00, $00, $E0, $ff, $3f
00 00 E0 FF 3F
3178
3179 ;?610: .DB $00, $00, $00, $00, $00, $00, $00, $00, $00, $88, $ff, $3f
3180 ;?600: .DB $00, $00, $00, $00, $00, $00, $00, $00, $00, $E0, $ff, $3f
3181
Tue Jul 17 11:00:16 2018 Page 12
3182 ;?610: .DB $00, $00, $00,$00,$00,$04,$BF,$C9,$1B,$8E,$34,$40 ; 1E16
3183
3184 F836E6 00 00 00 B4 57 ?600: .DB $00,$00,$00,$B4,$57,$0A,$3F,$16,$68,$A9,$4B,$40 ; 1E23
0A 3F 16 68 A9
4B 40
3185 F836F2 00 00 00 00 00 ?610: .DB $00,$00,$00,$00,$00,$00,$00,$00,$00,$A0,$02,$40
00 00 00 00 A0
02 40
3186
3187
3188 ;; $00,$00,$00,$A1,$ED,$CC,$CE,$1B,$C2,$D3,$4E,$40 ; 1E24
3189 ;; $00,$00,$00,$B4,$57,$0A,$3F,$16,$68,$A9,$4B,$40 ; 1E23
3190
3191 ;; rounded
3192 ;; $20,$F0,$9D,$B5,$70,$2B,$A8,$AD,$C5,$9D,$69,$40 ; 1E32
3193 ;; $BF,$3C,$D5,$A6,$CF,$FF,$49,$1F,$78,$C2,$D3,$40 ; 1E64
3194 ;; $6F,$C6,$DF,$8C,$E9,$80,$C9,$47,$BA,$93,$A8,$41 ; 1E128
3195 ;; $BB,$DD,$8D,$DE,$F9,$9D,$FB,$EB,$7E,$AA,$51,$43 ; 1E256
3196 ;; $64,$CC,$C6,$91,$0E,$A6,$AE,$A0,$19,$E3,$A3,$46 ; 1E512
3197 ;; $0B,$65,$17,$0C,$75,$81,$86,$75,$76,$C9,$48,$4D ; 1E1024
3198 ;; $4A,$A7,$E4,$5D,$3D,$C5,$5D,$3B,$8B,$9E,$92,$5A ; 1E2048
3199 ;; $44,$C9,$9A,$97,$20,$8A,$02,$52,$60,$C4,$25,$75 ; 1E4096
3200
3201 ;; not rounded
3202 ;; $00,$00,$20,$F0,$9D,$B5,$70,$2B,$A8,$AD,$C5,$9D,$69,$40 ; 1E32
3203 ;; $70,$6B,$BF,$3C,$D5,$A6,$CF,$FF,$49,$1F,$78,$C2,$D3,$40 ; 1E64
3204 ;; $69,$33,$6F,$C6,$DF,$8C,$E9,$80,$C9,$47,$BA,$93,$A8,$41 ; 1E128
3205 ;; $14,$90,$BB,$DD,$8D,$DE,$F9,$9D,$FB,$EB,$7E,$AA,$51,$43 ; 1E256
3206 ;; $40,$5C,$65,$CC,$C6,$91,$0E,$A6,$AE,$A0,$19,$E3,$A3,$46 ; 1E512
3207 ;; $04,$3D,$0D,$65,$17,$0C,$75,$81,$86,$75,$76,$C9,$48,$4D ; 1E1024
3208 ;; $94,$28,$4D,$A7,$E4,$5D,$3D,$C5,$5D,$3B,$8B,$9E,$92,$5A ; 1E2048
3209 ;; $AE,$14,$4C,$C9,$9A,$97,$20,$8A,$02,$52,$60,$C4,$25,$75 ; 1E4096
3210
3211 ;FCon1E8: .DB $00,$00,$00,$00,$00,$20,$BC,$BE,$19,$40 ; 1E8
3212 ;FCon1E16: .DB $00,$00,$00,$04,$BF,$C9,$1B,$8E,$34,$40 ; 1E16
3213 ;FCon1E32: .DB $9E,$B5,$70,$2B,$A8,$AD,$C5,$9D,$69,$40 ; 1E32
3214 ;FCon1E64: .DB $D5,$A6,$CF,$FF,$49,$1F,$78,$C2,$D3,$40 ; 1E64
3215 ;FCon1E128: .DB $DF,$8C,$E9,$80,$C9,$47,$BA,$93,$A8,$41 ; 1E128
3216 ;FCon1E256: .DB $8C,$DE,$F9,$9D,$FB,$EB,$7E,$AA,$51,$43 ; 1E256
3217 ;FCon1E512: .DB $C2,$91,$0E,$A6,$AE,$A0,$19,$E3,$A3,$46 ; 1E512
3218 ;FCon1E1024: .DB $0F,$0C,$75,$81,$86,$75,$76,$C9,$48,$4D ; 1E1024
3219 ;FCon1E2048: .DB $D7,$5D,$3D,$C5,$5D,$3B,$8B,$9E,$92,$5A ; 1E2048
3220 ;FCon1E4096: .DB $79,$97,$20,$8A,$02,$52,$60,$C4,$25,$75 ; 1E4096
3221
3222 ;; .DB $00, $00, $00, $A1, $ED, $CC, $CE, $1B, $C2, $D3, $00 ; +1E24
3223 ;; .DB $00, $00, $80, $09, $B5, $1E, $38, $FD, $D2, $EA, $FF ; -1E23
3224 ;; .DB $00, $00, $40, $B2, $BA, $C9, $E0, $19, $1E, $02, $00 ; +1E22
3225 ;; .DB $00, $00, $60, $21, $3A, $52, $36, $CA, $C9, $FF, $FF ; -1E21
3226 ;; .DB $00, $00, $10, $63, $2D, $5E, $C7, $6B, $05, $00, $00 ; +1E20
3227 ;;CONSTDECTBL:
3228 ;; .DB $00, $00, $18, $76, $FB, $DC, $38, $75, $FF, $FF, $FF ; -1E19
3229 ;;CONSTDECTBL1:
3230 ;; .DB $00, $00, $64, $A7, $B3, $B6, $E0, $0D, $00, $00, $00 ; +1E18
3231 ;; .DB $00, $00, $76, $A2, $87, $BA, $9C, $FE, $FF, $FF, $FF ; -1E17
3232 ;; .DB $00, $00, $C1, $6F, $F2, $86, $23, $00, $00, $00, $00 ; +1E16
3233 ;; .DB $00, $80, $39, $5B, $81, $72, $FC, $FF, $FF, $FF, $FF ; -1E15
3234 ;; .DB $00, $40, $7A, $10, $F3, $5A, $00, $00, $00, $00, $00 ; +1E14
Tue Jul 17 11:00:16 2018 Page 13
3235 ;; .DB $00, $60, $8D, $B1, $E7, $F6, $FF, $FF, $FF, $FF, $FF ; -1E13
3236 ;; .DB $00, $10, $A5, $D4, $E8, $00, $00, $00, $00, $00, $00 ; +1E12
3237 ;; .DB $00, $18, $89, $B7, $E8, $FF, $FF, $FF, $FF, $FF, $FF ; -1E11
3238 ;; .DB $00, $E4, $0B, $54, $02, $00, $00, $00, $00, $00, $00 ; +1E10
3239 ;; .DB $00, $36, $65, $C4, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; -1E9
3240 ;; .DB $00, $E1, $F5, $05, $00, $00, $00, $00, $00, $00, $00 ; +1E8
3241 ;; .DB $80, $69, $67, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; -1E7
3242 ;; .DB $40, $42, $0F, $00, $00, $00, $00, $00, $00, $00, $00 ; +1E6
3243 ;; .DB $60, $79, $FE, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; -1E5
3244 ;; .DB $10, $27, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; +1E4
3245 ;; .DB $18, $FC, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; -1E3
3246 ;; .DB $64, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; +1E2
3247 ;; .DB $F6, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; -1E1
3248 ;; .DB $01, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; +1E0
3249
3250 ;-------------------------------------------------------------
3251 ; _feADD, _feSUB - IMPLEMENTAZIONE ADD - SUB
3252 ;-------------------------------------------------------------
3253
3254 ; _feSUB: esegue sottrazione tra ARG e FAC e pone il risultato in FAC
3255 ; In: FAC, ARG
3256 ; Out: FAC = ARG - FAC
3257 ; CF = 1 se overflow/invalid
3258 ; Uso: A,X,Y,FPWTmp,FACXM,ARGXM
3259 F836FE _feSUB:
3260 F836FE A5 40 LDA FACSGN ; Cambia di segno a FAC
3261 F83700 49 FF EOR #$FF
3262 F83702 85 40 STA FACSGN
3263
3264 ; _feADD: esegue somma di FAC e ARG e pone il risultato in FAC
3265 ; In: FAC, ARG
3266 ; Out: FAC = ARG + FAC
3267 ; CF = 1 se overflow/invalid
3268 ; Uso: A,X,Y,FPWTmp,FACXM,ARGXM
3269 F83704 _feADD:
3270 F83704 20 CF 3A jsr addtst ; test FAC ed ARG e setta confronto segni
3271
3272 ; per eseguire somma/sottrazione e' necessario che
3273 ; FAC ed ARG abbiano lo stesso esponente. Occorre quindi
3274 ; denormalizzare FAC se Exp(ARG) > Exp(FAC), oppure ARG
3275 ; se Exp(FAC) > Exp(ARG)
3276 F83707 A2 51 ?15: LDX #ARG ; X -> ARG (ptr acc# da denormalizzare)
3277 F83709 A4 41 ldy FACEXT ; se si denormalizza ARG vengono usati
3278 F8370B 84 51 sty ARGEXT ; bit di guardia di ARG
3279 F8370D A0 00 ldy #0
3280 F8370F 38 SEC
3281 F83710 ACC16 ; calcola N = Exp(ARG) - Exp(FAC)
3282 F83710 C2 20 rep #PMFLAG
3283 .LONGA on
3284 .MNLIST
3285 F83712 A5 5A lda ARGExp ; C = N = Exp(ARG) - Exp(FAC)
3286 F83714 E5 4A sbc FACExp
3287 F83716 F0 3D BEQ ?30 ; N = 0 => somma mantisse
3288 ; A = 0 = bit di guardia, CF = 1
3289 F83718 90 13 BCC ?18 ; N < 0 => denorm. ARG -> aumenta Exp(ARG)
3290 F8371A
3291 ; N > 0 => denormalizza FAC -> aumenta Exp(FAC)
Tue Jul 17 11:00:16 2018 Page 14
3292 ; a questo punto CF = 1
3293 F8371A 85 5C sta FPWTmp ; salva N (> 0)
3294 F8371C A5 5A LDA ARGExp
3295 F8371E 85 4A STA FACExp ; imposta Exp(FAC) = Exp(ARG)
3296 F83720 A6 50 LDX ARGSGN ; segno di FAC = segno di ARG
3297 F83722 86 40 STX FACSGN ; segno operazione = segno acc. Exp maggiore
3298 F83724 98 tya ; A = B = 0 (C = 0)
3299 F83725 E5 5C SBC FPWTmp ; cambia segno ad N
3300 F83727 84 51 sty ARGEXT ; azzera bit di guardia di ARG
3301 F83729 A2 41 LDX #FAC ; X = puntatore a FAC
3302 F8372B 80 02 bra ?20 ; denormalizza FAC
3303
3304 ?18: ; azzera bit di guardia di FAC - segno operazione = segno FAC
3305 F8372D 84 41 sty FACEXT ; denormalizza ARG
3306
3307 ; X -> puntatore (- 1) acc# (FAC/ARG) da denormalizzare
3308 ; A = -N, numero di shift (negativo) -- ACC16
3309 ; Y = 0
3310 ; Se N < MAXMANTSHIFT la mantissa viene azzerata senza eseguire shift
3311 ; dunque deve essere MAXMANTSHIFT <= N <= FFFF
3312 F8372F C9 B0 FF ?20: cmp #MAXMANTSHIFT
3313 F83732 B0 10 bcs ?23 ; shift mantissa (denormalizza)
3314 F83734 94 00 STY <0,X ; azzera bit di guardia
3315 F83736 74 01 STZ <1,X ; azzera mantissa X (ACC/MEM16)
3316 F83738 74 03 STZ <3,X
3317 F8373A 74 05 STZ <5,X
3318 F8373C 74 07 STZ <7,X
3319 F8373E ACC08
3320 F8373E E2 20 sep #PMFLAG
3321 .LONGA off
3322 .MNLIST
3323 F83740 A5 41 lda FACEXT ; A = bit di guardia
3324 F83742 80 11 BRA ?30 ; esegue somma/sottrazione
3325 F83744
3326 ; a questo punto A = -N => numero di shift mantissa (divisioni x 2)
3327 ; il numero N e' contenuto solo in A (B = $FF) e si imposta ACC08
3328 F83744 ?23: ACC08
3329 F83744 E2 20 sep #PMFLAG
3330 .LONGA off
3331 .MNLIST
3332 F83746 C9 F9 CMP #$F9 ; test N < -7
3333 F83748 10 05 BPL ?25 ; N >= -7, shift bit x bit (CF = 1)
3334 F8374A 20 C8 38 JSR _RShiftXB ; N < -7, shifta byte x byte (CF = 0)
3335 F8374D 80 06 BRA ?30 ; esegue somma/sottrazione
3336 F8374F A8 ?25: TAY ; Y = -N
3337 F83750 A5 41 LDA FACEXT ; A = bit di guardia
3338 F83752 20 D5 38 JSR _RShiftXN ; shift bit x bit (CF = 0)
3339
3340 ; ora gli esponenti di FAC ed ARG sono uguali
3341 ; CF = 0 se FAC o ARG denormalizzato
3342 ; CF = 1 se FAC e ARG hanno lo stesso esponente
3343 ; A = bits di guardia (= 0 se FAC e ARG stesso esponente)
3344 F83755 ?30: ACC08
3345 F83755 E2 20 sep #PMFLAG
3346 .LONGA off
3347 .MNLIST
3348 F83757 24 4C BIT FACSCMP ; se FAC ed ARG hanno segni discordi
Tue Jul 17 11:00:16 2018 Page 15
3349 F83759 30 42 BMI _subm ; esegue sottrazione mantisse
3350 F8375B
3351 ; segni concordi, addiziona mantisse con CF
3352 F8375B 18 clc
3353 F8375C 65 51 ADC ARGEXT
3354 F8375E 85 41 STA FACEXT
3355 F83760 ACC16
3356 F83760 C2 20 rep #PMFLAG
3357 .LONGA on
3358 .MNLIST
3359 F83762 A5 42 LDA FAC+1
3360 F83764 65 52 ADC ARG+1
3361 F83766 85 42 STA FAC+1
3362 F83768 A5 44 LDA FAC+3
3363 F8376A 65 54 ADC ARG+3
3364 F8376C 85 44 STA FAC+3
3365 F8376E A5 46 LDA FAC+5
3366 F83770 65 56 ADC ARG+5
3367 F83772 85 46 STA FAC+5
3368 F83774 A5 48 LDA FAC+7
3369 F83776 65 58 ADC ARG+7
3370 F83778 85 48 STA FAC+7
3371 F8377A ACC08
3372 F8377A E2 20 sep #PMFLAG
3373 .LONGA off
3374 .MNLIST
3375 F8377C 90 5B BCC _Normalize ; OK, no overflow
3376
3377 ; Incrementa esponente di FAC e shifta a destra la mantissa
3378 ; per impostare il primo bit della mantissa ad 1 (normalizza).
3379 ; Il bit meno significativo viene ruotato nei bits di guardia
3380 ; in caso di overflow imposta FAC = INF ed esce con CF = 1
3381 ; in caso di risultato corretto esce con CF = 0
3382
3383 F8377E _IncEXP:
3384 F8377E ACC16
3385 F8377E C2 20 rep #PMFLAG
3386 .LONGA on
3387 .MNLIST
3388 F83780 A5 4A lda FACExp
3389 F83782 1A inc a ; incrementa esponente
3390 F83783 85 4A sta FACExp
3391 F83785 C9 FF 7F cmp #EXPINF ; test overflow
3392 F83788 90 03 bcc ?04 ; OK
3393 F8378A 4C 75 3B jmp _feLDINF1 ; overflow => FAC = =/- INF
3394 F8378D 38 ?04: SEC ; imposta MSB bit = 1
3395 F8378E 66 48 ROR FAC+7 ; shift a destra della mantissa
3396 F83790 66 46 ROR FAC+5
3397 F83792 66 44 ROR FAC+3
3398 F83794 66 42 ROR FAC+1
3399 F83796 ACC08
3400 F83796 E2 20 sep #PMFLAG
3401 .LONGA off
3402 .MNLIST
3403 F83798 66 41 ROR FACEXT ; salva LSB nei bits di guardia
3404 F8379A 4C FF 3B jmp _feXAM ; OK -- return flag
3405
Tue Jul 17 11:00:16 2018 Page 16
3406 ; segni discordi => sub mantisse
3407 F8379D _subm:
3408 F8379D 08 php ; salva CF
3409 F8379E A0 41 LDY #FAC
3410 F837A0 E0 51 CPX #ARG
3411 F837A2 F0 02 BEQ ?36 ; FAC(Y) - ARG(X)
3412 F837A4 A0 51 LDY #ARG ; ARG(Y) - FAC(X)
3413 ; X = puntatore mantissa 1
3414 ; Y = puntatore mantissa 2
3415 ; FAC = ACC(Y) - ACC(X)
3416 ; A = bit di guardia
3417 F837A6 28 ?36: plp
3418 F837A7 B0 03 bcs ?36b
3419 F837A9 38 sec
3420 F837AA B0 01 bcs ?36c
3421 F837AC 18 ?36b: clc
3422 F837AD ?36c:
3423 F837AD 38 SEC ; -A + ARGEXT
3424 F837AE 49 FF EOR #$FF
3425 F837B0 65 51 ADC ARGEXT
3426 F837B2 85 41 STA FACEXT
3427 F837B4 ACC16
3428 F837B4 C2 20 rep #PMFLAG
3429 .LONGA on
3430 .MNLIST
3431 F837B6 B9 01 02 LDA DP02ADDR+1,Y
3432 F837B9 F5 01 SBC <1,X
3433 F837BB 85 42 STA FAC+1
3434 F837BD B9 03 02 LDA DP02ADDR+3,Y
3435 F837C0 F5 03 SBC <3,X
3436 F837C2 85 44 STA FAC+3
3437 F837C4 B9 05 02 LDA DP02ADDR+5,Y
3438 F837C7 F5 05 SBC <5,X
3439 F837C9 85 46 STA FAC+5
3440 F837CB B9 07 02 LDA DP02ADDR+7,Y
3441 F837CE F5 07 SBC <7,X
3442 F837D0 85 48 STA FAC+7
3443 F837D2 ACC08
3444 F837D2 E2 20 sep #PMFLAG
3445 .LONGA off
3446 .MNLIST
3447 F837D4 B0 03 BCS _Normalize ; OK => normalizza FAC
3448 F837D6 20 65 38 JSR _NegateFAC ; CF = 0 => complementa FAC
3449 ; in quanto il risultato cambia segno
3450 ; ????
3451 ;beq _IncEXP ; MSB = 0 => incrementa exp e normalizza
3452
3453 ; Normalizza FAC
3454 ; In: FAC
3455 ; Out: FAC normalizzato oppure denormalizzato
3456 ; Uso: A,X,Y,FPWTmp
3457 ; Nota: Esegue N shift della mantissa a sinistra e
3458 ; decrementa esponente di N volte fino ad avere
3459 ; la mantissa con MSB = 1 oppure fino ad avere
3460 ; esponente nullo (numero denormalizzato)
3461 F837D9 _Normalize:
3462 F837D9 ACC16
Tue Jul 17 11:00:16 2018 Page 17
3463 F837D9 C2 20 rep #PMFLAG
3464 .LONGA on
3465 .MNLIST
3466 F837DB A5 4A lda FACExp ; C = FACExp
3467 F837DD F0 5C beq ?12 ; esponente nullo => fine
3468 F837DF 38 sec
3469 F837E0 A0 09 ldy #9 ; max. cicli byte-shift
3470 F837E2 A6 49 ?02: LDX FAC+8
3471 F837E4 D0 4C BNE ?08 ; shift bit x bit
3472 F837E6 E9 08 00 sbc #8 ; possibili 8 shift ?
3473 F837E9 90 30 bcc ?04 ; no => shift bit x bit
3474 F837EB A6 48 LDX FAC+7 ; left shift byte x byte
3475 F837ED 86 49 STX FAC+8
3476 F837EF A6 47 LDX FAC+6
3477 F837F1 86 48 STX FAC+7
3478 F837F3 A6 46 LDX FAC+5
3479 F837F5 86 47 STX FAC+6
3480 F837F7 A6 45 LDX FAC+4
3481 F837F9 86 46 STX FAC+5
3482 F837FB A6 44 LDX FAC+3
3483 F837FD 86 45 STX FAC+4
3484 F837FF A6 43 LDX FAC+2
3485 F83801 86 44 STX FAC+3
3486 F83803 A6 42 LDX FAC+1
3487 F83805 86 43 STX FAC+2
3488 F83807 A6 41 LDX FACEXT
3489 F83809 86 42 STX FAC+1
3490 F8380B A2 00 ldx #0
3491 F8380D 86 41 STX FACEXT ; azzera bit di guardia
3492 F8380F 88 dey
3493 F83810 D0 D0 bne ?02 ; loop
3494 F83812
3495 ; a questo punto la mantissa e' azzerata e ZF = 1 => FAC = 0
3496 F83812 64 4A stz FACExp ; mantissa ed esponente azzerati => FAC = 0
3497 F83814 ACC08
3498 F83814 E2 20 sep #PMFLAG
3499 .LONGA off
3500 .MNLIST
3501 F83816 64 40 stz FACSGN
3502 F83818 18 clc
3503 F83819 B8 clv ; esce con ZF = 1, CF = 0, VF = 0, NF = 0
3504 F8381A 60 rts
3505
3506 ?04: ; shift bit a bit: ripristina C (esponente) -- CF = 1
3507 LONGA on ; qui ACC16
3508 F8381B 69 08 00 adc #8
3509 F8381E
3510 ?06: ; shift 1 bit a sinistra della mantissa FAC
3511 ; C = FACExp (> 0)
3512 LONGA on ; qui ACC16
3513 ;cmp #0
3514 F8381E C9 01 00 cmp #1
3515 F83821 F0 11 beq ?10 ; esponente azzerato => fine
3516 F83823 3A dec a ; decrementa esponente
3517 F83824 ACC08
3518 F83824 E2 20 sep #PMFLAG
3519 .LONGA off
Tue Jul 17 11:00:16 2018 Page 18
3520 .MNLIST
3521 F83826 06 41 ASL FACEXT ; shift a sinistra di 1 bit
3522 F83828 ACC16
3523 F83828 C2 20 rep #PMFLAG
3524 .LONGA on
3525 .MNLIST
3526 F8382A 26 42 ROL FAC+1
3527 F8382C 26 44 ROL FAC+3
3528 F8382E 26 46 ROL FAC+5
3529 F83830 26 48 ROL FAC+7
3530 F83832 10 EA ?08: bpl ?06 ; MSB = 0 => continua shift
3531 F83834 C9 FF 7F ?10: cmp #EXPINF ; test overflow
3532 F83837 B0 07 bcs ?14 ; overflow
3533 F83839 85 4A sta FACExp ; salva nuovo esponente
3534 F8383B ?12: ACC08
3535 F8383B E2 20 sep #PMFLAG
3536 .LONGA off
3537 .MNLIST
3538 F8383D 4C FF 3B jmp _feXAM
3539 F83840 4C 75 3B ?14: jmp _feLDINF1
3540
3541 ; Arrotonda FAC secondo i bit di guardia
3542 ; Puo' generare overflow
3543 F83843 _Round:
3544 F83843 20 FF 3B jsr _feXAM
3545 F83846 B0 14 bcs ?03 ; FAC non valido
3546 F83848 F0 02 BEQ ?01 ; FAC = 0 -> esce
3547 F8384A 06 41 ASL FACEXT ; bit di guardia = 0
3548 F8384C 64 41 ?01: stz FACEXT
3549 F8384E 90 0C BCC ?03 ; non necessita di arrotondamento
3550 F83850 20 8F 38 JSR _IncFACM ; incrementa mantissa
3551 F83853 D0 06 bne ?02 ; no overflow -- OK
3552 F83855 20 7E 37 jsr _IncEXP ; riporto MSB, incrementa esponente
3553 F83858 64 41 stz FACEXT
3554 F8385A 60 rts ; flag come ritornato da _IncEXP
3555 F8385B 18 ?02: clc
3556 F8385C 60 ?03: RTS
3557
3558 ; arrotanda FAC e in caso di eccezione scarta un indirizzo di ritorno
3559 F8385D _RoundSkp:
3560 F8385D 20 43 38 JSR _Round
3561 F83860 90 02 BCC ?01
3562 F83862 68 PLA
3563 F83863 68 PLA
3564 F83864 60 ?01: RTS
3565 F83865
3566 ; Complemento a 2 di FAC
3567 ; In: FAC
3568 ; Out: FAC 2's
3569 ; ZF = 0 (non-zero), risultato OK
3570 ; ZF = 1 (zero), OVERFLOW Mantissa
3571 ; Uso: A
3572 ; Note:
3573 F83865 _NegateFAC:
3574 F83865 A5 40 LDA FACSGN
3575 F83867 49 FF EOR #$FF
3576 F83869 85 40 STA FACSGN
Tue Jul 17 11:00:16 2018 Page 19
3577
3578 ; Complemento a 2 MANTISSA FAC
3579 ; In: FAC
3580 ; Out: MANTISSA FAC 2's
3581 ; ZF = 0 (non-zero), risultato OK
3582 ; ZF = 1 (zero), OVERFLOW Mantissa
3583 ; Uso: A, X
3584 ; Note:
3585 F8386B _NegateFACM:
3586 F8386B CPU16
3587 F8386B C2 30 rep #(PMFLAG.OR.PXFLAG)
3588 .LONGA on
3589 .LONGI on
3590 .MNLIST
3591 F8386D A2 FF FF ldx #$FFFF
3592 F83870 8A txa
3593 F83871 45 42 eor FAC+1
3594 F83873 85 42 STA FAC+1
3595 F83875 8A txa
3596 F83876 45 44 eor FAC+3
3597 F83878 85 44 STA FAC+3
3598 F8387A 8A txa
3599 F8387B 45 46 eor FAC+5
3600 F8387D 85 46 STA FAC+5
3601 F8387F 8A txa
3602 F83880 45 48 eor FAC+7
3603 F83882 85 48 STA FAC+7
3604 F83884 CPU08
3605 F83884 E2 30 sep #(PMFLAG.OR.PXFLAG)
3606 .LONGA off
3607 .LONGI off
3608 .MNLIST
3609 F83886 8A txa
3610 F83887 45 41 eor FACEXT
3611 F83889 85 41 STA FACEXT
3612 F8388B E6 41 INC FACEXT
3613 F8388D D0 12 BNE _RTS2
3614 F8388F
3615 ; Incrementa MANTISSA FAC
3616 ; In: FAC
3617 ; Out: MANTISSA FAC + 1
3618 ; ZF = 0 (non-zero), risultato OK
3619 ; ZF = 1 (zero), OVERFLOW Mantissa
3620 ; Uso: A
3621 ; Note:
3622 F8388F _IncFACM:
3623 F8388F ACC16
3624 F8388F C2 20 rep #PMFLAG
3625 .LONGA on
3626 .MNLIST
3627 F83891 E6 42 INC FAC+1
3628 F83893 D0 0A BNE ?02
3629 F83895 E6 44 INC FAC+3
3630 F83897 D0 06 BNE ?02
3631 F83899 E6 46 INC FAC+5
3632 F8389B D0 02 BNE ?02
3633 F8389D E6 48 INC FAC+7
Tue Jul 17 11:00:16 2018 Page 20
3634 F8389F ?02: ACC08
3635 F8389F E2 20 sep #PMFLAG
3636 .LONGA off
3637 .MNLIST
3638 F838A1 60 _RTS2: RTS
3639
3640 ; Esegue shift a destra di 8 bits della mantissa temporanea FOP
3641 ; In: A = -N (numero di bit residui da shiftare)
3642 ; Out: A = bits di guardia
3643 ; Y = 0
3644 ; CF = 0
3645 ; Uso: A,X,Y
3646 ; Note: Chiamata solo per shift a destra di 1 byte
3647 F838A2 _RShiftFOP:
3648 F838A2 A2 31 LDX #(FOP-1)
3649
3650 ; Esegue shift a destra di 8 bits della mantissa indicizzata da X
3651 ; In: A = -N (numero di bit residui da shiftare)
3652 ; X = puntatore - 1 alla mantissa
3653 ; Uso: A,X,Y
3654 ; Note: Chiamata solo per shift a destra di 1 byte
3655 F838A4 _RShiftX8:
3656 F838A4 B4 01 LDY <1,X ; shifta a destra di 8 bit
3657 F838A6 84 41 STY FACEXT ; utilizzando i bits di guardia
3658 F838A8 B4 02 LDY <2,X
3659 F838AA 94 01 STY <1,X
3660 F838AC B4 03 LDY <3,X
3661 F838AE 94 02 STY <2,X
3662 F838B0 B4 04 LDY <4,X
3663 F838B2 94 03 STY <3,X
3664 F838B4 B4 05 LDY <5,X
3665 F838B6 94 04 STY <4,X
3666 F838B8 B4 06 LDY <6,X
3667 F838BA 94 05 STY <5,X
3668 F838BC B4 07 LDY <7,X
3669 F838BE 94 06 STY <6,X
3670 F838C0 B4 08 LDY <8,X
3671 F838C2 94 07 STY <7,X
3672 F838C4 A0 00 LDY #0 ; byte MSB = 0
3673 F838C6 94 08 STY <8,X
3674 F838C8
3675 ; ora shifta bit residui
3676
3677 ; Esegue shift a destra di N bits della mantissa indicizzata da X
3678 ; In: A = -N (numero di bit da shiftare negativo)
3679 ; X = puntatore - 1 alla mantissa
3680 ; CF = 0
3681 ; Out: A = bits di guardia
3682 ; Y = 0
3683 ; CF = 0
3684 ; Uso: A,X,Y
3685 ; Note: main entry per shift a destra
3686 F838C8 _RShiftXB:
3687 F838C8 69 08 ADC #$08 ; numero residuo di bits
3688 F838CA 30 D8 BMI _RShiftX8 ; CF = 0, N > 8, shifta byte per byte
3689 F838CC F0 D6 BEQ _RShiftX8 ; CF = 1, N = 8, shifta byte per byte
3690 F838CE
Tue Jul 17 11:00:16 2018 Page 21
3691 ; se A = F8 (-8) arriva qui con A = 9 e CF = 0
3692 ; ae arriva qui allora N < 8, CF = 1 -- shift bit a bit
3693 ; ripristina A
3694 F838CE E9 08 SBC #$08 ; se N < 8 => CF = 0, se N >= 0 => CF = 1
3695 F838D0 A8 TAY ; shifta Y bits a destra
3696 F838D1 A5 41 LDA FACEXT
3697 F838D3 B0 12 BCS _RTS3 ; fine shift
3698 F838D5
3699 ; Esegue shift a destra di N (<8) bits della mantissa indicizzata da X
3700 ; In: Y = -N (numero di bit da shiftare negativo)
3701 ; X = puntatore - 1 alla mantissa
3702 ; A = bits di guardia
3703 ; Out: A = bits di guardia
3704 ; Y = 0
3705 ; CF = 0
3706 ; Uso: A,X,Y
3707 ; Note: Usare solo per shift a destra < 8 bits
3708 F838D5 _RShiftXN:
3709 F838D5 EB xba ; B = bit di guardia
3710 F838D6 ACC16
3711 F838D6 C2 20 rep #PMFLAG
3712 .LONGA on
3713 .MNLIST
3714 F838D8 56 07 ?01: lsr <7,x ; MSB = 0
3715 F838DA 76 05 ROR <5,X
3716 F838DC 76 03 ROR <3,X
3717 F838DE 76 01 ROR <1,X
3718 F838E0 6A ROR A ; aggiorna bit di guardia
3719 F838E1 C8 INY
3720 F838E2 D0 F4 BNE ?01 ; bit shift loop
3721 F838E4 ACC08
3722 F838E4 E2 20 sep #PMFLAG
3723 .LONGA off
3724 .MNLIST
3725 F838E6 EB xba ; A = bit di guardia
3726 F838E7 18 _RTS3: CLC
3727 F838E8 60 RTS
3728
3729 ;-------------------------------------------------------------
3730 ; IMPLEMENTAZIONE _feMUL
3731 ;-------------------------------------------------------------
3732
3733
3734 ; _feMULM: esegue prodotto di FAC e MEM e pone il risultato in FAC
3735 ; In: CY -> puntatore alla memoria
3736 ; FAC
3737 ; Out: FAC = MEM * FAC
3738 ; FPUST, per le eccezioni
3739 ; Uso: A,X,Y,FOP
3740 ; Note: Testare lo status in FPUST
3741 F838E9 _feMULM:
3742 F838E9 20 98 3D JSR _MovMem2A ; carica ARG da memoria
3743 F838EC
3744 ; _feMUL: esegue prodotto di FAC e ARG e pone il risultato in FAC
3745 ; In: FAC, ARG
3746 ; Out: FAC = ARG * FAC
3747 ; FPUST, per le eccezioni
Tue Jul 17 11:00:16 2018 Page 22
3748 ; Uso: A,X,Y,FOP
3749 ; Note: Testare lo status in FPUST
3750 F838EC _feMUL:
3751 F838EC 20 FF 3A JSR multst ; test operandi FAC e ARG
3752 F838EF 38 ?15: SEC ; depolarizza exp(FAC) - 1
3753 F838F0 ACC16
3754 F838F0 C2 20 rep #PMFLAG
3755 .LONGA on
3756 .MNLIST
3757 F838F2 A5 4A LDA FACExp
3758 F838F4 E9 FF 3F SBC #EXPBIAS
3759 F838F7 85 4A STA FACExp
3760 F838F9 ACC08
3761 F838F9 E2 20 sep #PMFLAG
3762 .LONGA off
3763 .MNLIST
3764 F838FB A2 80 ldx #$80 ; flag MULT
3765 F838FD 20 A1 39 JSR _AddExponent
3766 F83900 ACC16
3767 F83900 C2 20 rep #PMFLAG
3768 .LONGA on
3769 .MNLIST
3770 F83902 64 32 STZ FOP ; clear area temporanea del risultato
3771 F83904 64 34 STZ FOP+2
3772 F83906 64 36 STZ FOP+4
3773 F83908 64 38 STZ FOP+6
3774 F8390A ACC08
3775 F8390A E2 20 sep #PMFLAG
3776 .LONGA off
3777 .MNLIST
3778 F8390C 64 3A STZ FOP+8
3779 F8390E A5 41 LDA FACEXT ; moltiplica ogni byte di FAC
3780 F83910 20 6A 39 JSR _MultA ; per la mantissa di ARG
3781 F83913 A5 42 LDA FAC+1
3782 F83915 20 6A 39 JSR _MultA
3783 F83918 A5 43 LDA FAC+2
3784 F8391A 20 6A 39 JSR _MultA
3785 F8391D A5 44 LDA FAC+3
3786 F8391F 20 6A 39 JSR _MultA
3787 F83922 A5 45 LDA FAC+4
3788 F83924 20 6A 39 JSR _MultA
3789 F83927 A5 46 LDA FAC+5
3790 F83929 20 6A 39 JSR _MultA
3791 F8392C A5 47 LDA FAC+6
3792 F8392E 20 6A 39 JSR _MultA
3793 F83931 A5 48 LDA FAC+7
3794 F83933 20 6A 39 JSR _MultA
3795 F83936 A5 49 LDA FAC+8
3796 F83938 20 6F 39 JSR _MultB
3797
3798 F8393B _CopyFOP:
3799 F8393B ACC16
3800 F8393B C2 20 rep #PMFLAG
3801 .LONGA on
3802 .MNLIST
3803 F8393D A5 32 LDA FOP ; copia il risultato da POP a FAC
3804 F8393F 85 42 STA FAC+1
Tue Jul 17 11:00:16 2018 Page 23
3805 F83941 A5 34 LDA FOP+2
3806 F83943 85 44 STA FAC+3
3807 F83945 A5 36 LDA FOP+4
3808 F83947 85 46 STA FAC+5
3809 F83949 A5 38 LDA FOP+6
3810 F8394B 85 48 STA FAC+7
3811 F8394D ACC08
3812 F8394D E2 20 sep #PMFLAG
3813 .LONGA off
3814 .MNLIST
3815 F8394F A5 4E lda FACUndf ; underflow ?
3816 F83951 F0 14 beq ?10 ; NO -- normalizza
3817 F83953 A2 41 ldx #FAC
3818 F83955 C9 F9 CMP #$F9 ; test N < -7
3819 F83957 10 05 BPL ?04 ; N >= -7, shift bit x bit (CF = 1)
3820 F83959 20 C8 38 JSR _RShiftXB ; N < -7, shifta byte x byte (CF = 0)
3821 ;BRA ?10 ; FAC denormalizzato con exp = 0
3822 F8395C 80 06 bra ?06
3823 F8395E A8 ?04: TAY ; Y = -N
3824 F8395F A5 41 LDA FACEXT ; A = bit di guardia
3825 F83961 20 D5 38 JSR _RShiftXN ; shift bit x bit (CF = 0)
3826 F83964 4C FF 3B ?06: jmp _feXAM
3827 F83967 4C D9 37 ?10: JMP _Normalize ; normalizza FAC
3828
3829 ; moltiplica byte x mantissa
3830 ; In: A = byte
3831 ; ARG
3832 ; Out: FOP = A * ARG
3833 ; Uso: A,X,Y,FOP
3834 F8396A _MultA:
3835 F8396A D0 03 BNE _MultB
3836 F8396C 4C A2 38 JMP _RShiftFOP ; se A = 0 shift a destra di 8 bit di FOP
3837 F8396F _MultB:
3838 F8396F 4A LSR A
3839 F83970 09 80 ORA #$80
3840 F83972 A8 ?01: TAY
3841 F83973 ACC16
3842 F83973 C2 20 rep #PMFLAG
3843 .LONGA on
3844 .MNLIST
3845 F83975 90 19 BCC ?02
3846 F83977 18 CLC
3847 F83978 A5 32 LDA FOP
3848 F8397A 65 52 ADC ARG+1
3849 F8397C 85 32 STA FOP
3850 F8397E A5 34 LDA FOP+2
3851 F83980 65 54 ADC ARG+3
3852 F83982 85 34 STA FOP+2
3853 F83984 A5 36 LDA FOP+4
3854 F83986 65 56 ADC ARG+5
3855 F83988 85 36 STA FOP+4
3856 F8398A A5 38 LDA FOP+6
3857 F8398C 65 58 ADC ARG+7
3858 F8398E 85 38 STA FOP+6
3859 F83990 66 38 ?02: ROR FOP+6
3860 F83992 66 36 ROR FOP+4
3861 F83994 66 34 ROR FOP+2
Tue Jul 17 11:00:16 2018 Page 24
3862 F83996 66 32 ROR FOP
3863 F83998 ACC08
3864 F83998 E2 20 sep #PMFLAG
3865 .LONGA off
3866 .MNLIST
3867 F8399A 66 41 ROR FACEXT
3868 F8399C 98 TYA
3869 F8399D 4A LSR A
3870 F8399E D0 D2 BNE ?01
3871 F839A0 60 RTS
3872
3873 ; Imposta l'esponente di FAC per FMUL/FDIV
3874 ; In: FAC (con esponente depolarizzato), ARG
3875 ; Se chiamata da FDIV l'esponente di FAC deve
3876 ; essere cambiato di segno
3877 ; ACC16
3878 ; Out: exp(FAC) = exp(FAC) + exp(ARG)
3879 ; sgn(FAC) corretto
3880 ; Uso: A,X
3881 ; Note: Puo' generare overflow/underflow.
3882 ; In tal caso viene scartato direttamente
3883 ; l'indirizzo di ritorno e FMUL/FDIV terminano
3884 ; in modo prematuro.
3885 ;
3886 ; NOTA -- si assume valido esponente polarizzato range $0000 - $7FFE
3887 ; I valori ammessi per l'esponente depolarizzato sono:
3888 ; exp+ -> $0000 - $3FFF (0,MAXPEXP)
3889 ; exp- -> $C001 - $FFFF (MINNEXP, -1) -- NO: C002..$FFFF
3890 ;
3891 ; quindi la somma (signed) degli esponenti puo' assumere i
3892 ; valori seguenti:
3893 ;
3894 ; (exp+) + (exp+) -> $00000 - $07FFE -> puo' causare overflow
3895 ; (exp+) + (exp-) -> $0C001 - $0FFFF - $10000 - $13FFE
3896 ; (exp-) + (exp+) -> $0C001 - $0FFFF - $10000 - $13FFE
3897 ; (exp-) + (exp-) -> $18002 - $1FFFE -> puo' causare underflow
3898 ;
3899 ; Il nuovo esponente polarizzato si calcola ignorando il carry
3900 ; dalla somma signed precedente ed aggiungendo il bias $3FFF:
3901 ; (exp+) + (exp+) -> $03FFF - $0BFFD -> puo' causare overflow (CF = 0)
3902 ; (exp+) + (exp-) -> $00000 - $07FFD -> sempre corretto (CF = 0)
3903 ; (exp-) + (exp+) -> $00000 - $07FFD -> sempre corretto (CF = 0)
3904 ; (exp-) + (exp-) -> $0C001 - $0FFFF -> range $8002..$C000 (CF = 0)
3905 ; (exp-) + (exp-) -> $10000 - $13FFD -> range $C001..$FFFE (CF = 1)
3906 ;
3907 ; per operazione MULT occorre incrementare di 1 esponente polarizzato
3908 ;
3909 ; si puo' verificare OVERFLOW nel primo caso (exp >= EXPINF)
3910 ; si verifica UNDERFLOW nel quarto caso (exp in $C001..$FFFF)
3911 ; OVERFLOW va testato dopo operazione MULT/DIV e normalizzazione, dato
3912 ; che lo shift a sinistra della mantissa causa il decremento di exp.
3913 ; e quindi si potrebbe ottenere un numero finito normalizzato. Lo shift
3914 ; ruota la massimo 72 bit (compresi gli 8 bit di guardia) quindi se exp
3915 ; supera di 80 bit il max. siamo sicuramente in condizione di overflow.
3916 ; quindi si ha sicuramente OVERFLOW se exp >= $7FFE + $50 = $804E
3917 ; la condizone di UNDERFLOW e' piu' complicata: si puo' assumere che
3918 ; il numero venga azzerato fino a quando exp < -80 ovvero exp < $FFB0
Tue Jul 17 11:00:16 2018 Page 25
3919 ; se exp >= FFB0 si puo' tentare di denormalizzare il risultato con
3920 ; una serie di shift a destra in modo da incrementare exp fino alla
3921 ; condizione exp = 0 ed ottenere un underflow graduale
3922
3923 F839A1 _AddExponent:
3924 F839A1 86 4D stx FACMlt ; flag MULT
3925 F839A3 64 4E stz FACUndf ; azzera shift underflow
3926 F839A5 A6 4C LDX FACSCMP ; MULT/DIV: sgn(FAC) = confronto segni
3927 F839A7 86 40 STX FACSGN
3928 F839A9 ACC16
3929 F839A9 C2 20 rep #PMFLAG
3930 .LONGA on
3931 .MNLIST
3932 F839AB 38 SEC ; depolarizza exp(ARG)
3933 F839AC A5 5A LDA ARGExp
3934 F839AE E9 FF 3F SBC #EXPBIAS
3935 F839B1 18 clc
3936 F839B2 65 4A adc FACExp ; C = nuovo esponente depolarizzato di FAC
3937 F839B4 18 clc ; ignora carry
3938 F839B5 A6 4D ldx FACMlt
3939 F839B7 10 01 bpl ?02
3940 F839B9 38 sec ; MULT richiede incremento esponente
3941 F839BA 69 FF 3F ?02: adc #EXPBIAS ; polarizza exp FAC
3942 F839BD 85 4A sta FACExp
3943 F839BF B0 20 bcs ?08 ; OK
3944 F839C1 C9 FF 7F cmp #EXPINF
3945 F839C4 90 1B bcc ?08 ; OK
3946 F839C6 C9 00 C0 cmp #$C000
3947 F839C9 B0 08 bcs ?04 ; test underflow
3948 F839CB C9 4E 80 cmp #$804E ; overflow immediato ?
3949 F839CE 90 11 bcc ?08 ; NO -- dopo normalizzazione
3950 F839D0 4C 5F 3B jmp _ldinf0 ; load INF ed esce
3951 F839D3 C9 B0 FF ?04: cmp #$FFB0 ; underflow immediato ?
3952 F839D6 B0 03 bcs ?06 ; NO -- dopo MULT/DIV
3953 F839D8 4C 69 3B jmp _ldz1 ; UNDERFLOW immediato: FAC = 0
3954 F839DB AA ?06: tax ; C low = A => numero shift destra
3955 F839DC CA dex
3956 F839DD 86 4E stx FACUndf
3957 F839DF 64 4A stz FACExp ; underflow graduale -- denormalizza
3958 F839E1 ?08: ACC08
3959 F839E1 E2 20 sep #PMFLAG
3960 .LONGA off
3961 .MNLIST
3962 F839E3 60 _RTS5: rts
3963 F839E4
3964 ; _feMUL10: Funzione veloce che moltiplica FAC per 10
3965 ; In: FAC
3966 ; Out: FAC = FAC*10
3967 ; CF = 1 se overflow
3968 ; Uso: A,X,Y
3969 F839E4 _feMUL10:
3970 F839E4 20 FF 3B JSR _feXAM ; esamina FAC
3971 F839E7 B0 FA bcs _RTS5 ; FAC non valido (C = 1)
3972 F839E9 F0 F8 beq _RTS5 ; FAC = 0 -- esce (C = 0)
3973 F839EB 20 5D 38 JSR _RoundSkp ; arrotonda FAC ed esce in caso di errore
3974 F839EE 20 E1 3D JSR _MovF2A ; copia FAC in ARG
3975 F839F1 ACC16
Tue Jul 17 11:00:16 2018 Page 26
3976 F839F1 C2 20 rep #PMFLAG
3977 .LONGA on
3978 .MNLIST
3979 F839F3 A5 4A lda FACExp
3980 F839F5 1A inc a
3981 F839F6 1A inc a ; FAC = FAC * 4
3982 F839F7 85 4A sta FACExp
3983 F839F9 C9 FF 7F CMP #EXPINF ; test overflow
3984 F839FC ACC08
3985 F839FC E2 20 sep #PMFLAG
3986 .LONGA off
3987 .MNLIST
3988 F839FE B0 16 bcs ?20 ; overflow
3989 F83A00 20 04 37 JSR _feADD ; FAC = FAC + (FAC*4) = 5*FAC
3990 F83A03 B0 DE bcs _RTS5 ; errore
3991 F83A05 ACC16
3992 F83A05 C2 20 rep #PMFLAG
3993 .LONGA on
3994 .MNLIST
3995 F83A07 A5 4A lda FACExp
3996 F83A09 1A inc a ; FAC = 2 * (5 * FAC) = 10 * FAC
3997 F83A0A 85 4A sta FACExp
3998 F83A0C C9 FF 7F CMP #EXPINF ; test overflow
3999 F83A0F ACC08
4000 F83A0F E2 20 sep #PMFLAG
4001 .LONGA off
4002 .MNLIST
4003 F83A11 B0 03 bcs ?20 ; overflow
4004 F83A13 4C D9 37 jmp _Normalize
4005 F83A16 4C 75 3B ?20: jmp _feLDINF1 ; FAC = INF con segno di FAC
4006
4007 ;-------------------------------------------------------------
4008 ; IMPLEMENTAZIONE _feDIV
4009 ;-------------------------------------------------------------
4010
4011 ; _feDIV10: esegue divisione di FAC per 10 e pone il risultato in FAC
4012 ; In: FAC
4013 ; Out: FAC = FAC/10
4014 ; FPUST, per le eccezioni
4015 ; Uso: A,X,Y,FOP
4016 ; Note: Testare lo status in FPUST
4017 F83A19 _feDIV10:
4018 F83A19 A9 44 LDA #.HIGH.FCon1E1
4019 F83A1B EB xba
4020 F83A1C A9 B2 LDA #.LOW.FCon1E1 ; LOAD = 10.0
4021 F83A1E A0 F8 LDY #.SEG.FCon1E1
4022
4023 ; _feDIVRM: esegue FAC / MEM -> FAC
4024 ; In: CY -> MEM
4025 ; FAC valido
4026 ; Out: FAC = FAC / MEM
4027 ; FPUST, per le eccezioni
4028 ; Uso: C,X,Y,FOP, ARG
4029 ; Note: Testare lo status in FPUST
4030 F83A20 _feDIVRM:
4031 F83A20 85 60 STA PTR1 ; salva puntatore mem
4032 F83A22 EB xba
Tue Jul 17 11:00:16 2018 Page 27
4033 F83A23 85 61 sta PTR1+1
4034 F83A25 84 62 STY PTR1+2
4035 F83A27 20 5D 38 JSR _RoundSkp ; arrotonda FAC, esce se errore
4036 F83A2A 20 E1 3D JSR _MovF2A ; copia FAC in ARG
4037 F83A2D 20 69 3D JSR _MovMem2Fa ; FAC = MEM
4038
4039 ; _feDIV: esegue divisione ARG / FAC e pone il risultato in FAC
4040 ; In: FAC, ARG
4041 ; Out: FAC = ARG/FAC
4042 ; FPUST, per le eccezioni
4043 ; Uso: A,X,Y,FOP
4044 ; Note: Testare lo status in FPUST
4045 F83A30 _feDIV:
4046 F83A30 20 25 3B JSR divtst ; test operandi FAC ed ARG
4047 F83A33 20 5D 38 ?12: JSR _RoundSkp ; arrotanda FAC ed esce in caso di eccezione
4048 F83A36 ACC16
4049 F83A36 C2 20 rep #PMFLAG
4050 .LONGA on
4051 .MNLIST
4052 F83A38 A5 4A LDA FACExp ; depolarizza esponente
4053 F83A3A 38 SEC ; e gli cambia segno
4054 F83A3B E9 FF 3F SBC #EXPBIAS
4055 F83A3E 49 FF FF EOR #$FFFF
4056 F83A41 1A inc a
4057 F83A42 85 4A sta FACExp
4058 F83A44 ACC08
4059 F83A44 E2 20 sep #PMFLAG
4060 .LONGA off
4061 .MNLIST
4062 F83A46 A2 00 ldx #$00 ; flag DIV
4063 F83A48 20 A1 39 JSR _AddExponent
4064
4065 F83A4B __fdiv__:
4066 F83A4B A2 08 ldx #8
4067 F83A4D A9 01 LDA #$01
4068 F83A4F A4 59 ?01: LDY ARG+8
4069 F83A51 C4 49 CPY FAC+8
4070 F83A53 D0 28 BNE ?02
4071 F83A55 A4 58 LDY ARG+7
4072 F83A57 C4 48 CPY FAC+7
4073 F83A59 D0 22 BNE ?02
4074 F83A5B A4 57 LDY ARG+6
4075 F83A5D C4 47 CPY FAC+6
4076 F83A5F D0 1C BNE ?02
4077 F83A61 A4 56 LDY ARG+5
4078 F83A63 C4 46 CPY FAC+5
4079 F83A65 D0 16 BNE ?02
4080 F83A67 A4 55 LDY ARG+4
4081 F83A69 C4 45 CPY FAC+4
4082 F83A6B D0 10 BNE ?02
4083 F83A6D A4 54 LDY ARG+3
4084 F83A6F C4 44 CPY FAC+3
4085 F83A71 D0 0A BNE ?02
4086 F83A73 A4 53 LDY ARG+2
4087 F83A75 C4 43 CPY FAC+2
4088 F83A77 D0 04 BNE ?02
4089 F83A79 A4 52 LDY ARG+1
Tue Jul 17 11:00:16 2018 Page 28
4090 F83A7B C4 42 CPY FAC+1
4091 F83A7D ?02:
4092 F83A7D 08 ?02b: PHP
4093 F83A7E 2A ROL A
4094 F83A7F 90 09 BCC ?03
4095 F83A81 CA dex
4096 F83A82 30 3F BMI ?07
4097 F83A84 95 32 STA <FOP,X
4098 F83A86 F0 37 BEQ ?06
4099 F83A88 A9 01 LDA #$01
4100 F83A8A 28 ?03: PLP
4101 F83A8B B0 12 BCS ?05
4102 F83A8D ?04: ACC16
4103 F83A8D C2 20 rep #PMFLAG
4104 .LONGA on
4105 .MNLIST
4106 F83A8F 06 52 ASL ARG+1
4107 F83A91 26 54 ROL ARG+3
4108 F83A93 26 56 ROL ARG+5
4109 F83A95 26 58 ROL ARG+7
4110 F83A97 ACC08
4111 F83A97 E2 20 sep #PMFLAG
4112 .LONGA off
4113 .MNLIST
4114 F83A99 B0 E2 BCS ?02b
4115 F83A9B 30 B2 BMI ?01
4116 F83A9D 10 DE BPL ?02b
4117 F83A9F A8 ?05: TAY
4118 F83AA0 ACC16
4119 F83AA0 C2 20 rep #PMFLAG
4120 .LONGA on
4121 .MNLIST
4122 F83AA2 A5 52 LDA ARG+1
4123 F83AA4 E5 42 SBC FAC+1
4124 F83AA6 85 52 STA ARG+1
4125 F83AA8 A5 54 LDA ARG+3
4126 F83AAA E5 44 SBC FAC+3
4127 F83AAC 85 54 STA ARG+3
4128 F83AAE A5 56 LDA ARG+5
4129 F83AB0 E5 46 SBC FAC+5
4130 F83AB2 85 56 STA ARG+5
4131 F83AB4 A5 58 LDA ARG+7
4132 F83AB6 E5 48 SBC FAC+7
4133 F83AB8 85 58 STA ARG+7
4134 F83ABA ACC08
4135 F83ABA E2 20 sep #PMFLAG
4136 .LONGA off
4137 .MNLIST
4138 F83ABC 98 TYA
4139 F83ABD 80 CE BRA ?04
4140 F83ABF A9 40 ?06: LDA #$40
4141 F83AC1 D0 C7 BNE ?03
4142 F83AC3 0A ?07: ASL A
4143 F83AC4 0A ASL A
4144 F83AC5 0A ASL A
4145 F83AC6 0A ASL A
4146 F83AC7 0A ASL A
Tue Jul 17 11:00:16 2018 Page 29
4147 F83AC8 0A ASL A
4148 F83AC9 85 41 STA FACEXT
4149 F83ACB 28 PLP
4150 F83ACC 4C 3B 39 JMP _CopyFOP
4151
4152 ;-------------------------------------------------------------
4153 ; Test operandi FAC e ARG per operazioni ADD, MULT, DIV
4154 ;-------------------------------------------------------------
4155
4156 ; test preventivo su FAC ed ARG prima di _feADD
4157 F83ACF addtst:
4158 F83ACF 20 C8 3B jsr _fe2TST ; test FAC ed ARG e setta confronto segni
4159 F83AD2 10 13 bpl ?05 ; FAC valido
4160 F83AD4 A6 40 ldx FACSGN ; esce con segno di FAC
4161 F83AD6 50 79 bvc _ldnan0 ; FAC = NAN => RESULT = NAN (con segno di FAC)
4162 F83AD8 24 37 BIT ARGXM ; FAC = INF, necessario testare ARG
4163 F83ADA 30 03 bmi ?03
4164 F83ADC 4C 5F 3B jmp _ldinf0 ; ARG valido -> (INF + X) -> FAC = INF
4165 F83ADF 50 70 ?03: bvc _ldnan0 ; ARG = NAN -> FAC = NAN
4166 F83AE1 24 4C BIT FACSCMP ; FAC = INF e ARG = INF: cfr. segni
4167 F83AE3 10 7A BPL _ldinf0 ; +INF+INF o -INF-INF -> FAC = INF
4168 F83AE5 30 6A bmi _ldnan0 ; +INF-INF o -INF+INF -> FAC = NAN
4169 F83AE7 24 37 ?05: BIT ARGXM ; FAC valido -- test ARG
4170 F83AE9 10 06 BPL ?10 ; ARG valido
4171 F83AEB A6 50 LDX ARGSGN ; esce con segno di ARG
4172 F83AED 50 62 BVC _ldnan0 ; ARG = NAN -> (X + NAN) -> FAC = NAN
4173 F83AEF 70 6E bvs _ldinf0 ; ARG = INF -> (X + INF) -> FAC = INF
4174 F83AF1 70 07 ?10: bvs _skpxam ; ARG = 0 => esce con FAC inalterato
4175 F83AF3 24 36 bit FACXM ; test FAC = 0
4176 F83AF5 50 2D bvc _RTSA ; esegue ADD
4177 F83AF7 20 CE 3D jsr _MovA2F ; FAC = 0 + ARG = ARG
4178 F83AFA
4179 F83AFA _skpxam:
4180 F83AFA 68 pla
4181 F83AFB 68 pla
4182 F83AFC 4C FF 3B jmp _feXAM
4183
4184 ; test preventivo su FAC ed ARG prima di _feMUL
4185 F83AFF multst:
4186 F83AFF 20 C8 3B JSR _fe2TST ; test operandi FAC e ARG
4187 F83B02 10 0E BPL ?05 ; FAC valido -- testare ARG
4188 F83B04 50 47 bvc _ldnan1 ; FAC = NAN => RESULT = NAN
4189 F83B06 24 37 BIT ARGXM ; FAC = INF -- test ARG
4190 F83B08 10 04 BPL ?03 ; ARG valido
4191 F83B0A 70 4F BVS _ldinf1 ; ARG = INF -> (INF * INF) => FAC = INF
4192 F83B0C 50 3F BVC _ldnan1 ; ARG = NAN -> (INF * NAN) => FAC = NAN
4193 F83B0E 50 4B ?03: bvc _ldinf1 ; ARG <> 0 -> (INF * X) -> FAC = INF
4194 F83B10 70 3B bvs _ldnan1 ; ARG = 0 -> (INF * 0) -> FAC = NAN
4195 F83B12 24 37 ?05: BIT ARGXM ; FAC valido -- test ARG
4196 F83B14 10 08 BPL ?10 ; ARG valido
4197 F83B16 50 35 BVC _ldnan1 ; ARG = NAN -> (X * NAN) -> FAC = NAN
4198 F83B18 24 36 bit FACXM ; ARG = INF -> necessario testare FAC
4199 F83B1A 50 3F bvc _ldinf1 ; FAC <> 0 -> (X * INF) -> FAC = INF
4200 F83B1C 70 2F bvs _ldnan1 ; FAC = 0 -> (0 * INF) -> FAC = NAN
4201 F83B1E 70 49 ?10: bvs _ldz1 ; VF = 1 -> ARG = 0 -> (X * 0) -> FAC = 0
4202 F83B20 24 36 bit FACXM ; test flag zero FAC
4203 F83B22 70 45 bvs _ldz1 ; VF = 1 -> FAC = 0 -> (0 * X) -> FAC = 0
Tue Jul 17 11:00:16 2018 Page 30
4204 F83B24 _RTSA:
4205 F83B24 60 rts ; OK -- esegue MULT
4206
4207 ; test preventivo su FAC ed ARG prima di _feDIV
4208 F83B25 divtst:
4209 F83B25 20 C8 3B JSR _fe2TST ; test operandi FAC ed ARG
4210 F83B28 10 08 BPL ?05 ; FAC valido
4211 F83B2A 50 21 bvc _ldnan1 ; FAC = NAN => RESULT = NAN
4212 F83B2C 24 37 BIT ARGXM ; FAC = INF -- test ARG
4213 F83B2E 30 1D bmi _ldnan1 ; ARG = NAN/INF -> (NANINF / INF) -> FAC = NAN
4214 F83B30 10 37 bpl _ldz1 ; ARG = X -> (X / INF) -> FAC = ZERO
4215 F83B32 24 37 ?05: bit ARGXM ; FAC valido -- test ARG
4216 F83B34 10 08 bpl ?10 ; ARG valido
4217 F83B36 50 15 bvc _ldnan1 ; ARG = NAN -> (NAN / X) -> FAC = NAN
4218 F83B38 24 36 bit FACXM ; ARG = INF -- testare FAC = 0
4219 F83B3A 50 1F bvc _ldinf1 ; FAC <> 0 -> (INF / X) -> FAC = INF
4220 F83B3C 70 25 bvs _ldinfz ; FAC = 0 -> (INF / 0) -> FAC = INF e ZF = 1
4221 F83B3E 24 36 ?10: bit FACXM ; FAC ed ARG validi -- testare FAC = 0
4222 F83B40 50 06 bvc ?14 ; FAC non nullo
4223 F83B42 24 37 bit ARGXM ; FAC = 0 -- test ARG
4224 F83B44 50 1D bvc _ldinfz ; ARG <> 0 -> (X / 0) -> FAC = INF, ZF = 1
4225 F83B46 70 0D bvs _ldnanz ; ARG = 0 -> (0 / 0) -> FAC = NAN, ZF = 1
4226 F83B48 24 37 ?14: bit ARGXM ; FAC <> 0 -- test ARG = 0
4227 F83B4A 70 1D bvs _ldz1 ; ARG = 0 -> (0 / X) -> FAC = 0
4228 F83B4C 60 rts
4229
4230 F83B4D _ldnan1:
4231 F83B4D A6 4C ldx FACSCMP ; segno risultato
4232 F83B4F 86 40 stx FACSGN
4233 F83B51 _ldnan0:
4234 F83B51 7A ply ; scarta indirizzo di ritorno
4235 F83B52 7A ply
4236 F83B53 80 33 bra _feLDNAN1 ; FAC = +/- NAN
4237
4238 F83B55 _ldnanz:
4239 F83B55 A6 4C ldx FACSCMP ; segno risultato
4240 F83B57 7A ply ; scarta indirizzo di ritorno
4241 F83B58 7A ply
4242 F83B59 80 25 bra _feLDNANZ ; FAC = +/- NAN, ZF = 1
4243 F83B5B
4244 F83B5B _ldinf1:
4245 F83B5B A6 4C ldx FACSCMP ; segno risultato
4246 F83B5D 86 40 stx FACSGN
4247 F83B5F _ldinf0:
4248 F83B5F 7A ply ; scarta indirizzo di ritorno
4249 F83B60 7A ply
4250 F83B61 80 12 bra _feLDINF1 ; FAC = +/- INF
4251
4252 F83B63 _ldinfz:
4253 F83B63 A6 4C ldx FACSCMP ; segno risultato
4254 F83B65 7A ply ; scarta indirizzo di ritorno
4255 F83B66 7A ply
4256 F83B67 80 04 bra _feLDINFZ ; FAC = +/- INF, ZF = 1
4257
4258 F83B69 _ldz1:
4259 F83B69 7A ply ; scarta indirizzo di ritorno
4260 F83B6A 7A ply
Tue Jul 17 11:00:16 2018 Page 31
4261 F83B6B 80 43 bra _feLDZ ; FAC = +ZERO
4262 F83B6D
4263 ;-------------------------------------------------------------
4264 ; Load FAC/ARG con valori speciali
4265 ;-------------------------------------------------------------
4266
4267 ; _feLDINFZ: Imposta FAC = +/-INF e ZF
4268 ; In: X = segno
4269 ; Out: FAC = +/-INF
4270 ; Flag come da _feXAM + ZF
4271 ; Uso: A,Y,X
4272 ; Note: FACSGN settato, FACEXT azzerato
4273 F83B6D _feLDINFZ:
4274 F83B6D 86 40 STX FACSGN ; imposta segno FAC
4275
4276 ; _feLDINF1Z: Imposta FAC = +/-INF e ZF
4277 ; In: FACSGN = segno
4278 ; Out: FAC = +/-INF
4279 ; Flag come da _feXAM + ZF
4280 ; Uso: A,Y,X
4281 ; Note: FACSGN settato, FACEXT azzerato
4282 ;***************************************
4283 F83B6F _feLDINF1Z:
4284 F83B6F A0 00 ldy #0 ; ZF = 1, NF = 0
4285 F83B71 F0 04 beq _fldinf
4286 F83B73
4287 ; _feLDINF: Imposta FAC = +/-INF
4288 ; In: X = segno
4289 ; Out: FAC = +/-INF
4290 ; Flag come da _feXAM
4291 ; Uso: A,Y,X
4292 ; Note: FACSGN settato, FACEXT azzerato
4293 F83B73 _feLDINF:
4294 F83B73 86 40 STX FACSGN ; imposta segno FAC
4295
4296 ; _feLDINF1: Imposta FAC = +/-INF
4297 ; In: FACSGN = segno
4298 ; Out: FAC = +/-INF
4299 ; Flag come da _feXAM
4300 ; Uso: A,Y,X
4301 ; Note: FACSGN settato, FACEXT azzerato
4302 F83B75 _feLDINF1:
4303 F83B75 A0 01 ldy #1 ; ZF = 0, NF = 0
4304
4305 ; ingresso per settare +/- INF e ZF
4306 F83B77 _fldinf:
4307 F83B77 E2 40 sep #PVFLAG ; V = 1 => segnala INF
4308 F83B79 ACC16
4309 F83B79 C2 20 rep #PMFLAG
4310 .LONGA on
4311 .MNLIST
4312 F83B7B A9 00 80 lda #MANTINF
4313 F83B7E 80 10 bra _fldnv
4314
4315 ; _feLDNANZ: Imposta FAC = +/-NAN e ZF = 1
4316 ; In: X = segno
4317 ; Out: FAC = +/-NAN
Tue Jul 17 11:00:16 2018 Page 32
4318 ; CF = 1, VF = 0, ZF = 1
4319 ; Uso: A,Y,X
4320 ; Note: FACSGN settato, FACEXT azzerato
4321 F83B80 _feLDNANZ:
4322 F83B80 86 40 stx FACSGN
4323 F83B82 A0 00 ldy #0 ; ZF = 1, NF = 0
4324 F83B84 F0 04 beq _feLDNAN2
4325
4326 ; _feLDNAN: Imposta FAC = +/-NAN
4327 ; In: X = segno
4328 ; Out: FAC = +/-NAN
4329 ; CF = 1, VF = 0, ZF = 0
4330 ; Uso: A,Y,X
4331 ; Note: FACSGN settato, FACEXT azzerato
4332 F83B86 _feLDNAN:
4333 F83B86 86 40 stx FACSGN
4334 F83B88
4335 ; _feLDNAN1: Imposta FAC = +/-NAN
4336 ; In: FACSgn
4337 ; Out: FAC = +/-NAN
4338 ; CF = 1, VF = 0, ZF = 0
4339 ; Uso: A,Y,X
4340 ; Note: FACSGN settato, FACEXT azzerato
4341 ;****************************************
4342 F83B88 _feLDNAN1:
4343 F83B88 A0 01 ldy #1 ; ZF = 0, NF = 0
4344 F83B8A _feLDNAN2:
4345 F83B8A B8 clv ; V = 0 => segnala NAN
4346 F83B8B ACC16
4347 F83B8B C2 20 rep #PMFLAG
4348 .LONGA on
4349 .MNLIST
4350 F83B8D A9 00 FF lda #MANTNAN
4351
4352 ; ingresso con ACC16
4353 F83B90 _fldnv:
4354 LONGA on
4355 F83B90 85 48 sta FAC+7
4356 F83B92 64 46 stz FAC+5
4357 F83B94 64 44 stz FAC+3
4358 F83B96 64 42 stz FAC+1
4359 F83B98 A9 FF 7F lda #EXPINF
4360 F83B9B 85 4A sta FACExp
4361 F83B9D ACC08
4362 F83B9D E2 20 sep #PMFLAG
4363 .LONGA off
4364 .MNLIST
4365 F83B9F 64 41 stz FACEXT
4366 F83BA1 38 sec ; segnala errore
4367 F83BA2 98 tya ; imposta ZF, NF = 0
4368 F83BA3 08 php
4369 F83BA4 A6 40 ldx FACSGN
4370 F83BA6 10 06 bpl ?10
4371 F83BA8 A3 01 lda $01,s ; imposta NF
4372 F83BAA 09 80 ora #$80
4373 F83BAC 83 01 sta $01,s
4374 F83BAE 28 ?10: plp
Tue Jul 17 11:00:16 2018 Page 33
4375 F83BAF 60 rts
4376
4377 ; _feLDZ - load ZERO in FAC
4378 ; Out flag : CF = VF = NF = 0, ZF = 1
4379 F83BB0 _feLDZ:
4380 F83BB0 ACC16
4381 F83BB0 C2 20 rep #PMFLAG
4382 .LONGA on
4383 .MNLIST
4384 F83BB2 A9 00 00 lda #0 ; ZF = 1, NF = 0
4385 F83BB5 85 42 sta FAC+1
4386 F83BB7 85 44 sta FAC+3
4387 F83BB9 85 46 sta FAC+5
4388 F83BBB 85 48 sta FAC+7
4389 F83BBD 85 4A sta FACExp
4390 F83BBF ACC08
4391 F83BBF E2 20 sep #PMFLAG
4392 .LONGA off
4393 .MNLIST
4394 F83BC1 85 40 sta FACSGN
4395 F83BC3 85 41 sta FACEXT
4396 F83BC5 18 clc
4397 F83BC6 B8 clv
4398 F83BC7 60 rts
4399
4400 ;-------------------------------------------------------------
4401 ; ESAMINA REGISTRI FAC E ARG
4402 ;----------------------------------- -------------------------
4403
4404 ; Esamina FAC ed ARG per operazioni con 2 operandi
4405 ; Lo status viene riportato nei bit 7 e 6 di FACXM e ARGXM
4406 ; secondo il seguente schema:
4407 ; FACXM(7) -> FAC non valido (NAN o INF)
4408 ; FACXM(6) -> FAC = INF (se bit 7 = 1)
4409 ; -> FAC = 0 (se bit 7 = 0)
4410 ; ARGXM(7) -> ARG non valido (NAN o INF)
4411 ; ARGXM(6) -> ARG = INF (se bit 7 = 1)
4412 ; -> ARG = 0 (se bit 7 = 0)
4413 ; Inoltre viene correttamente impostato il flag di
4414 ; confronto dei segni FACSCMP.
4415 ; In: FAC, ARG
4416 ; Out: FACXM, ARGXM
4417 ; FLAG N, V come da 'bit FACXM'
4418 ; CF = 1 se FAC non valido (NAN o INF)
4419 ; Uso: A,X,FACXM,ARGXM
4420 F83BC8 _fe2TST:
4421 F83BC8 A5 50 LDA ARGSGN ; imposta il flag confronto segni
4422 F83BCA 45 40 EOR FACSGN
4423 F83BCC 85 4C STA FACSCMP ; negativo se segni discordi
4424 F83BCE 20 FB 3B jsr _feXAMARG ; esamina ARG (A = 0)
4425 F83BD1 90 08 bcc ?02 ; ARG valido
4426 F83BD3 A9 80 lda #$80 ; bit 7 -> non valido
4427 F83BD5 50 08 bvc ?04 ; NAN
4428 F83BD7 09 40 ora #$40 ; flag INF
4429 F83BD9 80 04 bra ?04
4430 F83BDB D0 02 ?02: bne ?04
4431 F83BDD A9 40 lda #$40 ; flag ZERO
Tue Jul 17 11:00:16 2018 Page 34
4432 F83BDF 85 37 ?04: sta ARGXM
4433 F83BE1 20 FF 3B jsr _feXAM ; esamina FAC (A = 0)
4434 F83BE4 90 08 bcc ?06 ; FaC valido
4435 F83BE6 A9 80 lda #$80 ; bit 7 -> non valido
4436 F83BE8 50 08 bvc ?08 ; NAN
4437 F83BEA 09 40 ora #$40 ; flag INF
4438 F83BEC 80 04 bra ?08
4439 F83BEE D0 02 ?06: bne ?08
4440 F83BF0 A9 40 lda #$40 ; flag ZERO
4441 F83BF2 85 36 ?08: sta FACXM
4442 F83BF4 24 36 bit FACXM ; ritorna flag C, N, V
4443 F83BF6 18 clc ; valido
4444 F83BF7 10 01 bpl ?18
4445 F83BF9 38 sec ; non valido
4446 F83BFA 60 ?18: rts
4447
4448 ; _feXAM e _feXAMARG impostano i flag nel seguente modo
4449 ;
4450 ; CF = 0 => registro valido
4451 ; NF = 1 => segno registro
4452 ; ZF = 1 => se registro nullo e valido
4453 ; VF = 1 => denormale
4454 ;
4455 ; CF = 1 => registro non valido
4456 ; NF = 1 => segno registro
4457 ; VF = 0 => NAN se registro non valido
4458 ; VF = 1 => INF se registro non valido
4459 ; ZF = 0 => ignorare
4460 F83BFB
4461 ; _feXAMARG: Esamina registro ARG
4462 ; In:
4463 ; Out: P = ARG Status (C, N, V, Z)
4464 ; X -> indice a ARG-1
4465 ; A = 0
4466 ; Usa: A,X
4467 F83BFB _feXAMARG:
4468 F83BFB A2 50 LDX #ARGSGN
4469 F83BFD 80 02 BRA _FXAM
4470
4471 ; _feXAM: Esamina registro FAC
4472 ; In:
4473 ; Out: P = FAC Status (C, N, V, Z)
4474 ; X -> indice a FAC-1
4475 ; A = 0
4476 ; Usa: A,X
4477 F83BFF _feXAM:
4478 F83BFF A2 40 LDX #FACSGN
4479
4480 ; _FXAM: Esamina registro FAC/ARG
4481 ; In: X -> indice a FAC-1 o ARG-1 (segno)
4482 ; Out: P = FAC/ARG Status (C, N, V, Z)
4483 ; A = 0
4484 ; X -> indice a FAC o ARG
4485 ; Usa: A,X
4486 F83C01 _FXAM:
4487 F83C01 B8 clv ; setta preventivamente V = 0
4488 F83C02 ACC16
Tue Jul 17 11:00:16 2018 Page 35
4489 F83C02 C2 20 rep #PMFLAG
4490 .LONGA on
4491 .MNLIST
4492 F83C04 B5 0A LDA <10,X ; test EXP
4493 F83C06 F0 12 beq ?04 ; exp = 0 -- denormal o ZERO
4494 F83C08 C9 FF 7F CMP #EXPINF ; test INF/NAN
4495 ; se CF = 0 => EXP valido -- numero valido non nullo
4496 ; qui ZF = 0 e CF = 0 da confronto precedente
4497 F83C0B 90 1A bcc ?08 ; C = V = Z = 0 => imposta N
4498 ; se CF = 1 allora registro contiene INF o NAN
4499 F83C0D B5 08 lda <8,x ; test mantissa NAN/INF
4500 F83C0F C9 00 80 CMP #MANTINF
4501 F83C12 D0 02 bne ?02 ; NAN => V = 0
4502 F83C14 E2 40 sep #PVFLAG ; INF => V = 1
4503 F83C16 38 ?02: sec ; CF = 1 => non valido
4504 F83C17 3A dec a ; imposta ZF = 0 (A >= EXPINF)
4505 F83C18 B0 0D bcs ?08 ; C, Z, V settati -- imposta N
4506 ; ZERO o DENORMAL -- esamina mantissa
4507 F83C1A B5 02 ?04: lda <2,x ; imposta ZF
4508 F83C1C 15 04 ora <4,x
4509 F83C1E 15 06 ora <6,x
4510 F83C20 15 08 ora <8,x ; ZF = 1 => FAC/ARG = 0
4511 F83C22 18 clc ; valido
4512 F83C23 F0 02 beq ?08 ; ZERO => C = V = 0, Z = 1
4513 F83C25 E2 40 sep #PVFLAG ; denormal => C = Z = 0, V = 1
4514 F83C27 ?08: ACC08
4515 F83C27 E2 20 sep #PMFLAG
4516 .LONGA off
4517 .MNLIST
4518 F83C29 08 php ; salva status: V, Z, C
4519 F83C2A A3 01 lda $01,s ; clear NF nello stack
4520 F83C2C 29 7F and #$7F
4521 F83C2E 83 01 sta $01,s
4522 F83C30 B5 00 lda <0,x ; segno
4523 F83C32 29 80 and #$80 ; maschera bit 7
4524 F83C34 03 01 ora $01,s ; imposta NF nello stack
4525 F83C36 83 01 sta $01,s
4526 F83C38 A9 00 lda #0
4527 F83C3A 28 plp ; ripristina flag
4528 F83C3B 60 rts
4529 F83C3C
4530 ;----------------------------------------------------------
4531 ; implementazione _feCMP, _feCMPM, _feSGN, _feCHS, _feABS
4532 ;----------------------------------------------------------
4533
4534 ; _feCMP: Confronta FAC con ARG
4535 ; In: FAC, ARG (supposti validi)
4536 ; Out: A = 1 se FAC > ARG (ZF = 0, NF == 0)
4537 ; A = 0 se FAC = ARG (ZF = 1)
4538 ; A = -1 se FAC < ARG (ZF = 0, NF == 1)
4539 ; Uso: A,X
4540 ; Note: |INF| < |NAN|
4541 F83C3C _feCMP:
4542 F83C3C 20 FB 3B jsr _feXAMARG ; test ARG = 0
4543 F83C3F F0 35 BEQ _feSGN ; ARG = 0 -> ritorna sgn(FAC)
4544 F83C41 A5 50 LDA ARGSGN
4545 F83C43 45 40 EOR FACSGN
Tue Jul 17 11:00:16 2018 Page 36
4546 F83C45 30 2F BMI _feSGN ; Segni discordi: ritorna sgn(FAC)
4547 F83C47 ACC16 ; CONFRONTA ESPONENTI
4548 F83C47 C2 20 rep #PMFLAG
4549 .LONGA on
4550 .MNLIST
4551 F83C49 A5 5A lda ARGExp
4552 F83C4B C5 4A cmp FACExp
4553 F83C4D 90 3B BCC _FSGN3 ; FAC > ARG
4554 F83C4F D0 39 BNE _FSGN3 ; FAC < ARG (CF = 1)
4555 F83C51
4556 ; gli esponenti sono uguali - confronto mantissa byte a byte
4557 F83C51 A5 58 LDA ARG+7 ; MSB mantissa ARG
4558 F83C53 C5 48 CMP FAC+7
4559 F83C55 D0 33 BNE _FSGN3
4560 F83C57 A5 56 LDA ARG+5
4561 F83C59 C5 46 CMP FAC+5
4562 F83C5B D0 2D BNE _FSGN3
4563 F83C5D A5 54 LDA ARG+3
4564 F83C5F C5 44 CMP FAC+3
4565 F83C61 D0 27 BNE _FSGN3
4566 F83C63 ACC08
4567 F83C63 E2 20 sep #PMFLAG
4568 .LONGA off
4569 .MNLIST
4570 F83C65 A5 53 LDA ARG+2
4571 F83C67 C5 43 CMP FAC+2
4572 F83C69 D0 1F BNE _FSGN3
4573 F83C6B A9 7F LDA #$7F ; bit di guardia
4574 F83C6D C5 41 CMP FACEXT ; CF settato
4575 F83C6F A5 52 LDA ARG+1
4576 F83C71 E5 42 SBC FAC+1
4577 F83C73 D0 15 BNE _FSGN3
4578 F83C75 60 RTS ; FAC = ARG
4579 F83C76
4580 ; _feSGN: funzione che ritorna il segno di FAC
4581 ; In: FAC (supposto valido)
4582 ; Out: A = 1 se FAC > 0 (ZF = 0, NF == 0)
4583 ; A = 0 se FAC = 0 (ZF = 1)
4584 ; A = -1 se FAC < 0 (ZF = 0, NF == 1)
4585 ; Uso: A, X
4586 ; Note: NAN e INF assunti come validi
4587 F83C76 _feSGN:
4588 F83C76 CPU08 ; necessario !!!
4589 F83C76 E2 30 sep #(PMFLAG.OR.PXFLAG)
4590 .LONGA off
4591 .LONGI off
4592 .MNLIST
4593 F83C78 20 FF 3B jsr _feXAM ; test FAC = 0
4594 F83C7B D0 03 bne _FSGN1
4595 F83C7D A9 00 lda #0
4596 F83C7F 60 rts
4597 _FSGN1: ; test segno FAC
4598 F83C80 A5 40 LDA FACSGN
4599 _FSGN2: ; test segno A
4600 F83C82 2A ROL A
4601 F83C83 A9 FF LDA #$FF
4602 F83C85 B0 02 BCS _RTS7
Tue Jul 17 11:00:16 2018 Page 37
4603 F83C87 A9 01 LDA #$01
4604 F83C89 _RTS7:
4605 F83C89 60 RTS
4606 F83C8A _FSGN3:
4607 F83C8A CPU08 ; necessario
4608 F83C8A E2 30 sep #(PMFLAG.OR.PXFLAG)
4609 .LONGA off
4610 .LONGI off
4611 .MNLIST
4612 F83C8C A5 40 LDA FACSGN ; segno FAC
4613 F83C8E 90 F2 BCC _FSGN2 ; FAC > Float MEM (o ARG)
4614 F83C90 49 FF EOR #$FF ; inverte segno
4615 F83C92 80 EE BRA _FSGN2 ; FAC < Float MEM (o ARG)
4616
4617 F83C94
4618 ; _feCMPM: Confronta FAC con MEM
4619 ; In: CY -> puntatore memoria MEM
4620 ; Out: A = 1 se FAC > MEM (ZF = 0, NF == 0)
4621 ; A = 0 se FAC = MEM (ZF = 1)
4622 ; A = -1 se FAC < MEM (ZF = 0, NF == 1)
4623 ; Uso: A, B,PTR1,Y,X
4624 ; Note: Nessuna eccezione se FAC e/o Float MEM non valid1
4625 F83C94 _feCMPM:
4626 F83C94 85 60 STA PTR1 ; puntatore memoria
4627 F83C96 EB xba
4628 F83C97 85 61 STA PTR1+1
4629 F83C99 84 62 STY PTR1+2
4630 F83C9B A0 08 LDY #$08
4631 F83C9D CPU16
4632 F83C9D C2 30 rep #(PMFLAG.OR.PXFLAG)
4633 .LONGA on
4634 .LONGI on
4635 .MNLIST
4636 F83C9F B7 60 lda [PTR1],y ; EXP
4637 F83CA1 AA tax ; salva esponente in X
4638 F83CA2 29 FF 7F and #$7FFF ; maschera segno
4639 F83CA5 88 dey
4640 F83CA6 88 dey
4641 F83CA7 17 60 ?01: ora [PTR1],y ; test zero
4642 F83CA9 88 dey
4643 F83CAA 88 dey
4644 F83CAB 10 FA bpl ?01
4645 F83CAD A8 tay
4646 F83CAE F0 C6 BEQ _feSGN ; Float MEM = 0: ritorna sgn(FAC)
4647 F83CB0 8A txa ; segno
4648 F83CB1 EB xba ; A = segno
4649 F83CB2 ACC08
4650 F83CB2 E2 20 sep #PMFLAG
4651 .LONGA off
4652 .MNLIST
4653 F83CB4 45 40 EOR FACSGN
4654 F83CB6 30 BE BMI _feSGN ; Segni discordi: ritorna sgn(FAC)
4655 F83CB8 ACC16
4656 F83CB8 C2 20 rep #PMFLAG
4657 .LONGA on
4658 .MNLIST
4659 F83CBA 8A txa
Tue Jul 17 11:00:16 2018 Page 38
4660 F83CBB 29 FF 7F and #$7FFF ; esponente
4661 F83CBE C5 4A cmp FACExp
4662 F83CC0 90 C8 BCC _FSGN3 ; FAC > MEM
4663 F83CC2 D0 C6 BNE _FSGN3 ; FAC < MEM (CF = 1)
4664 ; gli esponenti sono uguali -- compare mantisse
4665 F83CC4 INDEX08
4666 F83CC4 E2 10 sep #PXFLAG
4667 .LONGI off
4668 .MNLIST
4669 F83CC6 A0 06 ldy #6
4670 F83CC8 B7 60 lda [PTR1],y ; MSB mantissa Float MEM
4671 F83CCA C5 48 CMP FAC+7
4672 F83CCC D0 BC BNE _FSGN3
4673 F83CCE 88 dey
4674 F83CCF 88 dey
4675 F83CD0 B7 60 lda [PTR1],y
4676 F83CD2 C5 46 CMP FAC+5
4677 F83CD4 D0 B4 BNE _FSGN3
4678 F83CD6 88 dey
4679 F83CD7 88 dey
4680 F83CD8 B7 60 lda [PTR1],y
4681 F83CDA C5 44 CMP FAC+3
4682 F83CDC D0 AC BNE _FSGN3
4683 F83CDE 88 dey
4684 F83CDF CPU08
4685 F83CDF E2 30 sep #(PMFLAG.OR.PXFLAG)
4686 .LONGA off
4687 .LONGI off
4688 .MNLIST
4689 F83CE1 B7 60 lda [PTR1],y
4690 F83CE3 C5 43 CMP FAC+2
4691 F83CE5 D0 A3 BNE _FSGN3
4692 F83CE7 88 dey
4693 F83CE8 A9 7F LDA #$7F ; bit di guardia
4694 F83CEA C5 41 CMP FACEXT ; CF settato
4695 F83CEC B7 60 lda [PTR1],y
4696 F83CEE E5 42 SBC FAC+1
4697 F83CF0 D0 98 BNE _FSGN3
4698 F83CF2 60 RTS ; FAC = Float MEM
4699
4700 ; _feCHS: cambia segno a FAC
4701 ; In: FAC supposto valido
4702 ; Out: FAC = -FAC
4703 ; Uso: A
4704 ; Note: INF e NAN assunti come validi
4705 F83CF3 _feCHS:
4706 F83CF3 20 FF 3B jsr _feXAM
4707 F83CF6 F0 06 BEQ ?01
4708 F83CF8 A5 40 LDA FACSGN
4709 F83CFA 49 FF EOR #$FF
4710 F83CFC 85 40 STA FACSGN
4711 F83CFE 60 ?01: RTS
4712
4713 ; _feABS: rende assoluto FAC
4714 ; In: FAC supposto valido
4715 ; Out: FAC = |FAC|
4716 ; Uso:
Tue Jul 17 11:00:16 2018 Page 39
4717 ; Note: Nessuna eccezione se FAC non valido
4718 F83CFF _feABS:
4719 F83CFF 64 40 STZ FACSGN
4720 F83D01 60 RTS
4721
4722 ;----------------------------------------------------------
4723 ; Funzioni move memoria/fac/arg
4724 ;----------------------------------------------------------
4725
4726 ; _MovRF2Tmp: Arrotonda FAC e lo copia nel reg. temporaneo
4727 ; In: FAC valido
4728 ; Out: FAC arrotondato copiato nel reg. temporaneo
4729 ; Note: FACEXT azzerato
4730 F83D02 _MovRF2Tmp:
4731 F83D02 20 43 38 JSR _Round
4732 F83D05 64 41 STZ FACEXT
4733 F83D07 A2 0B LDX #(FACSIZE+1) ; 12 bytes
4734 F83D09 B5 40 ?01: lda <FACSGN,x
4735 F83D0B 95 64 sta <FACTmp,x
4736 F83D0D CA dex
4737 F83D0E 10 F9 bpl ?01
4738 F83D10 60 rts
4739
4740 ; _MovTmp2A: Carica ARG da registro FAC temporaneo
4741 ; In: FACTmp valido
4742 ; Out: ARG caricato da memoria
4743 ; Uso: A, X
4744 ; Note: ARGSGN settato, ARGEXT azzerato
4745 F83D11 _MovTmp2A:
4746 F83D11 A2 0B LDX #(FACSIZE+1)
4747 F83D13 B5 64 ?01: lda <FACTmp,x
4748 F83D15 95 50 sta <ARGSGN,x
4749 F83D17 CA dex
4750 F83D18 10 F9 bpl ?01
4751 F83D1A 64 51 STZ ARGEXT
4752 F83D1C 60 rts
4753 F83D1D
4754 ; _MovF2Mem: Copia FAC in memoria
4755 ; In: CY -> ptr memoria
4756 ; Out: FAC copiato in memoria
4757 ; Uso: C,Y,PTR1
4758 ; Note: FACEXT azzerato
4759 F83D1D _MovF2Mem:
4760 F83D1D 85 60 STA PTR1
4761 F83D1F EB xba
4762 F83D20 85 61 STA PTR1+1
4763 F83D22 84 62 STY PTR1+2
4764 F83D24 80 0A BRA _FSTMEM
4765
4766 ; _MovRF2Mem: Arrotonda FAC e lo copia in memoria
4767 ; In: CY -> ptr memoria
4768 ; Out: FAC arrotondato copiato in memoria
4769 ; Uso: C,Y,PTR1
4770 ; Note: FACEXT azzerato
4771 ; Carica anche INF / NAN
4772 F83D26 _MovRF2Mem:
4773 F83D26 85 60 STA PTR1
Tue Jul 17 11:00:16 2018 Page 40
4774 F83D28 EB xba
4775 F83D29 85 61 STA PTR1+1
4776 F83D2B 84 62 STY PTR1+2
4777 F83D2D 20 43 38 JSR _Round
4778 F83D30 _FSTMEM:
4779 F83D30 A0 00 LDY #0
4780 F83D32 ACC16
4781 F83D32 C2 20 rep #PMFLAG
4782 .LONGA on
4783 .MNLIST
4784 F83D34 A5 42 LDA FAC+1
4785 F83D36 97 60 STA [PTR1],Y
4786 F83D38 C8 iny
4787 F83D39 C8 iny
4788 F83D3A A5 44 LDA FAC+3
4789 F83D3C 97 60 STA [PTR1],Y
4790 F83D3E C8 iny
4791 F83D3F C8 iny
4792 F83D40 A5 46 LDA FAC+5
4793 F83D42 97 60 STA [PTR1],Y
4794 F83D44 C8 iny
4795 F83D45 C8 iny
4796 F83D46 A5 48 LDA FAC+7
4797 F83D48 97 60 STA [PTR1],Y
4798 F83D4A C8 iny
4799 F83D4B C8 iny
4800 F83D4C ACC08
4801 F83D4C E2 20 sep #PMFLAG
4802 .LONGA off
4803 .MNLIST
4804 F83D4E A5 40 LDA FACSGN
4805 F83D50 29 80 AND #$80
4806 F83D52 EB xba
4807 F83D53 A9 00 lda #0
4808 F83D55 ACC16
4809 F83D55 C2 20 rep #PMFLAG
4810 .LONGA on
4811 .MNLIST
4812 F83D57 05 4A ora FACExp
4813 F83D59 97 60 STA [PTR1],Y
4814 F83D5B ACC08
4815 F83D5B E2 20 sep #PMFLAG
4816 .LONGA off
4817 .MNLIST
4818 F83D5D A0 00 ldy #0
4819 F83D5F 84 41 STY FACEXT
4820 F83D61 60 RTS
4821
4822 ; _MovMem2F: Carica FAC da memoria
4823 ; In: CY -> ptr memoria
4824 ; Out: FAC caricato da memoria
4825 ; Uso: C,Y,PTR1
4826 ; Note: FACSGN settato, FACEXT azzerato
4827 F83D62 _MovMem2F:
4828 F83D62 85 60 STA PTR1
4829 F83D64 EB xba
4830 F83D65 85 61 sta PTR1+1
Tue Jul 17 11:00:16 2018 Page 41
4831 F83D67 84 62 STY PTR1+2
4832 F83D69 _MovMem2Fa:
4833 F83D69 A0 00 LDY #0
4834 F83D6B ACC16
4835 F83D6B C2 20 rep #PMFLAG
4836 .LONGA on
4837 .MNLIST
4838 F83D6D B7 60 LDA [PTR1],Y
4839 F83D6F 85 42 STA FAC+1
4840 F83D71 C8 iny
4841 F83D72 C8 iny
4842 F83D73 B7 60 LDA [PTR1],Y
4843 F83D75 85 44 STA FAC+3
4844 F83D77 C8 iny
4845 F83D78 C8 iny
4846 F83D79 B7 60 LDA [PTR1],Y
4847 F83D7B 85 46 STA FAC+5
4848 F83D7D C8 iny
4849 F83D7E C8 iny
4850 F83D7F B7 60 LDA [PTR1],Y
4851 F83D81 85 48 STA FAC+7
4852 F83D83 C8 iny
4853 F83D84 C8 iny
4854 F83D85 B7 60 LDA [PTR1],Y
4855 F83D87 EB xba
4856 F83D88 A8 tay ; Y = segno
4857 F83D89 EB xba
4858 F83D8A 29 FF 7F and #$7FFF
4859 F83D8D 85 4A sta FACExp
4860 F83D8F 84 40 STY FACSGN
4861 F83D91 ACC08
4862 F83D91 E2 20 sep #PMFLAG
4863 .LONGA off
4864 .MNLIST
4865 F83D93 A0 00 ldy #0
4866 F83D95 84 41 STY FACEXT
4867 F83D97 60 RTS
4868
4869 ; _MovMem2A: Carica ARG da memoria
4870 ; In: CY -> ptr memoria
4871 ; Out: ARG caricato da memoria
4872 ; Uso: C,Y,PTR1
4873 ; Note: ARGSGN settato, ARGEXT azzerato
4874 F83D98 _MovMem2A:
4875 F83D98 85 60 STA PTR1
4876 F83D9A EB xba
4877 F83D9B 85 61 sta PTR1+1
4878 F83D9D 84 62 STY PTR1+2
4879 F83D9F A0 00 LDY #0
4880 F83DA1 ACC16
4881 F83DA1 C2 20 rep #PMFLAG
4882 .LONGA on
4883 .MNLIST
4884 F83DA3 B7 60 LDA [PTR1],Y
4885 F83DA5 85 52 STA ARG+1
4886 F83DA7 C8 iny
4887 F83DA8 C8 iny
Tue Jul 17 11:00:16 2018 Page 42
4888 F83DA9 B7 60 LDA [PTR1],Y
4889 F83DAB 85 54 STA ARG+3
4890 F83DAD C8 iny
4891 F83DAE C8 iny
4892 F83DAF B7 60 LDA [PTR1],Y
4893 F83DB1 85 56 STA ARG+5
4894 F83DB3 C8 iny
4895 F83DB4 C8 iny
4896 F83DB5 B7 60 LDA [PTR1],Y
4897 F83DB7 85 58 STA ARG+7
4898 F83DB9 C8 iny
4899 F83DBA C8 iny
4900 F83DBB B7 60 LDA [PTR1],Y
4901 F83DBD EB xba
4902 F83DBE A8 tay ; Y = segno
4903 F83DBF EB xba
4904 F83DC0 29 FF 7F and #$7FFF
4905 F83DC3 85 5A sta ARGExp
4906 F83DC5 84 50 STY ARGSGN
4907 F83DC7 ACC08
4908 F83DC7 E2 20 sep #PMFLAG
4909 .LONGA off
4910 .MNLIST
4911 F83DC9 A0 00 ldy #0
4912 F83DCB 84 51 STY ARGEXT
4913 F83DCD 60 RTS
4914
4915 ; _MovA2F: Copia ARG in FAC
4916 ; In: ARG
4917 ; Out: ARG -> FAC
4918 ; Uso: A,X
4919 ; Note: FACSGN settato, FACEXT azzerato
4920 F83DCE _MovA2F:
4921 F83DCE A5 50 LDA ARGSGN
4922 F83DD0
4923 ; Copia ARG in FAC e setta il segno in A
4924 F83DD0 _MovA2FS:
4925 F83DD0 85 40 STA FACSGN
4926 F83DD2 A2 0A LDX #FACSIZE
4927 F83DD4 B5 51 ?01: LDA <ARG,X
4928 F83DD6 95 41 STA <FAC,X
4929 F83DD8 CA DEX
4930 F83DD9 D0 F9 BNE ?01
4931 F83DDB 86 41 STX FACEXT
4932 F83DDD 60 RTS
4933
4934 ; _MovRndF2A: Arrotonda FAC e lo copia in ARG
4935 ; In: FAC
4936 ; Out: FAC arrotondato -> ARG
4937 ; Uso: A,X,Y
4938 ; Note: ARGSGN settato, FACEXT e ARGEXT azzerati
4939 ; PUO' GENERARE ECCEZIONI
4940 F83DDE _MovRndF2A:
4941 F83DDE 20 43 38 JSR _Round ; arrotonda FAC: può causare eccezioni
4942
4943 ; _MovF2A: Copia FAC in ARG
4944 ; In: FAC
Tue Jul 17 11:00:16 2018 Page 43
4945 ; Out: FAC -> ARG
4946 ; Uso: A,X,Y
4947 ; Note: ARGSGN settato, FACEXT e ARGEXT azzerati
4948 F83DE1 _MovF2A:
4949 F83DE1 A5 40 LDA FACSGN
4950 F83DE3 85 50 STA ARGSGN
4951 F83DE5 A2 0A LDX #FACSIZE
4952 F83DE7 B5 41 ?01: LDA <FAC,X
4953 F83DE9 95 51 STA <ARG,X
4954 F83DEB CA DEX
4955 F83DEC D0 F9 BNE ?01
4956 F83DEE 86 41 STX FACEXT
4957 F83DF0 86 51 STX ARGEXT
4958 F83DF2 18 _RTS6c: clc
4959 F83DF3 60 _RTS6: RTS
4960
4961 ;-------------------------------------------------------------
4962 ; Calcola potenza di 10: FAC = FAC*(10^C)
4963 ;-------------------------------------------------------------
4964
4965 ; In - C -> potenza di 10 (signed)
4966 ; - FAC valido
4967 ;
4968 ; Out - FAC * (10 ^ FPExp)
4969 ; USO: FPWTmp7, FPWTmp8, FPExp
4970 F83DF4 _fePOW10:
4971 F83DF4 ACC16
4972 F83DF4 C2 20 rep #PMFLAG
4973 .LONGA on
4974 .MNLIST
4975 F83DF6 85 5E sta FPExp
4976 F83DF8 A2 00 ldx #0
4977 F83DFA 24 5E bit FPExp
4978 F83DFC 10 07 bpl ?00 ; C positivo
4979 F83DFE 8A txa ; C = 0
4980 F83DFF CA dex ; C negativo
4981 F83E00 38 sec
4982 F83E01 E5 5E sbc FPExp ; complementa
4983 F83E03 85 5E sta FPExp
4984 F83E05 86 3E ?00: stx FPWTmp8 ; flag segno C
4985 F83E07 C9 00 10 cmp #4096 ; limite max
4986 F83E0A ACC08
4987 F83E0A E2 20 sep #PMFLAG
4988 .LONGA off
4989 .MNLIST
4990 F83E0C 90 28 bcc ?04 ; M < 4096
4991 ; M = 4096
4992 F83E0E A9 45 ?01: LDA #.HIGH.FCon1E4096
4993 F83E10 EB xba
4994 F83E11 A9 52 LDA #.LOW.FCon1E4096
4995 F83E13 A0 F8 LDY #.SEG.FCon1E4096
4996 F83E15 24 3E bit FPWTmp8
4997 F83E17 30 07 bmi ?02 ; div
4998 F83E19 20 E9 38 JSR _feMULM ; FAC = FAC*10^4096
4999 F83E1C B0 D5 BCS _RTS6 ; eccezione -> esce
5000 F83E1E 90 05 BCC ?03
5001 F83E20 20 20 3A ?02: JSR _feDIVRM ; FAC = FAC/10^4096
Tue Jul 17 11:00:16 2018 Page 44
5002 F83E23 B0 CE BCS _RTS6 ; eccezione -> esce
5003 F83E25 20 43 38 ?03: jsr _Round ; ****
5004 F83E28 B0 C9 bcs _RTS6 ; ****
5005 F83E2A ACC16
5006 F83E2A C2 20 rep #PMFLAG
5007 .LONGA on
5008 .MNLIST
5009 F83E2C 38 SEC ; M = M - 4096
5010 F83E2D A5 5E lda FPExp
5011 F83E2F E9 00 10 sbc #4096
5012 F83E32 85 5E sta FPExp
5013 F83E34 ACC08
5014 F83E34 E2 20 sep #PMFLAG
5015 .LONGA off
5016 .MNLIST
5017 F83E36 A5 5E ?04: LDA FPExp ; ora M < 4096
5018 F83E38 05 5F ORA FPExp+1
5019 F83E3A F0 B6 BEQ _RTS6c ; se M = 0 esce con C = 0
5020 F83E3C 20 02 3D jsr _MovRF2Tmp ; round FAC -> registro temporaneo
5021 F83E3F B0 B2 ?04a: BCS _RTS6 ; eccezione -> esce
5022 F83E41 A5 5E LDA FPExp
5023 F83E43 29 07 AND #7 ; calcola offset costanti 1e0 - 1e7
5024 F83E45 85 3F STA FPWTmp8+1
5025 F83E47 0A ASL A ; moltiplica x 10
5026 F83E48 0A ASL A
5027 F83E49 18 CLC
5028 F83E4A 65 3F ADC FPWTmp8+1
5029 F83E4C 0A ASL A
5030 F83E4D 18 CLC
5031 F83E4E 69 A8 ADC #.LOW.FCon1E0
5032 F83E50 EB xba
5033 F83E51 A9 44 LDA #.HIGH.FCon1E0
5034 F83E53 90 01 BCC ?05
5035 F83E55 1A INC A
5036 F83E56 EB ?05: xba
5037 F83E57 A0 F8 LDY #.SEG.FCon1E0
5038 F83E59 20 62 3D JSR _MovMem2F ; FAC = 1e0..1e7
5039 F83E5C ACC16
5040 F83E5C C2 20 rep #PMFLAG
5041 .LONGA on
5042 .MNLIST
5043 F83E5E A5 5E lda FPExp ; divide FPExp x 8
5044 F83E60 4A LSR A
5045 F83E61 4A LSR A
5046 F83E62 4A LSR A
5047 F83E63 85 5E STA FPExp
5048 F83E65 A9 F8 44 LDA #FCon1E8
5049 F83E68 85 3C STA FPWTmp7 ; indirizzo 1E8
5050 F83E6A ACC08
5051 F83E6A E2 20 sep #PMFLAG
5052 .LONGA off
5053 .MNLIST
5054 F83E6C 80 22 BRA ?11
5055 F83E6E 46 5F ?08: LSR FPExp+1 ; divide x 2
5056 F83E70 66 5E ROR FPExp
5057 F83E72 90 11 BCC ?10
5058 F83E74 A5 3D LDA FPWTmp7+1 ; FAC = FAC * (1E8..1E4096)
Tue Jul 17 11:00:16 2018 Page 45
5059 F83E76 EB xba
5060 F83E77 A5 3C LDA FPWTmp7
5061 F83E79 A0 F8 LDY #.SEG.FCon1E0
5062 F83E7B 20 E9 38 JSR _feMULM
5063 F83E7E B0 BF BCS ?04a ; eccezione -> esce
5064 F83E80
5065 F83E80 20 43 38 jsr _Round ; ****
5066 F83E83 B0 BA BCS ?04a ; ****
5067 F83E85
5068 F83E85 18 ?10: CLC
5069 F83E86 A5 3C LDA FPWTmp7
5070 F83E88 69 0A ADC #10
5071 F83E8A 85 3C STA FPWTmp7
5072 F83E8C 90 02 BCC ?11
5073 F83E8E E6 3D INC FPWTmp7+1
5074 F83E90 A5 5E ?11: LDA FPExp
5075 F83E92 05 5F ORA FPExp+1
5076 F83E94 D0 D8 BNE ?08
5077 F83E96 20 11 3D jsr _MovTmp2A ; FAC temporaneo -> ARG
5078 F83E99 24 3E bit FPWTmp8 ; segno
5079 F83E9B 30 05 bmi ?12
5080 F83E9D 20 EC 38 jsr _feMUL
5081 F83EA0 80 03 bra ?14
5082 F83EA2 20 30 3A ?12: jsr _feDIV
5083 F83EA5 4C 43 38 ?14: jmp _Round
5084
5085 ;-------------------------------------------------------------
5086 ; Scala FAC in modo che sia 1E18 <= FAC <= MAX UINT
5087 ;-------------------------------------------------------------
5088
5089 ; _feSCALE10 - scala FAC e calcola esponente decimale
5090 ; In - FAC positivo
5091 ; Out - 1E18 <= FAC <= MAX UINT
5092 ; XVDec -> esponente decimale (signed)
5093 ; Se FAC >= 1E19 XVDec va incrementato
5094 ; NOTA - ARG, ACM, IARG distrutti
5095 F83EA8 _feSCALE10:
5096 ; si determina una stima per difetto dell'esponente decimale.
5097 ; Per il calcolo approssimato si esegue la moltiplicazione (signed)
5098 ; di [LOG10(2) * $10000] per esponente di FAC
5099 F83EA8 ACC16
5100 F83EA8 C2 20 rep #PMFLAG
5101 .LONGA on
5102 .MNLIST
5103 F83EAA 38 sec ; depolarizzazione esponente
5104 F83EAB A5 4A lda FACExp
5105 F83EAD E9 FF 3F sbc #EXPBIAS
5106 F83EB0 85 18 sta ACM ; ACM, ACM+1 -> esponente
5107 F83EB2 A9 10 4D lda #LOG2H ; LOG10(2) * $10000
5108 F83EB5 85 28 sta IARG
5109 F83EB7 ACC08
5110 F83EB7 E2 20 sep #PMFLAG
5111 .LONGA off
5112 .MNLIST
5113 F83EB9 20 A4 2A jsr _iSMult16 ; signed mult 16 x 16
5114 F83EBC
5115 ; la stima dell'esponente si trova nei 16 bit alti del risultato
Tue Jul 17 11:00:16 2018 Page 46
5116 F83EBC ACC16
5117 F83EBC C2 20 rep #PMFLAG
5118 .LONGA on
5119 .MNLIST
5120 F83EBE A5 1A lda ACM+2
5121 F83EC0 85 14 sta XVDec
5122 F83EC2
5123 ; si calcola ora lo scalamento di FAC per fare in modo che sia
5124 ; compreso tra 1E18 ed 1E19
5125 F83EC2 38 sec
5126 F83EC3 A9 12 00 lda #MAXDIGITS-1
5127 F83EC6 E5 14 sbc XVDec
5128 F83EC8
5129 ; C = potenza di 10 per scalare FAC
5130 F83EC8 ACC08
5131 F83EC8 E2 20 sep #PMFLAG
5132 .LONGA off
5133 .MNLIST
5134 F83ECA 20 F4 3D jsr _fePOW10 ; scala FAC e arrotonda
5135 F83ECD A9 44 lda #.HIGH.FCon1E19
5136 F83ECF EB xba
5137 F83ED0 A9 9E lda #.LOW.FCon1E19 ; confronta FAC con 1E19
5138 F83ED2 A0 F8 ldy #.SEG.FCon1E19
5139 F83ED4 20 94 3C jsr _feCMPM
5140 F83ED7 30 18 bmi ?40 ; FAC < 1E19 => test FAC >= 1E18
5141 F83ED9 ACC16
5142 F83ED9 C2 20 rep #PMFLAG
5143 .LONGA on
5144 .MNLIST
5145 F83EDB A5 4A lda FACExp ; situazione in cui ci sono
5146 F83EDD C9 3E 40 cmp #BIASQWORD ; 20 cifre significative
5147 F83EE0 ACC08
5148 F83EE0 E2 20 sep #PMFLAG
5149 .LONGA off
5150 .MNLIST
5151 F83EE2 F0 27 beq ?50 ; 1E19 <= FAC <= MAX UINT (20 digit)
5152 F83EE4 20 19 3A jsr _feDIV10 ; FAC > MAX UINT => FAC = FAC/10
5153 F83EE7 20 43 38 jsr _Round
5154 F83EEA ACC16
5155 F83EEA C2 20 rep #PMFLAG
5156 .LONGA on
5157 .MNLIST
5158 F83EEC E6 14 inc XVDec ; incrementa esp. decimale
5159 F83EEE ACC08
5160 F83EEE E2 20 sep #PMFLAG
5161 .LONGA off
5162 .MNLIST
5163 F83EF0 60 rts
5164 F83EF1 A9 44 ?40: lda #.HIGH.FCon1E18
5165 F83EF3 EB xba
5166 F83EF4 A9 94 lda #.LOW.FCon1E18 ; confronta FAC con 1E18
5167 F83EF6 A0 F8 ldy #.SEG.FCon1E18
5168 F83EF8 20 94 3C jsr _feCMPM
5169 F83EFB 10 0E bpl ?50 ; FAC > 1E18
5170 F83EFD F0 0C beq ?50 ; FAC = 1E18
5171 F83EFF 20 E4 39 jsr _feMUL10 ; FAC = FAC * 10
5172 F83F02 20 43 38 jsr _Round
Tue Jul 17 11:00:16 2018 Page 47
5173 F83F05 ACC16
5174 F83F05 C2 20 rep #PMFLAG
5175 .LONGA on
5176 .MNLIST
5177 F83F07 C6 14 dec XVDec ; decrementa esp. decimale
5178 F83F09 ACC08
5179 F83F09 E2 20 sep #PMFLAG
5180 .LONGA off
5181 .MNLIST
5182 F83F0B 60 ?50: rts
5183 F83F0C
5184 ;-------------------------------------------------------------
5185 ; CONVERSIONE DA FLOAT POINT NUMBER A INTEGER 64 BIT
5186 ;-------------------------------------------------------------
5187
5188 ; Converte FAC in UNSIGNED INTEGER 64 bit
5189 ; In: FAC
5190 ; Out: INTEGER con MSB in IARG+7, LSB in IARG
5191 ; Y = 0
5192 ; CF = 1 in caso di errore (overflow)
5193 ; Uso: A,X,Y - FAC distrutto
5194 ; Note: La conversione avviene mediante shift a destra fino
5195 ; a quando la parte frazionaria e' fuori mantissa
5196 ; L'esponente deve essere compreso tra $00 e $3F
5197 F83F0C _feFAC2I:
5198 F83F0C ACC16
5199 F83F0C C2 20 rep #PMFLAG
5200 .LONGA on
5201 .MNLIST
5202 F83F0E 64 28 STZ IARG ; azzera risultato
5203 F83F10 64 2A STZ IARG+2
5204 F83F12 64 2C STZ IARG+4
5205 F83F14 64 2E STZ IARG+6
5206 F83F16 A5 4A lda FACExp
5207 F83F18 F0 38 beq ?10 ; result = 0 -- OK (CF = 0)
5208 F83F1A C9 FF 3F cmp #EXPBIAS ; EXP < 0 => result = 0 (CF = 0)
5209 F83F1D 90 33 bcc ?10
5210 F83F1F C9 3F 40 cmp #BIASQWORD+1
5211 F83F22 B0 32 bcs ?20 ; EXP > $3F => overflow (CF = 1)
5212 F83F24 38 SEC ; depolarizza esponente
5213 F83F25 E9 FF 3F SBC #EXPBIAS
5214 F83F28 ACC08 ; B = 0, A = 00..3F
5215 F83F28 E2 20 sep #PMFLAG
5216 .LONGA off
5217 .MNLIST
5218 F83F2A E9 40 SBC #FACMBITS ; A = numero shift a destra (negativo)
5219 F83F2C 1A inc a
5220 F83F2D F0 11 beq ?05 ; no shift -- copia FAC in IARG
5221 F83F2F A2 41 LDX #FAC ; puntatore FAC
5222 F83F31 C9 F9 CMP #$F9 ; numero di shift a destra
5223 F83F33 10 05 BPL ?02 ; shift bit x bit
5224 ; qui CF = 0
5225 F83F35 20 C8 38 JSR _RShiftXB ; shift byte x byte
5226 F83F38 80 06 BRA ?05
5227 F83F3A A8 ?02: TAY
5228 F83F3B F0 03 BEQ ?05 ; nessuno shift da effettuare
5229 F83F3D 20 D5 38 JSR _RShiftXN
Tue Jul 17 11:00:16 2018 Page 48
5230 F83F40 ?05: ACC16
5231 F83F40 C2 20 rep #PMFLAG
5232 .LONGA on
5233 .MNLIST
5234 F83F42 A5 42 lda FACM
5235 F83F44 85 28 sta IARG
5236 F83F46 A5 44 lda FACM+2
5237 F83F48 85 2A sta IARG+2
5238 F83F4A A5 46 lda FACM+4
5239 F83F4C 85 2C sta IARG+4
5240 F83F4E A5 48 lda FACM+6
5241 F83F50 85 2E sta IARG+6
5242 F83F52 ?10: ACC08
5243 F83F52 E2 20 sep #PMFLAG
5244 .LONGA off
5245 .MNLIST
5246 F83F54 18 CLC
5247 F83F55 60 RTS
5248 F83F56 ?20: ACC08
5249 F83F56 E2 20 sep #PMFLAG
5250 .LONGA off
5251 .MNLIST
5252 F83F58 38 SEC
5253 F83F59 60 RTS
5254
5255 ;-------------------------------------------------------------
5256 ; CONVERSIONE DA STRINGA A FLOATING POINT NUMBER
5257 ;-------------------------------------------------------------
5258
5259 F83F5A _Str2Fl:
5260 F83F5A CPU08
5261 F83F5A E2 30 sep #(PMFLAG.OR.PXFLAG)
5262 .LONGA off
5263 .LONGI off
5264 .MNLIST
5265 F83F5C C2 C3 rep #(PNFLAG.OR.PVFLAG.OR.PCFLAG.OR.PZFLAG)
5266 F83F5E 08 php
5267 F83F5F 8B phb ; salva DBR
5268 F83F60 0B phd ; salva DPR
5269 F83F61 F4 00 02 pea #DP02ADDR ; imposta DPR a pag 2
5270 F83F64 2B pld
5271 F83F65 A0 00 ldy #0
5272 F83F67 5A phy
5273 F83F68 AB plb ; imposta DBR su banco 0
5274 F83F69
5275 ; relativo stack: 01 -> DPR, 03 -> DBR, 04 -> P
5276
5277 F83F69 ACC16
5278 F83F69 C2 20 rep #PMFLAG
5279 .LONGA on
5280 .MNLIST
5281 F83F6B 85 60 sta PTR1 ; long ptr stringa
5282 F83F6D 64 5E stz FPExp
5283 F83F6F ACC08
5284 F83F6F E2 20 sep #PMFLAG
5285 .LONGA off
5286 .MNLIST
Tue Jul 17 11:00:16 2018 Page 49
5287 F83F71 86 62 stx PTR1+2
5288 F83F73 20 B0 3B jsr _feLDZ ; azzera FAC
5289 F83F76 64 63 stz FPFlag
5290 F83F78 64 4F stz FPDCnt
5291 F83F7A A0 FF LDY #$FF
5292 F83F7C C8 ?02: INY
5293 F83F7D C0 7F CPY #MAXDECSTR
5294 F83F7F 90 03 bcc ?02a
5295 F83F81 4C 0F 40 jmp ?15 ; fine stringa
5296 F83F84 B7 60 ?02a: LDA [PTR1],Y ; elimina spazi iniziali
5297 F83F86 D0 03 bne ?02b
5298 F83F88 4C 0F 40 jmp ?15 ; fine stringa
5299 F83F8B C9 20 ?02b: CMP #' '
5300 F83F8D F0 ED BEQ ?02 ; scarta spazio
5301 F83F8F C9 2B CMP #'+'
5302 F83F91 F0 08 BEQ ?03 ; scarta segno +
5303 F83F93 C9 2D CMP #'-'
5304 F83F95 D0 09 BNE ?04
5305 F83F97 A9 80 lda #$80
5306 F83F99 04 63 tsb FPFLAG ; FPFLAG[7] = segno - mantissa
5307 F83F9B C8 ?03: INY ; next char
5308 F83F9C C0 7F CPY #MAXDECSTR
5309 F83F9E F0 6F BEQ ?15
5310 F83FA0 B7 60 ?04: LDA [PTR1],Y ; carica digit
5311 F83FA2 F0 6B BEQ ?15 ; fine stringa
5312 F83FA4 38 SEC ; next digit decimale
5313 F83FA5 E9 3A SBC #('0'+10)
5314 F83FA7 18 CLC
5315 F83FA8 69 0A ADC #10
5316 F83FAA 90 1F BCC ?06 ; no digit
5317 F83FAC AA tax ; X = digit
5318 F83FAD A9 20 lda #$20
5319 F83FAF 24 63 bit FPFLAG ; test bit 5
5320 F83FB1 D0 0C bne ?05 ; processa digit esponente
5321 F83FB3 A9 10 lda #$10
5322 F83FB5 04 63 tsb FPFLAG ; FPFLAG[4] -> flag digit mantissa
5323 F83FB7 8A txa ; A = digit
5324 F83FB8 20 7D 40 JSR _AddDigit ; aggiunge digit a FAC
5325 F83FBB 90 DE bcc ?03 ; ok, next char
5326 F83FBD B0 47 bcs ?12 ; errore overflow, fine processo
5327 ?05: ; processa digit esponente
5328 F83FBF A9 04 lda #$04
5329 F83FC1 04 63 tsb FPFLAG ; FPFLAG[2] -> flag digit esponente
5330 F83FC3 8A txa ; A = digit
5331 F83FC4 20 9D 40 JSR _AddExpDigit
5332 F83FC7 90 D2 BCC ?03 ; ok, next exp digit
5333 F83FC9 B0 3B BCS ?12 ; overflow esponente, fine processo
5334 ?06: ; no digit: test per dot decimale o esponente
5335 F83FCB 69 30 ADC #'0'
5336 F83FCD C9 2E CMP #'.'
5337 F83FCF D0 10 BNE ?07
5338 ; char corrente '.' -- se non vi sono digit precedenti -> errore
5339 F83FD1 A9 10 lda #$10
5340 F83FD3 24 63 bit FPFLAG ; test bit 4
5341 F83FD5 F0 3C BEQ ?20 ; non vi sono digit precedenti -> errore
5342 F83FD7 24 63 BIT FPFLAG ; test dot gia' presente
5343 F83FD9 70 38 BVS ?20 ; dot gia' processato -> errore
Tue Jul 17 11:00:16 2018 Page 50
5344 F83FDB A9 40 lda #$40
5345 F83FDD 04 63 tsb FPFLAG ; set bit 6 -> dot
5346 F83FDF 80 BA bra ?03 ; next char
5347 F83FE1 C9 45 ?07: CMP #'E'
5348 F83FE3 F0 04 BEQ ?08 ; -> esponente
5349 F83FE5 C9 65 CMP #'e'
5350 F83FE7 D0 2A BNE ?20 ; carattere illegale -> errore
5351 ; processa esponente decimale
5352 F83FE9 A9 10 ?08: lda #$10
5353 F83FEB 24 63 bit FPFLAG ; test bit 4
5354 F83FED F0 24 BEQ ?20 ; non vi sono digit precedenti -> errore
5355 F83FEF A9 20 lda #$20
5356 F83FF1 04 63 tsb FPFLAG ; FPFLAG[5] -> flag esponente
5357 F83FF3 C8 INY ; next char
5358 F83FF4 B7 60 LDA [PTR1],y
5359 F83FF6 F0 17 BEQ ?15 ; fine stringa
5360 F83FF8 C9 2B CMP #'+'
5361 F83FFA F0 9F BEQ ?03 ; scarta segno +
5362 F83FFC C9 2D CMP #'-'
5363 F83FFE D0 A0 BNE ?04 ; processa stesso char
5364 F84000 A9 08 lda #$08
5365 F84002 04 63 tsb FPFLAG ; FPFLAG[3] = segno - esponente
5366 F84004 80 95 BRA ?03
5367 F84006
5368 ?12: ; processa errore di overflow
5369 F84006 84 3B STY FPIndx ; salva indice stringa
5370 F84008 A6 63 ldx FPFLAG ; segno attuale per INF
5371 F8400A 20 73 3B JSR _feLDINF ; FAC = +/- INF
5372 F8400D 80 58 BRA ?99 ; esce
5373 F8400F
5374 ; entry fine stringa
5375 F8400F A9 02 ?15: lda #$02
5376 F84011 04 63 tsb FPFLAG ; FPFLAG[1] -> flag fine stringa
5377 F84013
5378 ; entry per fine prematura processo scansione
5379 F84013 84 3B ?20: STY FPIndx ; salva indice Y
5380 F84015 A9 10 lda #$10
5381 F84017 24 63 bit FPFLAG ; test bit 4
5382 F84019 D0 05 bne ?22 ; OK mantissa presente
5383 F8401B 20 86 3B ?21: JSR _feLDNAN ; numero non valido -> invalid
5384 F8401E 80 47 BRA ?99 ; esce
5385 F84020
5386 F84020 A9 20 ?22: lda #$20
5387 F84022 24 63 bit FPFLAG ; test bit 5
5388 F84024 F0 06 beq ?25 ; OK - no forma exp
5389 F84026 A9 04 lda #$04
5390 F84028 24 63 bit FPFLAG ; test bit 2
5391 F8402A F0 EF beq ?21 ; errore -- forma exp ma mancano digit exp
5392
5393 ?25: ; sintatticamente la conversione sembra corretta
5394 ; si verificano ora le condizioni di overflow
5395 F8402C ACC16
5396 F8402C C2 20 rep #PMFLAG
5397 .LONGA on
5398 .MNLIST
5399 F8402E A5 5E lda FPExp
5400 F84030 C9 87 13 cmp #EXP10LIM
Tue Jul 17 11:00:16 2018 Page 51
5401 F84033 ACC08
5402 F84033 E2 20 sep #PMFLAG
5403 .LONGA off
5404 .MNLIST
5405 F84035 B0 CF bcs ?12 ; overflow
5406 F84037 38 SEC
5407 F84038 A9 00 LDA #0 ; cambia segno al numero di digit decimali
5408 F8403A E5 4F SBC FPDCNT
5409 F8403C 85 38 STA FPWTmp5 ; salva -N (cifre dopo il punto decimale)
5410 F8403E A9 00 LDA #0
5411 F84040 E9 00 SBC #0
5412 F84042 85 39 STA FPWTmp5+1
5413 F84044 A9 08 ?27: lda #$08
5414 F84046 24 63 bit FPFLAG ; test bit 3
5415 F84048 ACC16
5416 F84048 C2 20 rep #PMFLAG
5417 .LONGA on
5418 .MNLIST
5419 F8404A F0 08 beq ?30 ; exp positivo
5420 F8404C 38 SEC
5421 F8404D A9 00 00 lda #0
5422 F84050 E5 5E sbc FPExp
5423 F84052 85 5E sta FPExp ; esponente negativo, cambia segno
5424 F84054 18 ?30: CLC
5425 F84055 A5 5E lda FPExp
5426 F84057 65 38 adc FPWTmp5 ; E = E + (-N)
5427 F84059 ACC08
5428 F84059 E2 20 sep #PMFLAG
5429 .LONGA off
5430 .MNLIST
5431 F8405B 20 F4 3D JSR _fePOW10
5432 F8405E B0 A6 bcs ?12 ; overflow
5433 F84060 A6 63 ldx FPFLAG
5434 F84062 86 40 stx FACSGN
5435 F84064 20 FF 3B jsr _feXAM ; get flag FAC
5436 F84067 08 ?99: php ; salva flag
5437 F84068 68 pla ; A = flag
5438 F84069 29 C3 and #$C3 ; maschera on N,V,C,Z
5439 F8406B 03 04 ora $04,s ; imposta N,V,C,Z nello stack
5440 F8406D 83 04 sta $04,s
5441 F8406F ACC16
5442 F8406F C2 20 rep #PMFLAG
5443 .LONGA on
5444 .MNLIST
5445 F84071 A5 60 lda PTR1
5446 F84073 ACC08
5447 F84073 E2 20 sep #PMFLAG
5448 .LONGA off
5449 .MNLIST
5450 F84075 A6 62 ldx PTR1+2 ; CX => long ptr stringa
5451 F84077 A4 3B ldy FPIndx ; Y = indice primo chr dove si arresta conv.
5452 F84079 2B pld ; restore DPR
5453 F8407A AB plb ; restore DBR
5454 F8407B 28 plp ; restore flag conversione
5455 F8407C 60 RTS
5456
5457 ; esegue FAC = A + (FAC * 10)
Tue Jul 17 11:00:16 2018 Page 52
5458 F8407D _AddDigit:
5459 F8407D 5A PHY ; salva Y
5460 F8407E 48 PHA ; salva A
5461 F8407F 24 63 BIT FPFLAG ; FPFLAG[6] -> dot decimale
5462 F84081 50 02 BVC ?01
5463 F84083 E6 4F INC FPDCNT ; incrementa contatore digit
5464 F84085 20 E4 39 ?01: JSR _feMUL10 ; FAC = FAC * 10
5465 F84088 B0 10 bcs ?04 ; errore
5466 F8408A 20 DE 3D JSR _MovRndF2A ; copia FAC arrotondato in ARG
5467 F8408D B0 0B bcs ?04 ; errore
5468 F8408F 68 PLA ; ripristina A
5469 F84090 20 BF 40 JSR _Byte2FAC ; converte byte in float
5470 F84093 B0 03 bcs ?02
5471 F84095 20 04 37 JSR _feADD ; FAC = (FAC * 10) + A
5472 F84098 7A ?02: PLY ; ripristina Y
5473 F84099 60 RTS
5474 F8409A 68 ?04: pla
5475 F8409B 7A ply
5476 F8409C 60 rts
5477 F8409D
5478 ; Aggiunge un digit all'esponente FPExp
5479 ; In - A = digit
5480 ; - FPExp = esponente
5481 ;
5482 ; Out - FPExp = (FPExp * 10) + A
5483 ; In caso di overflow -> CF = 1
5484 F8409D _AddExpDigit:
5485 F8409D EB xba
5486 F8409E A9 00 lda #0
5487 F840A0 EB xba ; B = 0
5488 F840A1 ACC16
5489 F840A1 C2 20 rep #PMFLAG
5490 .LONGA on
5491 .MNLIST
5492 F840A3 48 PHA ; salva C
5493 F840A4 A5 5E LDA FPExp ; salva FPExp
5494 F840A6 85 38 STA FPWTmp5
5495 F840A8 0A asl a ; FPExp * 2
5496 F840A9 B0 0A bcs ?01
5497 F840AB 0A asl a ; FPExp * 4
5498 F840AC B0 07 bcs ?01
5499 F840AE 65 38 adc FPWTmp5 ; FPExp * 5
5500 F840B0 B0 03 bcs ?01
5501 F840B2 0A asl a ; FPExp * 10
5502 F840B3 85 5E sta FPExp
5503 F840B5 68 ?01: pla ; ripristina C
5504 F840B6 B0 04 bcs ?02
5505 F840B8 65 5E adc FPExp ; FPExp * 10 + A
5506 F840BA 85 5E sta FPExp
5507 F840BC ?02: ACC08
5508 F840BC E2 20 sep #PMFLAG
5509 .LONGA off
5510 .MNLIST
5511 F840BE 60 rts
5512
5513 ; converte byte in floating point
5514 ; In: A = byte
Tue Jul 17 11:00:16 2018 Page 53
5515 ; Out: FAC
5516 ; Uso: A,X,Y
5517 F840BF _Byte2FAC:
5518 F840BF 85 49 STA FAC+8
5519 F840C1 64 48 STZ FAC+7
5520 F840C3 64 41 STZ FACEXT
5521 F840C5 64 40 STZ FACSGN
5522 F840C7 ACC16
5523 F840C7 C2 20 rep #PMFLAG
5524 .LONGA on
5525 .MNLIST
5526 F840C9 64 46 STZ FAC+5
5527 F840CB 64 44 STZ FAC+3
5528 F840CD 64 42 STZ FAC+1
5529 F840CF A9 06 40 LDA #BIASBYTE
5530 F840D2 85 4A STA FACExp
5531 F840D4 ACC08
5532 F840D4 E2 20 sep #PMFLAG
5533 .LONGA off
5534 .MNLIST
5535 F840D6 4C D9 37 JMP _Normalize
5536
5537 ;-------------------------------------------------------------
5538 ; CONVERSIONE DA FLOAT POINT NUMBER A STRINGA DECIMALE
5539 ;-------------------------------------------------------------
5540
5541 ; _feFAC2S - converte FAC in stringa decimale
5542 ; In - FAC caricato o da operazione precedente
5543 ; A<7> -> 0 (utilizzato per segno FAC)
5544 ; A<6> -> formato G $40
5545 ; A<5> -> formato F (se <6> = 0) $20
5546 ; A<4> -> formato alternativo # $10
5547 ; A<3> -> CAPS formato (G, F, E) $08
5548 ; A<2> -> formato a/A $04
5549 ; A<1> -> blank se positivo $02
5550 ; A<0> -> segno '+'/blank se positivo $01
5551 ; X -> precisione richiesta
5552 ; DPR -> DP02ADDR (pagina 02)
5553 ; DBR -> banco 0
5554 ;
5555 ; Out - XCVTStr -> stringa decimale formattata
5556 ; A = Y = lunghezza stringa
5557 ; X = puntatore stringa
5558 F840D9 _feFAC2S:
5559 F840D9 29 7F and #$7F ; <7> -> segno FAC = 0
5560 F840DB 85 16 sta XVFlag ; salva flag
5561 F840DD 89 04 bit #$04
5562 F840DF F0 03 beq ?00
5563 F840E1 4C F5 43 jmp aform ; formato a/A
5564 ?00: ; X = precisione
5565 F840E4 E0 30 cpx #XCVTMAXF+1 ; limite preventivo alla precisione
5566 F840E6 90 02 bcc ?01
5567 F840E8 A2 2F ldx #XCVTMAXF
5568 F840EA 24 16 ?01: bit XVFlag ; <6> -> VF test richiesta formato G
5569 F840EC 50 05 bvc ?01b ; no G
5570 F840EE 9B txy
5571 F840EF F0 08 beq ?01c ; formato G -> se prec. = 0 -> prec = 1
Tue Jul 17 11:00:16 2018 Page 54
5572 F840F1 D0 07 bne ?01z ; store prec. formato G
5573 F840F3 A9 20 ?01b: lda #$20 ; richiesto formato E ?
5574 F840F5 24 16 bit XVFlag
5575 F840F7 D0 01 bne ?01z ; NO -- store prec
5576 F840F9 E8 ?01c: inx ; formato E incrementa precisione
5577 ; dato che ha sempre un digit prima del dot
5578 F840FA 86 0A ?01z: stx FmtPrec ; precisione richiesta (provvisoria)
5579 ; la precisione per il formato F puo' essere controllata solo
5580 ; dopo che e' stato determinato il numero di decimali
5581 F840FC 24 40 bit FACSGN ; testo segno FAC
5582 F840FE 10 04 bpl ?02 ; positivo
5583 F84100 A9 80 lda #$80 ; <7> -> segno FAC = 1
5584 F84102 04 16 tsb XVFlag ; imposta segno negativo
5585 F84104 64 40 ?02: stz FACSGN ; FAC = ABS(FAC)
5586 F84106 20 FF 3B jsr _feXAM ; esamina FAC
5587 F84109 F0 44 beq ?06 ; zero
5588 F8410B B0 04 bcs ?03 ; NAN/INF
5589 F8410D 70 40 bvs ?06 ; denormal => round to zero
5590 F8410F 50 65 bvc ?16 ; normale e valido
5591 F84111 08 ?03: php ; salva V
5592 F84112 20 43 42 jsr storesgn
5593 F84115 BB tyx ; X = indice stringa XCVTStr
5594 F84116 A0 00 ldy #0
5595 F84118 A9 08 lda #$08 ; test CAPS
5596 F8411A 24 16 bit XVFlag
5597 F8411C D0 02 bne ?04 ; CAPS ON -> maiuscolo
5598 F8411E A0 20 ldy #$20 ; converte in minuscolo
5599 F84120 84 24 ?04: sty FPTmp1
5600 F84122 28 plp ; ripristina V
5601 F84123 50 0B bvc ?04a ; NAN
5602 F84125 A9 46 lda #'F' ; store INF/inf
5603 F84127 85 25 sta FPTmp2
5604 F84129 A9 4E lda #'N'
5605 F8412B EB xba
5606 F8412C A9 49 lda #'I'
5607 F8412E 80 09 bra ?05
5608 F84130 A9 4E ?04a: lda #'N' ; store NAN/nan
5609 F84132 85 25 sta FPTmp2
5610 F84134 A9 41 lda #'A'
5611 F84136 EB xba
5612 F84137 A9 4E lda #'N'
5613 F84139 05 24 ?05: ora FPTmp1
5614 F8413B 95 86 sta <XCVTStr,x
5615 F8413D E8 inx
5616 F8413E EB xba
5617 F8413F 05 24 ora FPTmp1
5618 F84141 95 86 sta <XCVTStr,x
5619 F84143 E8 inx
5620 F84144 A5 25 lda FPTmp2
5621 F84146 05 24 ora FPTmp1
5622 F84148 95 86 sta <XCVTStr,x
5623 F8414A E8 inx
5624 F8414B 9B txy ; Y = lunghezza stringa
5625 F8414C 4C 3D 42 jmp ?100 ; termina stringa ed esce
5626 F8414F
5627 ; zero o arrotondato a zero
5628 F8414F A9 80 ?06: lda #$80 ; <7> -> segno FAC = 0
Tue Jul 17 11:00:16 2018 Page 55
5629 F84151 14 16 trb XVFlag ; ZERO solo POSITIVO
5630 F84153 24 16 bit XVFlag
5631 F84155 50 04 bvc ?07 ; no formato G
5632 F84157 A9 20 lda #$20 ; forza formato F se G true
5633 F84159 04 16 tsb XVFlag
5634 F8415B A2 14 ?07: ldx #MAXINTDGTS
5635 F8415D E4 0A cpx FmtPrec
5636 F8415F 90 04 bcc ?07a
5637 F84161 F0 02 beq ?07a
5638 F84163 A6 0A ldx FmtPrec ; numero di '0'
5639 F84165 74 71 ?07a: stz FPUStr+1,x ; terminatore stringa
5640 F84167 CA dex
5641 F84168 A9 30 lda #'0' ; stringa di '0'
5642 F8416A 95 71 ?08: sta FPUStr+1,x
5643 F8416C CA dex
5644 F8416D 10 FB bpl ?08
5645 F8416F 64 14 stz XVDec ; numero decimali
5646 F84171 64 15 stz XVDec+1
5647 F84173 4C 27 42 jmp ?90 ; converte
5648 F84176
5649 ; numero float normale -- si scala FAC in modo che sia:
5650 ; 1E18 <= FAC <= MAX UINT (19/20 cifre significative)
5651 F84176 20 A8 3E ?16: jsr _feSCALE10
5652 F84179 20 0C 3F jsr _feFAC2I ; converte in intero tra 1E18 e MAX UINT
5653 F8417C ACC16 ; copia IARG in FOP
5654 F8417C C2 20 rep #PMFLAG
5655 .LONGA on
5656 .MNLIST
5657 F8417E A5 28 lda IARG
5658 F84180 85 32 sta FOP
5659 F84182 A5 2A lda IARG+2
5660 F84184 85 34 sta FOP+2
5661 F84186 A5 2C lda IARG+4
5662 F84188 85 36 sta FOP+4
5663 F8418A A5 2E lda IARG+6
5664 F8418C 85 38 sta FOP+6
5665 F8418E ACC08
5666 F8418E E2 20 sep #PMFLAG
5667 .LONGA off
5668 .MNLIST
5669 F84190
5670 ; a questo punto 1E18 <= IARG <= MAX UINT e si converte intero
5671 ; in stringa decimale con 19/20 digits significativi
5672 ; il punto decimale implicito si trova dopo il secondo digit
5673 F84190 20 6C 31 jsr _UI2Str ; punto decimale dopo secondo digit
5674 ; A = lunghezza stringa (19 o 20)
5675 ; Y = ptr primo digit
5676 F84193 C9 13 cmp #MAXDIGITS
5677 F84195 F0 08 beq ?52 ; 19 digit significativi
5678 F84197 ACC16 ; 20 digit significativi
5679 F84197 C2 20 rep #PMFLAG
5680 .LONGA on
5681 .MNLIST
5682 F84199 E6 14 inc XVDec ; incrementa esponente decimale
5683 F8419B ACC08 ; e il punto decimale sta dopo primo digit
5684 F8419B E2 20 sep #PMFLAG
5685 .LONGA off
Tue Jul 17 11:00:16 2018 Page 56
5686 .MNLIST
5687 F8419D 80 11 bra ?56
5688 F8419F A2 00 ?52: ldx #0
5689 F841A1 B5 72 ?54: lda <FPUStr+2,x ; trasla indietro stringa di 19 digit
5690 F841A3 F0 05 beq ?55 ; terminatore #0
5691 F841A5 95 71 sta <FPUStr+1,x
5692 F841A7 E8 inx
5693 F841A8 80 F7 bra ?54
5694 F841AA A9 30 ?55: lda #'0' ; aggiunge uno zero per avere 20 cifre
5695 F841AC 95 71 sta <FPUStr+1,x
5696 F841AE 74 72 stz <FPUStr+2,x ; termina stringa
5697 ?56: ; a questo punto la conversione ha prodotto una stringa decimale base
5698 ; di lunghezza fissa pari a 20 caratteri.
5699 ; in base alla precisione e al formato richiesti occorre arrotondare
5700 ; opportunamente il numero e decidere il formato corretto
5701 F841B0 A5 0A lda FmtPrec ; estende FmtPrec a 16 bit
5702 F841B2 85 5C sta FPWTmp
5703 F841B4 64 5D stz FPWTmp+1
5704 F841B6 24 16 bit XVFlag ; <6> -> VF test richiesta formato G
5705 F841B8 50 07 bvc ?70 ; no formato G
5706 F841BA 20 5D 42 jsr testg
5707 F841BD B0 2B bcs ?80 ; imposta formato E -- round con FmtPrec
5708 F841BF 90 17 bcc ?72 ; test max esponente positivo formato F
5709 F841C1 A9 20 ?70: lda #$20 ; test formato F
5710 F841C3 24 16 bit XVFlag
5711 F841C5 F0 23 beq ?80 ; NO -- richiesto formato E, round con FmtPrec
5712 F841C7 ACC16 ; calcola digit round
5713 F841C7 C2 20 rep #PMFLAG
5714 .LONGA on
5715 .MNLIST
5716 F841C9 18 clc
5717 F841CA A5 14 lda XVDec ; somma signed
5718 F841CC 65 5C adc FPWTmp
5719 F841CE 1A inc a ; se negativo round to zero
5720 F841CF 85 5C sta FPWTmp
5721 F841D1 ACC08
5722 F841D1 E2 20 sep #PMFLAG
5723 .LONGA off
5724 .MNLIST
5725 F841D3 10 03 bpl ?72 ; check formato F
5726 F841D5 4C 4F 41 jmp ?06 ; Prec negtiva => round to zero
5727 F841D8 ?72: ACC16 ; test esponente + formato F
5728 F841D8 C2 20 rep #PMFLAG
5729 .LONGA on
5730 .MNLIST
5731 F841DA 18 clc ; OK --
5732 F841DB A5 14 lda XVDec
5733 F841DD 30 03 bmi ?74 ; exp negativo -- ok
5734 F841DF C9 24 00 cmp #MAXFDEC ; forza formato E
5735 F841E2 ?74: ACC08 ; se esponente maggiore di un limite fisso
5736 F841E2 E2 20 sep #PMFLAG
5737 .LONGA off
5738 .MNLIST
5739 F841E4 90 04 bcc ?80 ; OK
5740 F841E6 A9 20 lda #$20 ; clear flag formato F
5741 F841E8 14 16 trb XVFlag ; e forza formato F se Exp >= MAXFDEC
5742 F841EA
Tue Jul 17 11:00:16 2018 Page 57
5743 ?80: ; indice digit da arrotondare (X = 0 possibile solo per formato F)
5744 ; per come e' stato costruito FPWTmp, esso e' a 8 bit
5745 F841EA A6 5C ldx FPWTmp ; 8 bit
5746 F841EC E0 14 cpx #MAXINTDGTS ; round solo se necessario
5747 F841EE B0 37 bcs ?90 ; no rounding
5748 ; round alla cifra di indice X
5749 F841F0 A0 30 ldy #'0'
5750 F841F2 B5 71 lda <FPUStr+1,x
5751 F841F4 74 71 stz <FPUStr+1,x ; tronca stringa alla precisione richiesta
5752 F841F6 C9 35 cmp #'5'
5753 F841F8 90 2D bcc ?90 ; no round
5754 F841FA CA ?82: dex ; passa al digit precedente
5755 F841FB 30 0F bmi ?88 ; oltre primo digit
5756 F841FD B5 71 lda <FPUStr+1,x ; test digit precedente
5757 F841FF 1A inc a ; round
5758 F84200 C9 3A cmp #'9'+1
5759 F84202 90 04 bcc ?84 ; fine rounding
5760 F84204 94 71 sty <FPUStr+1,x ; zero finale
5761 F84206 B0 F2 bcs ?82
5762 F84208 95 71 ?84: sta <FPUStr+1,x ; salva digit arrotondato
5763 F8420A 90 1B bcc ?90 ; fine rounding
5764 ?88: ; il rounding ha generato un riporto
5765 F8420C ACC16
5766 F8420C C2 20 rep #PMFLAG
5767 .LONGA on
5768 .MNLIST
5769 F8420E E6 14 inc XVDec ; incrementa esponente decimale
5770 F84210 ACC08
5771 F84210 E2 20 sep #PMFLAG
5772 .LONGA off
5773 .MNLIST
5774 F84212 A9 31 lda #'1'
5775 F84214 85 71 sta <FPUStr+1 ; store '1'
5776 F84216 24 16 bit XVFlag ; <6> -> VF test richiesta formato G
5777 F84218 50 03 bvc ?89 ; no formato G
5778 F8421A 20 5D 42 jsr testg ; exp cambiato => testare limiti per F
5779 F8421D A9 20 ?89: lda #$20 ; test formato F
5780 F8421F 24 16 bit XVFlag
5781 F84221 F0 04 beq ?90
5782 ; nel formato F puo' accadere che l'indice di rounding sia zero
5783 ; in questo caso l'indice va incrementato e la stringa terminata
5784 F84223 A6 5C ldx FPWTmp
5785 F84225 74 72 stz <FPUStr+2,x ; termina sulla precisione richiesta
5786 F84227 20 43 42 ?90: jsr storesgn
5787 F8422A 84 3B sty FPIndx ; store indice primo digit
5788 F8422C A2 00 ldx #0
5789 F8422E A9 20 lda #$20
5790 F84230 24 16 bit XVFlag
5791 F84232 F0 05 beq ?92 ; formato E
5792 F84234 20 7B 42 jsr fform ; formato F
5793 F84237 80 03 bra ?94
5794 F84239 20 42 43 ?92: jsr eform
5795 F8423C BB ?94: tyx
5796 F8423D 74 86 ?100: stz <XCVTStr,x ; termina stringa
5797 F8423F 98 tya
5798 F84240 A2 86 ldx #XCVTStr
5799 F84242 60 rts
Tue Jul 17 11:00:16 2018 Page 58
5800
5801 ; memorizza segno secondo i criteri di formattazione
5802 F84243 storesgn:
5803 F84243 A0 00 ldy #0 ; indice stringa XCVTStr
5804 F84245 A5 16 lda XVFlag ; test segno
5805 F84247 10 04 bpl ?02 ; positivo
5806 F84249 A9 2D lda #'-' ; store '-'
5807 F8424B D0 0B bne ?06
5808 F8424D 4A ?02: lsr a ; CF -> flag segno positivo
5809 F8424E 90 0C bcc ?08 ; no segno se positivo
5810 F84250 A2 2B ldx #'+' ; assume '+'
5811 F84252 4A lsr a ; CF -> flag blank
5812 F84253 90 02 bcc ?04 ; store '+'
5813 F84255 A2 20 ldx #' ' ; store blank
5814 F84257 8A ?04: txa
5815 F84258 99 86 02 ?06: sta !DP02ADDR+XCVTStr,y
5816 F8425B C8 iny
5817 F8425C 60 ?08: rts
5818
5819 ; testa formato G/g per scegliere F se Exp >= FmtPrec
5820 ; Out - CF = 1 => formato E
5821 ; CF = 0 => formato F
5822 F8425D testg:
5823 F8425D A9 20 lda #$20 ; <5> -> clear flag F
5824 F8425F 14 16 trb XVFlag ; imposta formato E
5825 F84261 ACC16 ; formato G sceglie automaticamente tra E e F
5826 F84261 C2 20 rep #PMFLAG
5827 .LONGA on
5828 .MNLIST
5829 F84263 A5 14 lda XVDec
5830 F84265 30 04 bmi ?60 ; esponente decimale negativo
5831 F84267 C5 5C cmp FPWTmp ; 16 bit compare
5832 F84269 80 07 bra ?62 ; C = 1 esponente >= precisione -> formato E
5833 ; C = 0 esponente < precisione -> formato F
5834 F8426B 49 FF FF ?60: eor #$FFFF ; esponente negativo
5835 F8426E 1A inc a ; complementa a 2
5836 F8426F C9 07 00 cmp #MAXFEXP ; esponente <= - max exp. neg. formato F ?
5837 F84272 ?62: ACC08
5838 F84272 E2 20 sep #PMFLAG
5839 .LONGA off
5840 .MNLIST
5841 F84274 B0 04 bcs ?64 ; imposta formato E -- round con FmtPrec
5842 ; Exp < -MAXFEXP oppure Exp >= FmtPrec
5843 ; _MAXFEXP <= Exp < FmtPrec => sgeglie formato F
5844 F84276 A9 20 lda #$20 ; <5> -> flag F
5845 F84278 04 16 tsb XVFlag ; imposta formato F
5846 F8427A 60 ?64: rts
5847
5848 ; converte numero float secondo formato f,F
5849 ; In - X = 0 (indice FPUStr)
5850 ; Y = indice corrente XCVTStr
5851 ; NOTA - causa limiti imposti a FmtPrec sicuramente XVDec a 8 bit (signed)
5852 F8427B fform:
5853 F8427B A5 14 lda XVDec
5854 F8427D 1A inc a
5855 F8427E A9 14 lda #MAXINTDGTS ; padding formato G con exp. negativo
5856 F84280 85 27 sta FPTmp4 ; padding formato G con exp. positivo
Tue Jul 17 11:00:16 2018 Page 59
5857 F84282 64 25 stz FPTmp2
5858 F84284 64 24 stz FPTmp1 ; counter digit frazionari
5859 F84286 A6 14 ldx XVDec ; 8 bit
5860 F84288 10 22 bpl ?06 ; esp > 0 -> parte integrale
5861 F8428A A9 80 lda #$80
5862 F8428C 85 25 sta FPTmp2 ; flag solo parte frazionaria
5863 F8428E A9 14 lda #MAXINTDGTS ; padding formato G con exp. negativo
5864 F84290 85 27 sta FPTmp4
5865 F84292 A9 30 lda #'0'
5866 F84294 99 86 02 sta !DP02ADDR+XCVTStr,y ; inizia con '0.'
5867 F84297 C8 iny
5868 F84298 A9 2E lda #'.'
5869 F8429A 99 86 02 sta !DP02ADDR+XCVTStr,y
5870 F8429D C8 iny
5871 F8429E A9 30 lda #'0'
5872 F842A0 E8 ?02: inx ; inc. esponente negativo
5873 F842A1 F0 08 beq ?04 ; fine '0' iniziali
5874 F842A3 99 86 02 sta !DP02ADDR+XCVTStr,y ; store '0' dopo '.'
5875 F842A6 E6 24 inc FPTmp1 ; update cnt digit frazionari
5876 F842A8 C8 iny
5877 F842A9 D0 F5 bne ?02
5878 F842AB CA ?04: dex
5879 F842AC E8 ?06: inx
5880 F842AD 86 14 stx XVDec
5881 ; si emette parte integrale o frazionaria da stringa arrotondata
5882 F842AF A2 00 ldx #0
5883 F842B1 B5 71 ?08: lda <FPUStr+1,x
5884 F842B3 F0 28 beq ?20 ; fine stringa
5885 F842B5 99 86 02 sta !DP02ADDR+XCVTStr,y
5886 F842B8 C8 iny
5887 F842B9 E8 inx
5888 F842BA 24 25 bit FPTmp2
5889 F842BC 10 04 bpl ?09 ; parte intera
5890 F842BE E6 24 inc FPTmp1 ; counter digit frazionari
5891 F842C0 80 EF bra ?08 ; continua parte frazionaria
5892 F842C2 C6 14 ?09: dec XVDec ; se XVDec (8 bit) = 0 -> '.'
5893 F842C4 D0 EB bne ?08 ; emette digit fino al '.'
5894 F842C6 A9 2E lda #'.'
5895 F842C8 99 86 02 sta !DP02ADDR+XCVTStr,y ; store '.'
5896 F842CB C8 iny
5897 F842CC A9 40 lda #$40 ; flag '.' nel mezzo
5898 F842CE 04 25 tsb FPTmp2
5899 F842D0 B5 71 ?10: lda <FPUStr+1,x
5900 F842D2 F0 09 beq ?20 ; fine stringa
5901 F842D4 99 86 02 sta !DP02ADDR+XCVTStr,y
5902 F842D7 E6 24 inc FPTmp1 ; counter digit frazionari
5903 F842D9 C8 iny
5904 F842DA E8 inx
5905 F842DB D0 F3 bne ?10
5906 ?20: ; a questo punto sono state emesse tutte le cifre significative
5907 ; dalla stringa decimale arrotondata
5908 F842DD 24 25 bit FPTmp2
5909 F842DF 30 13 bmi ?30 ; forma 0.0000ffff
5910 F842E1 70 11 bvs ?30 ; forma xxxx.ffff
5911 ; sono state emesse solo cifre integrali e l'esponente non e' nullo
5912 ; occorre emettere gli zeri fino ad annullare l'esponente
5913 F842E3 A6 14 ldx XVDec
Tue Jul 17 11:00:16 2018 Page 60
5914 F842E5 A9 30 lda #'0'
5915 F842E7 99 86 02 ?22: sta !DP02ADDR+XCVTStr,y
5916 F842EA C8 iny
5917 F842EB CA dex
5918 F842EC D0 F9 bne ?22
5919 F842EE A9 2E lda #'.'
5920 F842F0 99 86 02 sta !DP02ADDR+XCVTStr,y ; store '.'
5921 F842F3 C8 iny
5922 ?30: ; a questo punto la stringa decimale FPUStr+1 arrotondata e' stata
5923 ; formattata in XCVTStr secondo le specifiche di precisione richieste
5924 ; nel caso del formato F sono state emesse FPTmp1 cifre frazionarie
5925 ; quindi occorre paddare la stringa con (FmtPrec - FPTmp1) '0' finali
5926 ; con il formato G sono state emesse MIN(FmtPrec, MAXINTDGTS) cifre
5927 ; totali, quindi occorre paddare la stringa con (FmtPrec - MAXINTDGTS)
5928 ; '0' finali.
5929 F842F4 64 26 stz FPTmp3 ; counter padding '0' finali
5930 F842F6 38 sec
5931 F842F7 A5 0A lda FmtPrec ; precisione richiesta
5932 F842F9 24 16 bit XVFlag
5933 F842FB 50 04 bvc ?34 ; no formato G specificato
5934 F842FD A6 27 ldx FPTmp4 ; valore per formato G
5935 F842FF 86 24 stx FPTmp1
5936 F84301 E5 24 ?34: sbc FPTmp1
5937 F84303 F0 17 beq ?40 ; FmtPrec - FPTmp1 = 0 => no padding
5938 F84305 90 15 bcc ?40 ; FmtPrec - FPTmp1 < 0 => no padding
5939 F84307 AA tax ; X => padding -- qui anche CF = 1
5940 F84308 84 24 sty FPTmp1 ; lunghezza attuale stringa
5941 F8430A A9 2F lda #XCVTMAXF ; max. len
5942 F8430C E5 24 sbc FPTmp1 ; A = bytes disponibili
5943 F8430E F0 0C beq ?40 ; no bytes disponibili
5944 F84310 90 0A bcc ?40 ; no bytes disponibili
5945 F84312 85 24 sta FPTmp1 ; # bytes disponibili
5946 F84314 E4 24 cpx FPTmp1 ; determina padding disponibile
5947 F84316 90 02 bcc ?36 ; X = padding
5948 F84318 A6 24 ldx FPTmp1 ; max. padding possibile
5949 F8431A 86 26 ?36: stx FPTmp3
5950 ?40: ; a questo punto FPTmp3 contiene il numero di padding ed Y
5951 ; la lunghezza attuale della stringa ed il prox. indice disponibile
5952 ; se ultimo carattere emesso e' '.' e non ci sono altri digit da
5953 ; emettere, il '.' finale va trimmato a meno che non sia stato
5954 ; specificato il formato alternativo
5955 F8431C A9 10 lda #$10 ; test formato alternativo
5956 F8431E 24 16 bit XVFlag
5957 F84320 D0 12 bne ?44 ; formato alt => no trim
5958 F84322 88 dey ; indice last char
5959 F84323 B9 86 02 lda !DP02ADDR+XCVTStr,y ; last char
5960 F84326 C9 2E cmp #'.' ; last = '.' ?
5961 F84328 D0 04 bne ?42 ; no -- trimma se formato G
5962 F8432A A6 26 ldx FPTmp3 ; seguono '0' finali ?
5963 F8432C F0 13 beq ?50 ; no -- trim '.' ed esce
5964 F8432E C8 ?42: iny ; ripristina indice Y
5965 ; si trimmano gli '0' finali se formato G/g e no alt. form.
5966 F8432F 20 D6 43 jsr trimtrail
5967 F84332 B0 0D bcs ?50 ; trim -> fine
5968 ?44: ; a questo punto padding della stringa con '0' finali
5969 F84334 A6 26 ldx FPTmp3
5970 F84336 F0 09 beq ?50 ; no padding
Tue Jul 17 11:00:16 2018 Page 61
5971 F84338 A9 30 lda #'0'
5972 F8433A 99 86 02 ?46: sta !DP02ADDR+XCVTStr,y ; store '0'
5973 F8433D C8 iny
5974 F8433E CA dex
5975 F8433F D0 F9 bne ?46
5976 F84341 60 ?50: rts
5977
5978 ; converte numero float secondo formato e,E
5979 ; In - X = 0 (indice FPUStr+1)
5980 ; Y = indice corrente XCVTStr (destinazione)
5981 F84342 eform:
5982 F84342 B5 71 lda <FPUStr+1,x
5983 F84344 99 86 02 sta !DP02ADDR+XCVTStr,y ; store primo digit
5984 F84347 E8 inx
5985 F84348 C8 iny
5986 F84349 A9 2E lda #'.' ; dopo il primo digit segue il '.'
5987 F8434B EB xba ; B = '.'
5988 F8434C B5 71 lda <FPUStr+1,x ; segue secondo digit ?
5989 F8434E D0 0D bne ?02 ; si, secondo digit dopo '.'
5990 F84350
5991 ; se non ci sono altri digit dopo il '.' allora non
5992 ; viene emesso il '.' a meno che non sia specificato alt. form.
5993 F84350 A9 10 lda #$10 ; test formato alt #
5994 F84352 24 16 bit XVFlag
5995 F84354 F0 37 beq ?50 ; no alt form # -> emette esponente
5996 F84356 EB xba
5997 F84357 99 86 02 sta !DP02ADDR+XCVTStr,y ; store '.'
5998 F8435A C8 iny
5999 F8435B 80 30 bra ?50 ; emette esponente
6000 F8435D E8 ?02: inx
6001 F8435E EB xba ; A = '.', B = secondo digit
6002 F8435F 99 86 02 sta !DP02ADDR+XCVTStr,y ; store '.'
6003 F84362 C8 iny
6004 F84363 EB xba ; A = secondo digit
6005 F84364 99 86 02 ?04: sta !DP02ADDR+XCVTStr,y ; store secondo digit e seguenti
6006 F84367 C8 iny
6007 F84368 B5 71 lda <FPUStr+1,x
6008 F8436A F0 03 beq ?05 ; fine stringa digit
6009 F8436C E8 inx
6010 F8436D D0 F5 bne ?04
6011 F8436F
6012 ?05: ; copiata la stringa di cifre significative -- ora si trimmano gli
6013 ; '0' finali se formato G/g e no alt. form.
6014 F8436F 20 D6 43 jsr trimtrail ; se trim non effettua padding
6015 F84372 B0 19 bcs ?50 ; trim -> emette esponente
6016 F84374
6017 ; padding della stringa con '0' finali -- nel formato E vengono
6018 ; emessi al max. MAXINTDGTS digit significativi e la stringa
6019 ; XCVTStr ha posto per XCVTMAXE char complessivi prima dell'esponente
6020 F84374 A5 0A lda FmtPrec
6021 F84376 C9 28 cmp #XCVTMAXE+1
6022 F84378 90 02 bcc ?05a
6023 F8437A A9 27 lda #XCVTMAXE ; al massimo XCVTMAXE digit
6024 F8437C 38 ?05a: sec
6025 F8437D E9 14 sbc #MAXINTDGTS ; padding
6026 F8437F F0 0C beq ?50 ; no padding
6027 F84381 90 0A bcc ?50 ; no padding
Tue Jul 17 11:00:16 2018 Page 62
6028 F84383 AA tax ; X = numero padding
6029 F84384 A9 30 lda #'0'
6030 F84386 99 86 02 ?06: sta !DP02ADDR+XCVTStr,y
6031 F84389 C8 iny
6032 F8438A CA dex
6033 F8438B D0 F9 bne ?06
6034 F8438D
6035 ?50: ; emette esponente decimale
6036 F8438D A2 45 ldx #'E'
6037 F8438F A9 08 lda #$08 ; test CAPS ON
6038 F84391 24 16 bit XVFlag
6039 F84393 D0 02 bne ?52 ; CAPS ON
6040 F84395 A2 65 ldx #'e'
6041 F84397 8A ?52: txa
6042 F84398 99 86 02 sta !DP02ADDR+XCVTStr,y
6043 F8439B C8 iny
6044 F8439C A2 2B ldx #'+' ; assume esponente positivo
6045 F8439E ACC16
6046 F8439E C2 20 rep #PMFLAG
6047 .LONGA on
6048 .MNLIST
6049 F843A0 A5 14 lda XVDec
6050 F843A2 10 06 bpl ?54
6051 F843A4 A2 2D ldx #'-' ; esponente positivo
6052 F843A6 49 FF FF eor #$FFFF ; complementa esponente
6053 F843A9 1A inc a
6054 F843AA 85 32 ?54: sta FOP ; prepara per conversione
6055 F843AC 64 34 stz FOP+2
6056 F843AE 64 36 stz FOP+4
6057 F843B0 64 38 stz FOP+6
6058 F843B2 ACC08
6059 F843B2 E2 20 sep #PMFLAG
6060 .LONGA off
6061 .MNLIST
6062 F843B4 8A txa
6063 F843B5 99 86 02 sta !DP02ADDR+XCVTStr,y ; segno esponente
6064 F843B8 C8 iny
6065 F843B9 5A phy
6066 F843BA 20 6C 31 jsr _UI2Str ; X = ptr ultimo digit
6067 F843BD 7A ply
6068 F843BE CA dex ; esponente sempre a 4 digit
6069 F843BF CA dex
6070 F843C0 CA dex ; ptr al primo di 4 digits
6071 F843C1 ACC16
6072 F843C1 C2 20 rep #PMFLAG
6073 .LONGA on
6074 .MNLIST
6075 F843C3 B5 00 lda <0,x
6076 F843C5 99 86 02 sta !DP02ADDR+XCVTStr,y ; prima coppia digit esponente
6077 F843C8 E8 inx
6078 F843C9 E8 inx
6079 F843CA C8 iny
6080 F843CB C8 iny
6081 F843CC B5 00 lda <0,x
6082 F843CE 99 86 02 sta !DP02ADDR+XCVTStr,y ; seconda coppia digit esponente
6083 F843D1 ACC08
6084 F843D1 E2 20 sep #PMFLAG
Tue Jul 17 11:00:16 2018 Page 63
6085 .LONGA off
6086 .MNLIST
6087 F843D3 C8 iny
6088 F843D4 C8 iny ; Y = lunghezza stringa
6089 F843D5 60 rts
6090 F843D6
6091 ; trim '0' finali della stringa -- solo se formato G/g e no alt. form.
6092 ; In - Y = indice attuale stringa destinazione
6093 ; FPIndx = indice primo digit
6094 ; Out - Y = nuovo indice attuale stringa dest
6095 ; CF = 1 se stringa trimmata, altrimenti CF = 0
6096 F843D6 trimtrail:
6097 F843D6 24 16 bit XVFlag ; <6> -> gormato G/g
6098 F843D8 50 19 bvc ?10 ; no trim: esce con C = 0
6099 F843DA A9 10 lda #$10 ; test formato alt #
6100 F843DC 24 16 bit XVFlag
6101 F843DE D0 13 bne ?10 ; alt form: no trim, esce con C = 0
6102 F843E0 88 ?02: dey ; ultimo digit valido
6103 F843E1 C4 3B cpy FPIndx ; indice sul primo digit ?
6104 F843E3 F0 0B beq ?08 ; SI -- non rimuove mai
6105 F843E5 B9 86 02 lda !DP02ADDR+XCVTStr,y
6106 F843E8 C9 30 cmp #'0'
6107 F843EA F0 F4 beq ?02 ; loop digit precedente
6108 F843EC C9 2E cmp #'.' ; Trim eventuale '.'
6109 F843EE F0 01 beq ?09
6110 F843F0 C8 ?08: iny ; indice disponibile successivo
6111 F843F1 38 ?09: sec ; trim
6112 F843F2 60 rts
6113 F843F3 18 ?10: clc ; no trim
6114 F843F4 60 rts
6115
6116 ; converte float in formato a/A
6117 F843F5 aform:
6118 F843F5 86 0A stx FmtPrec ; se = 0 stampa mantissa ordinaria
6119 F843F7 A2 06 ldx #$06 ; valore da aggiungere per digit A..F
6120 F843F9 89 08 bit #$08
6121 F843FB D0 02 bne ?02 ; HI CAPS
6122 F843FD A2 26 ldx #$26 ; valore da aggiungere per digit a..f
6123 F843FF 86 24 ?02: stx FPTmp1
6124 F84401 A5 40 lda FACSGN
6125 F84403 29 80 and #$80 ; segno FAC
6126 F84405 05 16 ora XVFlag
6127 F84407 85 16 sta XVFlag
6128 F84409 20 43 42 jsr storesgn ; store segno in XCVTStr
6129 F8440C A9 24 lda #'$'
6130 F8440E 99 86 02 STA !DP02ADDR+XCVTStr,Y
6131 F84411 C8 INY
6132 F84412 A2 07 ldx #$07 ; loop 8 bytes
6133 F84414 B5 42 ?10: lda <FACM,x
6134 F84416 20 1E 32 jsr Byte2Hex
6135 F84419 99 86 02 STA !DP02ADDR+XCVTStr,Y ; nibble H
6136 F8441C C8 INY
6137 F8441D EB xba ; nibble L
6138 F8441E 99 86 02 STA !DP02ADDR+XCVTStr,Y
6139 F84421 C8 INY
6140 F84422 CA DEX
6141 F84423 10 EF BPL ?10
Tue Jul 17 11:00:16 2018 Page 64
6142 F84425 A2 70 ldx #'p'
6143 F84427 A9 08 lda #$08
6144 F84429 24 16 bit XVFlag
6145 F8442B F0 02 beq ?14
6146 F8442D A2 50 ldx #'P'
6147 F8442F 8A ?14: txa
6148 F84430 99 86 02 STA !DP02ADDR+XCVTStr,Y
6149 F84433 C8 INY
6150 F84434 64 25 stz FPTmp2
6151 F84436 64 26 stz FPTmp3
6152 F84438 ACC16
6153 F84438 C2 20 rep #PMFLAG
6154 .LONGA on
6155 .MNLIST
6156 F8443A A5 4A lda FACExp
6157 F8443C 85 14 sta XVDec
6158 F8443E C9 FF 7F cmp #EXPINF
6159 F84441 ACC08
6160 F84441 E2 20 sep #PMFLAG
6161 .LONGA off
6162 .MNLIST
6163 F84443 B0 33 bcs ?26
6164 F84445 A5 16 lda XVFlag
6165 F84447 89 10 bit #$10
6166 F84449 F0 05 beq ?20
6167 F8444B 38 sec
6168 F8444C A9 80 lda #$80
6169 F8444E 85 25 sta FPTmp2
6170 F84450 ?20: ACC16
6171 F84450 C2 20 rep #PMFLAG
6172 .LONGA on
6173 .MNLIST
6174 F84452 A5 4A lda FACExp
6175 F84454 90 0E bcc ?22
6176 F84456 A2 00 ldx #0
6177 F84458 E9 FF 3F sbc #EXPBIAS
6178 F8445B B0 05 bcs ?21 ; positivo
6179 F8445D 49 FF FF eor #$FFFF
6180 F84460 1A inc a
6181 F84461 CA dex ; negativo
6182 F84462 86 26 ?21: stx FPTmp3
6183 F84464 85 14 ?22: sta XVDec
6184 F84466 ACC08
6185 F84466 E2 20 sep #PMFLAG
6186 .LONGA off
6187 .MNLIST
6188 F84468 24 25 bit FPTmp2
6189 F8446A 10 0C bpl ?26
6190 F8446C A9 2B lda #'+'
6191 F8446E 24 26 bit FPTmp3
6192 F84470 10 02 bpl ?24
6193 F84472 A9 2D lda #'-'
6194 F84474 99 86 02 ?24: STA !DP02ADDR+XCVTStr,Y
6195 F84477 C8 INY
6196 F84478 A2 01 ?26: ldx #$01
6197 F8447A B5 14 ?28: lda <XVDec,x
6198 F8447C 20 1E 32 jsr Byte2Hex
Tue Jul 17 11:00:16 2018 Page 65
6199 F8447F 99 86 02 STA !DP02ADDR+XCVTStr,Y ; nibble H
6200 F84482 C8 INY
6201 F84483 EB xba ; nibble L
6202 F84484 99 86 02 STA !DP02ADDR+XCVTStr,Y
6203 F84487 C8 INY
6204 F84488 CA DEX
6205 F84489 10 EF BPL ?28
6206 F8448B A9 00 lda #$00
6207 F8448D 99 86 02 STA !DP02ADDR+XCVTStr,Y
6208 F84490 98 tya
6209 F84491 A2 86 ldx #XCVTStr
6210 F84493 60 rts
6211
6212 ;-------------------------------------------------------------
6213 ; COSTANTI IN VIRGOLA MOBILE
6214 ;-------------------------------------------------------------
6215
6216 ;FCon05: .BYTE $3F,$FE,$80,$00,$00,$00,$00,$00,$00,$00 ; 0.5
6217 ;FConM05: .BYTE $BF,$FE,$80,$00,$00,$00,$00,$00,$00,$00 ; -0.5
6218 F84494 00 00 40 76 3A FCon1E18 .DB $00,$00,$40,$76,$3A,$6B,$0B,$DE,$3A,$40 ; 1E18
6B 0B DE 3A 40
6219 F8449E 00 00 E8 89 04 FCon1E19 .DB $00,$00,$E8,$89,$04,$23,$C7,$8A,$3E,$40 ; 1E19
23 C7 8A 3E 40
6220
6221 ;FConINF: .BYTE $7F,$FF,$80,$00,$00,$00,$00,$00,$00,$00 ; +INF
6222 ;FConNAN: .BYTE $7F,$FF,$FF,$00,$00,$00,$00,$00,$00,$00 ; +NAN
6223
6224 F844A8 00 00 00 00 00 FCon1E0: .DB $00,$00,$00,$00,$00,$00,$00,$80,$FF,$3F ; 1
00 00 80 FF 3F
6225 F844B2 00 00 00 00 00 FCon1E1: .DB $00,$00,$00,$00,$00,$00,$00,$A0,$02,$40 ; 10
00 00 A0 02 40
6226 F844BC 00 00 00 00 00 FCon1E2: .DB $00,$00,$00,$00,$00,$00,$00,$C8,$05,$40 ; 100
00 00 C8 05 40
6227 F844C6 00 00 00 00 00 FCon1E3: .DB $00,$00,$00,$00,$00,$00,$00,$FA,$08,$40 ; 1E3
00 00 FA 08 40
6228 F844D0 00 00 00 00 00 FCon1E4: .DB $00,$00,$00,$00,$00,$00,$40,$9C,$0C,$40 ; 1E4
00 40 9C 0C 40
6229 F844DA 00 00 00 00 00 FCon1E5: .DB $00,$00,$00,$00,$00,$00,$50,$C3,$0F,$40 ; 1E5
00 50 C3 0F 40
6230 F844E4 00 00 00 00 00 FCon1E6: .DB $00,$00,$00,$00,$00,$00,$24,$F4,$12,$40 ; 1E6
00 24 F4 12 40
6231 F844EE 00 00 00 00 00 FCon1E7: .DB $00,$00,$00,$00,$00,$80,$96,$98,$16,$40 ; 1E7
80 96 98 16 40
6232 F844F8 00 00 00 00 00 FCon1E8: .DB $00,$00,$00,$00,$00,$20,$BC,$BE,$19,$40 ; 1E8
20 BC BE 19 40
6233 F84502 00 00 00 04 BF FCon1E16: .DB $00,$00,$00,$04,$BF,$C9,$1B,$8E,$34,$40 ; 1E16
C9 1B 8E 34 40
6234 F8450C 9E B5 70 2B A8 FCon1E32: .DB $9E,$B5,$70,$2B,$A8,$AD,$C5,$9D,$69,$40 ; 1E32
AD C5 9D 69 40
6235 F84516 D5 A6 CF FF 49 FCon1E64: .DB $D5,$A6,$CF,$FF,$49,$1F,$78,$C2,$D3,$40 ; 1E64
1F 78 C2 D3 40
6236 F84520 DF 8C E9 80 C9 FCon1E128: .DB $DF,$8C,$E9,$80,$C9,$47,$BA,$93,$A8,$41 ; 1E128
47 BA 93 A8 41
6237 F8452A 8C DE F9 9D FB FCon1E256: .DB $8C,$DE,$F9,$9D,$FB,$EB,$7E,$AA,$51,$43 ; 1E256
EB 7E AA 51 43
6238 F84534 C2 91 0E A6 AE FCon1E512: .DB $C2,$91,$0E,$A6,$AE,$A0,$19,$E3,$A3,$46 ; 1E512
A0 19 E3 A3 46
Tue Jul 17 11:00:16 2018 Page 66
6239 F8453E 0F 0C 75 81 86 FCon1E1024: .DB $0F,$0C,$75,$81,$86,$75,$76,$C9,$48,$4D ; 1E1024
75 76 C9 48 4D
6240 F84548 D7 5D 3D C5 5D FCon1E2048: .DB $D7,$5D,$3D,$C5,$5D,$3B,$8B,$9E,$92,$5A ; 1E2048
3B 8B 9E 92 5A
6241 F84552 79 97 20 8A 02 FCon1E4096: .DB $79,$97,$20,$8A,$02,$52,$60,$C4,$25,$75 ; 1E4096
52 60 C4 25 75
6242
6243 ; -----------------------------------------------------
6244 ;static const extend e128 = {0x8CE0, 0x80E9, 0x47C9, 0x93BA, 0x41A8}; +1
6245 ;static const extend e256 = {0xDE8E, 0x9DF9, 0xEBFB, 0xAA7E, 0x4351}; +2
6246 ;static const extend e512 = {0x91C7, 0xA60E, 0xA0AE, 0xE319, 0x46A3}; +5
6247 ;static const extend e1024 = {0x0C17, 0x8175, 0x7586, 0xC976, 0x4D48}; +8
6248 ;static const extend e2048 = {0x5DE5, 0xC53D, 0x3B5D, 0x9E8B, 0x5A92}; +14
6249 ;static const extend e4096 = {0x979B, 0x8A20, 0x5202, 0xC460, 0x7525}; +34
6250
Lines Assembled : 5850 Errors : 0