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OrCAD LOGIC COMPILER  v2.01 N 12/09/94  (Source file .\PLD\#9007.PLD)

  1  || FILE:   #9007.PLD
  2  || PROJ:   20130517        
  3  || PART:   G16V8-#9007
  4  ||
  5  || DEV :   GAL16V8
  6  ||
  7  ||         DESC:   DPRAM TIMING
  8  ||
  9  |
 10  |GAL16V8A
 11  |
 12  || INPUT
 13  |  1:F1, 2:RCO, 3:F2, 4:RES, 5:Q2, 6:WP2N, 7:RDY, 8:WPN, 9:SEL, 11:X,
 14  || OUTPUT 
 15  |  12:Y, 13:LDD, 14:VLT, 15:CLK, 16:RE, 17:WE, 18:R2, 19:R1
 16  |
 17  ||
 18  |  ACTIVE-LOW: WE, RE, R1, R2
 19  |
 20  |  PROPERTY: "SIMPLE"
 21  |
 22  |  SIGNATURE: "9007    "
 23  |
 24  || --------------------------------------------------------
 25  |  WR1 = (F1' & WP2N' & Q2' & SEL)
 26  |  WR2 = (F2' & WP2N' & Q2' & SEL')
 27  |  WE  = (WR1 # WR2)
 28  |  R1  = (RES' # (Q2' & WP2N'))
 29  |  R2  = (RES' # (RDY ## WPN))
 30  |  RE  = (WP2N' & Q2')
 31  |  CLK = Q2
 32  |  VLT = Q2'
 33  |  Y   = X
 34  |  LDD = RCO



I200  No fatal errors found in source code (logic phase).
I201  No warnings.


I202  5/30/13  6:53 pm  (Thursday)
I203  Memory usage 77K
I204  Elapsed time 1 second

OrCAD DEVICE FITTER  v2.01   12/09/94  (Source file .\PLD\#9007.PLA)

I289  Simple GAL architecture selected.



RESOLVED EXPRESSIONS (Reduction 0)

Signal name      Row   Terms

WE                16   F1' Q2' WP2N' SEL  
                  17   F2' Q2' WP2N' SEL' 

R1                 0   Q2' WP2N' 
                   1   RES' 

R2                 8   RDY' WPN  
                   9   RDY  WPN' 
                  10   RES' 

RE                24   Q2' WP2N' 

CLK               32   Q2  

VLT               40   Q2' 

Y                 56   X  

LDD               48   RCO  




SIGNAL ASSIGNMENT
                                      Rows
 Pin    Signal name   Column     --------------    Activity
                                 Beg Avail Used

  1.     F1              2        -    -    -        High    (Clock)
  2.     RCO             0        -    -    -        High     
  3.     F2              4        -    -    -        High     
  4.     RES             8        -    -    -        High     
  5.     Q2             12        -    -    -        High     
  6.     WP2N           16        -    -    -        High     
  7.     RDY            20        -    -    -        High     
  8.     WPN            24        -    -    -        High     
  9.     SEL            28        -    -    -        High     
 11.     X              30        -    -    -        High    (Enable)
 12.     Y              26       56    8    1        High     
 13.     LDD            22       48    8    1        High     
 14.     VLT            18       40    8    1        High     
 15.     CLK             0       32    8    1        High     
 16.     RE              1       24    8    1        Low      
 17.     WE             15       16    8    2        Low      
 18.     R2             11        8    8    3        Low      
 19.     R1              7        0    8    2        Low      
                                    ---- ----
                                      64   12  (19%)


I200  No fatal errors found in source code (device phase).
I201  No warnings.



OrCAD DEVICE
Type:       GAL16V8
*
QP20* QF2194* QV1024*
F0*
L0000 11 11 11 11 11 11 10 11 10 11 11 11 11 11 11 11 *
L0032 11 11 11 11 10 11 11 11 11 11 11 11 11 11 11 11 *
L0256 11 11 11 11 11 11 11 11 11 11 10 11 01 11 11 11 *
L0288 11 11 11 11 11 11 11 11 11 11 01 11 10 11 11 11 *
L0320 11 11 11 11 10 11 11 11 11 11 11 11 11 11 11 11 *
L0512 11 10 11 11 11 11 10 11 10 11 11 11 11 11 01 11 *
L0544 11 11 10 11 11 11 10 11 10 11 11 11 11 11 10 11 *
L0768 11 11 11 11 11 11 10 11 10 11 11 11 11 11 11 11 *
L1024 11 11 11 11 11 11 01 11 11 11 11 11 11 11 11 11 *
L1280 11 11 11 11 11 11 10 11 11 11 11 11 11 11 11 11 *
L1536 01 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L1792 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 01 *
L2048 00 00 11 11 00 11 10 01 00 11 00 00 00 11 00 00 *
L2080 00 11 01 11 00 10 00 00 00 10 00 00 00 10 00 00 *
L2112 00 10 00 00 00 00 00 00 11 11 11 11 11 11 11 11 *
L2144 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L2176 11 11 11 11 11 11 11 11 10 *
C38E1*

I202  5/30/13  6:53 pm  (Thursday)
I203  Memory usage 5K
I204  Elapsed time 1 second