Subversion Repositories MB01 Project

Rev

Blame | Last modification | View Log | Download | RSS feed 

OrCAD LOGIC COMPILER  v2.01 N 12/09/94  (Source file .\PLD\#9001PAL.PLD)

  1  || FILE:   #9001.PLD
  2  || PROJ:   20130517        
  3  || PART:   G26CV12-#9001
  4  ||
  5  || DEV :   PALCE26V12
  6  ||
  7  ||         DESC:   VIDEO CONTROL
  8  ||
  9  |
 10  |P26V12
 11  |
 12  || INPUT
 13  |  1:CLK, 2:LD, 3:CEI, 4:DEI, 5:HSI, 6:VSI, 8:AT5, 9:CT0, 10:CT1, 
 14  | 11:CT2, 12:CT3, 13:CT6, 14:CT7, 15:D0, 27:F1, 28:F2,
 15  || OUTPUT 
 16  |  26:HS, 25:VS, 24:EUL, 23:CE, 22:DE, 20:FB, 19:FC,
 17  |  18:Q0, 17:PS5, 16:-
 18  |
 19  | SIGNATURE: "9001    "
 20  |
 21  || --------------------------------------------------------
 22  |  B0  = (D0  & LD') # (Q0  & LD)
 23  |  HSD = (HSI & LD') # (HS  & LD)
 24  |  VSD = (VSI & LD') # (VS  & LD)
 25  |  CED = (CEI & LD') # (CE  & LD)
 26  || /CT7 ABILITA DISPLAY ENABLE
 27  |  DED = (DEI & LD' & CT7') # (DE  & LD)
 28  || CT6 ABILITA ATTRIBUTO AT5 = UNDER LINE
 29  |  ULD = (AT5 & LD' & CT6) # (EUL  & LD)
 30  || /CT6 ABILITA ATTRIBUTO AT5 = PALETTE ADDRESS PS5
 31  |  PS5 = (AT5 & CT6')
 32  || FREQUENZA BLINK CARATTERE (1/32 VSYNC)
 33  || CT3 INVERTE FREQUENZA
 34  |  FBD = (CT3' & LD' & F2) # (CT3 & LD' & F2') # (LD & FB)
 35  || FREQUENZA BLINK CURSORE 
 36  || /CT0 -> 1/16 VSYNC -- CT0 -> 1/32 VSYNC
 37  || CT1  -> INVERTE FREQUENZA BLINK CURSORE
 38  || CT2  -> ABILITA BLINK CURSORE 
 39  || CT2 = 0 => CURSORE FISSO (se abilitato da CRTC)
 40  |  FL0 = (CT2 & F1' & LD' & F2'  & CT1)  
 41  |  FL1 = (CT2 & F1' & LD' & CT0' & CT1)  
 42  |  FL2 = (CT2 & F1  & LD' & CT0' & CT1') 
 43  |  FL3 = (CT2 & LD' & F2' & CT0  & CT1)  
 44  |  FL4 = (CT2 & LD' & F2  & CT0  & CT1') 
 45  |  FL5 = (LD & FC)
 46  |  FL6 = (CT2' & LD')
 47  |  FCD = (FL0 # FL1 # FL2 # FL3 # FL4 # FL5 # FL6)  
 48  || LOAD DATA
 49  |  Q0  = CLK // B0
 50  |  HS  = CLK // HSD
 51  |  VS  = CLK // VSD
 52  |  CE  = CLK // CED
 53  |  DE  = CLK // DED
 54  |  EUL = CLK // ULD
 55  |  FB  = CLK // FBD


 56  |  FC  = CLK // FCD



I200  No fatal errors found in source code (logic phase).
I201  No warnings.


I202  6/3/13  3:17 pm  (Monday)
I203  Memory usage 96K
I204  Elapsed time 1 second

OrCAD DEVICE FITTER  v2.01   12/09/94  (Source file .\PLD\#9001PAL.PLA)




RESOLVED EXPRESSIONS (Reduction 0)

Signal name      Row   Terms

PS5              121   AT5  CT6' 

Q0               108   LD' D0  
                 109   LD  Q0  

HS                11   LD' HSI  
                  12   LD  HS  

VS                20   LD' VSI  
                  21   LD  VS  

CE                44   LD' CEI  
                  45   LD  CE  

DE                59   LD' DEI  CT7' 
                  60   LD  DE  

EUL               31   LD' AT5  CT6  
                  32   LD  EUL  

FB                76   LD' CT3' F2  
                  77   LD' CT3  F2' 
                  78   LD  FB  

FC                93   LD' CT0' CT1' CT2  F1  
                  94   LD' CT0' CT1  CT2  F1' 
                  95   LD' CT0  CT1' CT2  F2  
                  96   LD' CT0  CT1  CT2  F2' 
                  97   LD' CT1  CT2  F1' F2' 
                  98   LD' CT2' 
                  99   LD  FC  




SIGNAL ASSIGNMENT
                                      Rows
 Pin    Signal name   Column     --------------    Activity
                                 Beg Avail Used

  1.     CLK             0        -    -    -        High    (Clock)
  2.     LD              4        -    -    -        High     
  3.     CEI             8        -    -    -        High     
  4.     DEI            12        -    -    -        High    (Clock)
  5.     HSI            16        -    -    -        High     
  6.     VSI            20        -    -    -        High     
  8.     AT5            24        -    -    -        High     
  9.     CT0            28        -    -    -        High     
 10.     CT1            32        -    -    -        High     
 11.     CT2            36        -    -    -        High     
 12.     CT3            40        -    -    -        High     
 13.     CT6            44        -    -    -        High     
 14.     CT7            48        -    -    -        High     
 15.     D0             50      140    9    0        High    (Registered)
 16.     -              46      131    9    0                (Three-state)
 17.     PS5            42      120   11    1        High    (Registered)
 18.     Q0             38      107   13    2        High    (Registered)
 19.     FC             34       92   15    7        High    (Registered)
 20.     FB             30       75   17    3        High    (Registered)
 22.     DE             26       58   17    2        High    (Registered)
 23.     CE             22       43   15    2        High    (Registered)
 24.     EUL            18       30   13    2        High    (Registered)
 25.     VS             14       19   11    2        High    (Registered)
 26.     HS             10       10    9    2        High    (Registered)
 27.     F1              6        1    9    0        High    (Registered)
 28.     F2              2        -    -    -        High     
 29.     -               -        0    1    0                 
 30.     -               -      149    1    0                 
                                    ---- ----
                                     150   23  (15%)


I200  No fatal errors found in source code (device phase).
I201  No warnings.



OrCAD DEVICE
Type:       PAL26V12
*
QP28* QF7848* QV1024*
F0*
L0520 1111111111111111111111111111111111111111111111111111*
L0572 1111101111111111011111111111111111111111111111111111*
L0624 1111011111011111111111111111111111111111111111111111*
L0988 1111111111111111111111111111111111111111111111111111*
L1040 1111101111111111111101111111111111111111111111111111*
L1092 1111011111111101111111111111111111111111111111111111*
L1560 1111111111111111111111111111111111111111111111111111*
L1612 1111101111111111111111110111111111111111111101111111*
L1664 1111011111111111110111111111111111111111111111111111*
L2236 1111111111111111111111111111111111111111111111111111*
L2288 1111101101111111111111111111111111111111111111111111*
L2340 1111011111111111111111011111111111111111111111111111*
L3016 1111111111111111111111111111111111111111111111111111*
L3068 1111101111110111111111111111111111111111111111111011*
L3120 1111011111111111111111111101111111111111111111111111*
L3900 1111111111111111111111111111111111111111111111111111*
L3952 1101101111111111111111111111111111111111101111111111*
L4004 1110101111111111111111111111111111111111011111111111*
L4056 1111011111111111111111111111110111111111111111111111*
L4784 1111111111111111111111111111111111111111111111111111*
L4836 1111100111111111111111111111101110110111111111111111*
L4888 1111101011111111111111111111101101110111111111111111*
L4940 1101101111111111111111111111011110110111111111111111*
L4992 1110101111111111111111111111011101110111111111111111*
L5044 1110101011111111111111111111111101110111111111111111*
L5096 1111101111111111111111111111111111111011111111111111*
L5148 1111011111111111111111111111111111011111111111111111*
L5564 1111111111111111111111111111111111111111111111111111*
L5616 1111101111111111111111111111111111111111111111111101*
L5668 1111011111111111111111111111111111111101111111111111*
L6240 1111111111111111111111111111111111111111111111111111*
L6292 1111111111111111111111110111111111111111111110111111*
L7800 111111111111100000000111111111111111100000000111*
CCE47*

I202  6/3/13  3:17 pm  (Monday)
I203  Memory usage 9K
I204  Elapsed time 1 second