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OrCAD LOGIC COMPILER v2.01 N 12/09/94 (Source file .\PLD\#0007.PLD)
1 || FILE: #0007.PLD
2 || PROJ: 20120605
3 || PART: G26CV12-#0007
4 ||
5 || DEV : GAL26CV12
6 ||
7 || DESC: DECODER MEMORIA DI SISTEMA
8 ||
9 |
10 |GAL26CV12
11 |
12 || INPUT
13 | 1:MA19, 2:MA20, 3:CS0, 4:CS2, 5:CS3, 6:CSF, 8:CX1, 9:PHI0, 10:RW,
14 | 11:PHI2, 12:MW0, 13:-, 14:-, 28:CPU,
15 || OUTPUT
16 | 15:G, 16:CE0, 17:CE2, 18:CE3, 19:CEF, 20:WE, 22:RD, 23:CE4,
17 | 24:CE5, 25:CE6, 26:CE7, 27:CE8
18 |
19 | ACTIVE-LOW: G, CE0, CE2, CE3, CEF, WE, RD, CE4, CE5, CE6, CE7, CE8
20 |
21 |
22 | SIGNATURE: "0007 "
23 |
24 ||
25 || BUFFER 2MB - ABILITATO DA /CX1
26 | CE4 = (CX1' & PHI2 & MA20' & MA19')
27 | CE5 = (CX1' & PHI2 & MA20' & MA19)
28 | CE6 = (CX1' & PHI2 & MA20 & MA19')
29 | CE7 = (CX1' & PHI2 & MA20 & MA19)
30 ||
31 || RAM 512K PER CPU 8 BIT - ABILITATA DA /CS0
32 | CE8 = (CS0' & PHI2 & CPU')
33 ||
34 || RAM 128K PER CPU 16 BIT - ABILITATA DA /CS0
35 | CE0 = (CS0' & PHI2 & CPU)
36 ||
37 || RAM 128K - ABILITATE DA /CS2 e /CS3
38 | CE2 = (CS2' & PHI2)
39 | CE3 = (CS3' & PHI2)
40 ||
41 || FLASH 512K (16 bit) / 256K (8 bit - A18 = 0) ABILITATA DA /CSF
42 | CEF = (CSF' & PHI2)
43 ||
44 || BUFFER DATI
45 | MS = (CS0' # CS2' # CS3' # CSF' # CX1')
46 | G = (MS & PHI2)
47 ||
48 || READ & WRITE ENABLE
49 | RD = (MS & PHI2 & RW)
50 | WRA = (MS & PHI2 & RW' & MW0)
51 | WRB = (MS & PHI0 & RW' & MW0')
52 | WE = (WRA # WRB)
I200 No fatal errors found in source code (logic phase).
I201 No warnings.
I202 8/22/12 10:19 am (Wednesday)
I203 Memory usage 87K
I204 Elapsed time 1 second
OrCAD DEVICE FITTER v2.01 12/09/94 (Source file .\PLD\#0007.PLA)
RESOLVED EXPRESSIONS (Reduction 0)
Signal name Row Terms
CE4 38 MA19' MA20' CX1' PHI2
CE5 29 MA19 MA20' CX1' PHI2
CE6 20 MA19' MA20 CX1' PHI2
CE7 11 MA19 MA20 CX1' PHI2
CE8 2 CS0' PHI2 CPU'
CE0 104 CS0' PHI2 CPU
CE2 95 CS2' PHI2
G 113 CS0' PHI2
114 CS2' PHI2
115 CS3' PHI2
116 CSF' PHI2
117 CX1' PHI2
CE3 86 CS3' PHI2
CEF 75 CSF' PHI2
RD 49 CS0' RW PHI2
50 CS2' RW PHI2
51 CS3' RW PHI2
52 CSF' RW PHI2
53 CX1' RW PHI2
WE 62 CS0' PHI0 RW' MW0'
63 CS0' RW' PHI2 MW0
64 CS2' PHI0 RW' MW0'
65 CS2' RW' PHI2 MW0
66 CS3' PHI0 RW' MW0'
67 CS3' RW' PHI2 MW0
68 CSF' PHI0 RW' MW0'
69 CSF' RW' PHI2 MW0
70 CX1' PHI0 RW' MW0'
71 CX1' RW' PHI2 MW0
SIGNAL ASSIGNMENT
Rows
Pin Signal name Column -------------- Activity
Beg Avail Used
1. MA19 0 - - - High (Clock)
2. MA20 4 - - - High
3. CS0 8 - - - High
4. CS2 12 - - - High
5. CS3 16 - - - High
6. CSF 20 - - - High
8. CX1 24 - - - High
9. PHI0 28 - - - High
10. RW 32 - - - High
11. PHI2 36 - - - High
12. MW0 40 - - - High
13. - 44 - - -
14. - 48 - - -
15. G 51 112 9 5 Low (Three-state)
16. CE0 47 103 9 1 Low (Three-state)
17. CE2 43 94 9 1 Low (Three-state)
18. CE3 39 85 9 1 Low (Three-state)
19. CEF 35 74 11 1 Low (Three-state)
20. WE 31 61 13 10 Low (Three-state)
22. RD 27 48 13 5 Low (Three-state)
23. CE4 23 37 11 1 Low (Three-state)
24. CE5 19 28 9 1 Low (Three-state)
25. CE6 15 19 9 1 Low (Three-state)
26. CE7 11 10 9 1 Low (Three-state)
27. CE8 7 1 9 1 Low (Three-state)
28. CPU 2 - - - High
29. - - 0 1 0
30. - - 121 1 0
---- ----
122 29 (24%)
I200 No fatal errors found in source code (device phase).
I201 No warnings.
OrCAD DEVICE
Type: GAL26CV12
*
QP28* QF6432* QV1024*
F0*
L0052 1111111111111111111111111111111111111111111111111111*
L0104 1110111110111111111111111111111111110111111111111111*
L0520 1111111111111111111111111111111111111111111111111111*
L0572 0111011111111111111111111011111111110111111111111111*
L0988 1111111111111111111111111111111111111111111111111111*
L1040 1011011111111111111111111011111111110111111111111111*
L1456 1111111111111111111111111111111111111111111111111111*
L1508 0111101111111111111111111011111111110111111111111111*
L1924 1111111111111111111111111111111111111111111111111111*
L1976 1011101111111111111111111011111111110111111111111111*
L2496 1111111111111111111111111111111111111111111111111111*
L2548 1111111110111111111111111111111101110111111111111111*
L2600 1111111111111011111111111111111101110111111111111111*
L2652 1111111111111111101111111111111101110111111111111111*
L2704 1111111111111111111110111111111101110111111111111111*
L2756 1111111111111111111111111011111101110111111111111111*
L3172 1111111111111111111111111111111111111111111111111111*
L3224 1111111110111111111111111111011110111111101111111111*
L3276 1111111110111111111111111111111110110111011111111111*
L3328 1111111111111011111111111111011110111111101111111111*
L3380 1111111111111011111111111111111110110111011111111111*
L3432 1111111111111111101111111111011110111111101111111111*
L3484 1111111111111111101111111111111110110111011111111111*
L3536 1111111111111111111110111111011110111111101111111111*
L3588 1111111111111111111110111111111110110111011111111111*
L3640 1111111111111111111111111011011110111111101111111111*
L3692 1111111111111111111111111011111110110111011111111111*
L3848 1111111111111111111111111111111111111111111111111111*
L3900 1111111111111111111110111111111111110111111111111111*
L4420 1111111111111111111111111111111111111111111111111111*
L4472 1111111111111111101111111111111111110111111111111111*
L4888 1111111111111111111111111111111111111111111111111111*
L4940 1111111111111011111111111111111111110111111111111111*
L5356 1111111111111111111111111111111111111111111111111111*
L5408 1101111110111111111111111111111111110111111111111111*
L5824 1111111111111111111111111111111111111111111111111111*
L5876 1111111110111111111111111111111111110111111111111111*
L5928 1111111111111011111111111111111111110111111111111111*
L5980 1111111111111111101111111111111111110111111111111111*
L6032 1111111111111111111110111111111111110111111111111111*
L6084 1111111111111111111111111011111111110111111111111111*
L6344 0101010101010101010101010011000000110000001100000011*
L6396 011100100000001000000010000000100000*
C0844*
I202 8/22/12 10:19 am (Wednesday)
I203 Memory usage 9K
I204 Elapsed time 1 second