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OrCAD LOGIC COMPILER v2.01 N 12/09/94 (Source file .\PLD\#0005.PLD)
1 || FILE: #0005.PLD
2 || PROJ: 20120602
3 || PART: G26CV12-#0005
4 ||
5 || DEV : GAL26CV12
6 ||
7 || DESC: DECODER MEMORIA
8 ||
9 |
10 |GAL26CV12
11 |
12 || INPUT
13 | 1:A7, 2:A8, 3:A9, 4:A10, 5:A11, 6:A12, 8:A13, 9:A14, 10:A15,
14 | 11:RES, 12:XE0, 13:XE1, 14:XE2, 28:CLB,
15 || OUTPUT
16 | 15:IO0, 16:IO1, 17:DHS, 18:SYS, 19:ML, 20:MH, 22:PBE, 23:DB0,
17 | 24:PB0, 25:CX0, 26:CX1, 27:CX2
18 |
19 | ACTIVE-LOW: CX0, CX1, CX2, IO0, IO1
20 |
21 |
22 | SIGNATURE: "0005 "
23 |
24 ||
25 | BLK0 = (RES & A15' & A14' & A13')
26 | BLK1 = (RES & A15' & A14' & A13)
27 | BLK2 = (RES & A15' & A14 & A13')
28 | BLK3 = (RES & A15' & A14 & A13)
29 | CX0 = (BLK1 & XE0 & CLB')
30 | CX1 = (BLK2 & XE1 & CLB')
31 | CX2 = (BLK3 & XE2 & CLB')
32 || RAM DBR LOW
33 | BLK1A = ((BLK1 & XE0') # (BLK1 & CLB))
34 | BLK2A = ((BLK2 & XE1') # (BLK2 & CLB))
35 | BLK3A = ((BLK3 & XE2') # (BLK3 & CLB))
36 | ML = (BLK0 # BLK1A # BLK2A # BLK3A)
37 ||
38 || BLK4 => 8000 - BFFF 16K
39 | B4 = (A15 & A14')
40 || BLK5 => C000 - DFFF 8K
41 | B5 = (A15 & A14 & A13')
42 || BLK6 => E000 - EFFF 4K
43 | B6 = (A15 & A14 & A13 & A12')
44 || BLK7 => F000 - F7FF 2K
45 | B7 = (A15 & A14 & A13 & A12 & A11')
46 || BLK8 => F800 - FBFF 1K
47 | B8 = (A15 & A14 & A13 & A12 & A11 & A10')
48 || BLK9 => FC00 - FDFF 512B
49 | B9 = (A15 & A14 & A13 & A12 & A11 & A10 & A9')
50 || BLK91 => FD00 - FDFF 256 B
51 | B91 = (A15 & A14 & A13 & A12 & A11 & A10 & A9' & A8)
52 || BLK10 => FE00 - FEFF 256B (I/O 1)
53 | B10 = (A15 & A14 & A13 & A12 & A11 & A10 & A9 & A8')
54 || BLK11 => FF00 - FF7F 128B (I/O 0)
55 | B11 = (A15 & A14 & A13 & A12 & A11 & A10 & A9 & A8 & A7')
56 || BLK12 => FF80 - FFFF 128B (SYSTEM PBR)
57 | B12 = (A15 & A14 & A13 & A12 & A11 & A10 & A9 & A8 & A7)
58 ||
59 | IO0 = (RES & B11)
60 | IO1 = (RES & B10)
61 ||
62 | MH = ((B4 # B5 # B6 # B7 # B8 # B9) & RES)
63 ||
64 | PBE = ((B4 # B5 # B6 # B7 # B8 # B9 # B12) & RES)
65 ||
66 || SELEZIONE DBR HIGH
67 | X0 = (A15)
68 | X1 = (A15' & A14)
69 | X2 = (A15' & A14' & A13)
70 | X3 = (A15' & A14' & A13' & A12)
71 | X4 = (A15' & A14' & A13' & A12' & A11)
72 | DHS = (X0 # X1 # X2 # X3 # X4)
73 ||
74 || PAGINE COMUNI IN BANCO 0
75 || P00 => 0080 - 00FF
76 | P00 = (A15' & A14' & A13' & A12' & A11' & A10' & A9' & A8' & A7)
77 || P01 => 0100 - 01FF
78 | P01 = (A15' & A14' & A13' & A12' & A11' & A10' & A9' & A8)
79 || P02 => 0200 - 02FF
80 | P02 = (A15' & A14' & A13' & A12' & A11' & A10' & A9 & A8')
81 || P03 => 0300 - 03FF
82 | P03 = (A15' & A14' & A13' & A12' & A11' & A10' & A9 & A8)
83 || P04 => 0400 - 03FF
84 | P04 = (A15' & A14' & A13' & A12' & A11' & A10 & A9' & A8')
85 || P05 => 0500 - 05FF
86 | P05 = (A15' & A14' & A13' & A12' & A11' & A10 & A9' & A8)
87 | CMR = (P00 # P01 # P02 # P03 # P04 # P05)
88 ||
89 || FORZATURA DBR IN BANCO 0
90 | DB0 = (CMR # CLB)
91 ||
92 || FORZATURA PBR IN BANCO 0
93 | PB0 = (B91 # B12 # CLB)
94 | SYS = ((B91 # B12) & RES)
I200 No fatal errors found in source code (logic phase).
I201 No warnings.
I202 7/5/12 7:24 pm (Thursday)
I203 Memory usage 124K
I204 Elapsed time 1 second
OrCAD DEVICE FITTER v2.01 12/09/94 (Source file .\PLD\#0005.PLA)
RESOLVED EXPRESSIONS (Reduction 0)
Signal name Row Terms
CX0 20 A13 A14' A15' RES XE0 CLB'
CX1 11 A13' A14 A15' RES XE1 CLB'
CX2 2 A13 A14 A15' RES XE2 CLB'
ML 75 A13' A14 A15' RES XE1'
76 A13' A14 A15' RES CLB
77 A13 A14' A15' RES XE0'
78 A13 A14' A15' RES CLB
79 A13 A14 A15' RES XE2'
80 A13 A14 A15' RES CLB
81 A13' A14' A15' RES
IO0 113 A7' A8 A9 A10 A11 A12 A13 A14 A15 RES
IO1 104 A8' A9 A10 A11 A12 A13 A14 A15 RES
MH 62 A9' A10 A11 A12 A13 A14 A15 RES
63 A10' A11 A12 A13 A14 A15 RES
64 A11' A12 A13 A14 A15 RES
65 A12' A13 A14 A15 RES
66 A13' A14 A15 RES
67 A14' A15 RES
PBE 49 A7 A8 A9 A10 A11 A12 A13 A14 A15 RES
50 A9' A10 A11 A12 A13 A14 A15 RES
51 A10' A11 A12 A13 A14 A15 RES
52 A11' A12 A13 A14 A15 RES
53 A12' A13 A14 A15 RES
54 A13' A14 A15 RES
55 A14' A15 RES
SYS 86 A7 A8 A9 A10 A11 A12 A13 A14 A15 RES
87 A8 A9' A10 A11 A12 A13 A14 A15 RES
DHS 95 A11 A12' A13' A14' A15'
96 A12 A13' A14' A15'
97 A13 A14' A15'
98 A14 A15'
99 A15
DB0 38 A7 A8' A9' A10' A11' A12' A13' A14' A15'
39 A8' A9' A10 A11' A12' A13' A14' A15'
40 A8' A9 A10' A11' A12' A13' A14' A15'
41 A8 A9' A10' A11' A12' A13' A14' A15'
42 A8 A9' A10 A11' A12' A13' A14' A15'
43 A8 A9 A10' A11' A12' A13' A14' A15'
44 CLB
PB0 29 A7 A8 A9 A10 A11 A12 A13 A14 A15
30 A8 A9' A10 A11 A12 A13 A14 A15
31 CLB
SIGNAL ASSIGNMENT
Rows
Pin Signal name Column -------------- Activity
Beg Avail Used
1. A7 0 - - - High (Clock)
2. A8 4 - - - High
3. A9 8 - - - High
4. A10 12 - - - High
5. A11 16 - - - High
6. A12 20 - - - High
8. A13 24 - - - High
9. A14 28 - - - High
10. A15 32 - - - High
11. RES 36 - - - High
12. XE0 40 - - - High
13. XE1 44 - - - High
14. XE2 48 - - - High
15. IO0 51 112 9 1 Low (Three-state)
16. IO1 47 103 9 1 Low (Three-state)
17. DHS 42 94 9 5 High (Three-state)
18. SYS 38 85 9 2 High (Three-state)
19. ML 34 74 11 7 High (Three-state)
20. MH 30 61 13 6 High (Three-state)
22. PBE 26 48 13 7 High (Three-state)
23. DB0 22 37 11 7 High (Three-state)
24. PB0 18 28 9 3 High (Three-state)
25. CX0 15 19 9 1 Low (Three-state)
26. CX1 11 10 9 1 Low (Three-state)
27. CX2 7 1 9 1 Low (Three-state)
28. CLB 2 - - - High
29. - - 0 1 0
30. - - 121 1 0
---- ----
122 42 (34%)
I200 No fatal errors found in source code (device phase).
I201 No warnings.
OrCAD DEVICE
Type: GAL26CV12
*
QP28* QF6432* QV1024*
F0*
L0052 1111111111111111111111111111111111111111111111111111*
L0104 1110111111111111111111110111011110110111111111110111*
L0520 1111111111111111111111111111111111111111111111111111*
L0572 1110111111111111111111111011011110110111111101111111*
L0988 1111111111111111111111111111111111111111111111111111*
L1040 1110111111111111111111110111101110110111011111111111*
L1456 1111111111111111111111111111111111111111111111111111*
L1508 0111011101110111011101110111011101111111111111111111*
L1560 1111011110110111011101110111011101111111111111111111*
L1612 1101111111111111111111111111111111111111111111111111*
L1924 1111111111111111111111111111111111111111111111111111*
L1976 0111101110111011101110111011101110111111111111111111*
L2028 1111101110110111101110111011101110111111111111111111*
L2080 1111101101111011101110111011101110111111111111111111*
L2132 1111011110111011101110111011101110111111111111111111*
L2184 1111011110110111101110111011101110111111111111111111*
L2236 1111011101111011101110111011101110111111111111111111*
L2288 1101111111111111111111111111111111111111111111111111*
L2496 1111111111111111111111111111111111111111111111111111*
L2548 0111011101110111011101110111011101110111111111111111*
L2600 1111111110110111011101110111011101110111111111111111*
L2652 1111111111111011011101110111011101110111111111111111*
L2704 1111111111111111101101110111011101110111111111111111*
L2756 1111111111111111111110110111011101110111111111111111*
L2808 1111111111111111111111111011011101110111111111111111*
L2860 1111111111111111111111111111101101110111111111111111*
L3172 1111111111111111111111111111111111111111111111111111*
L3224 1111111110110111011101110111011101110111111111111111*
L3276 1111111111111011011101110111011101110111111111111111*
L3328 1111111111111111101101110111011101110111111111111111*
L3380 1111111111111111111110110111011101110111111111111111*
L3432 1111111111111111111111111011011101110111111111111111*
L3484 1111111111111111111111111111101101110111111111111111*
L3848 1111111111111111111111111111111111111111111111111111*
L3900 1111111111111111111111111011011110110111111110111111*
L3952 1101111111111111111111111011011110110111111111111111*
L4004 1111111111111111111111110111101110110111101111111111*
L4056 1101111111111111111111110111101110110111111111111111*
L4108 1111111111111111111111110111011110110111111111111011*
L4160 1101111111111111111111110111011110110111111111111111*
L4212 1111111111111111111111111011101110110111111111111111*
L4420 1111111111111111111111111111111111111111111111111111*
L4472 0111011101110111011101110111011101110111111111111111*
L4524 1111011110110111011101110111011101110111111111111111*
L4888 1111111111111111111111111111111111111111111111111111*
L4940 1111111111111111011110111011101110111111111111111111*
L4992 1111111111111111111101111011101110111111111111111111*
L5044 1111111111111111111111110111101110111111111111111111*
L5096 1111111111111111111111111111011110111111111111111111*
L5148 1111111111111111111111111111111101111111111111111111*
L5356 1111111111111111111111111111111111111111111111111111*
L5408 1111101101110111011101110111011101110111111111111111*
L5824 1111111111111111111111111111111111111111111111111111*
L5876 1011011101110111011101110111011101110111111111111111*
L6344 0101011111111111111101010011000000110000001100000011*
L6396 010100100000001000000010000000100000*
C568F*
I202 7/5/12 7:24 pm (Thursday)
I203 Memory usage 11K
I204 Elapsed time 1 second