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OrCAD LOGIC COMPILER v2.01 N 12/09/94 (Source file .\PLD\#0004.PLD)
1 || FILE: #0004.PLD
2 || PROJ: 20120602
3 || PART: G22V10-#0004
4 ||
5 || DEV : GAL22V10
6 ||
7 || DESC: SECONDO DECODER
8 ||
9 |
10 |GAL22V10
11 |
12 || INPUT
13 | 1:SYS, 2:ML, 3:MH, 4:PBE, 5:PHI0, 6:RW, 7:PHI2, 8:Q17, 9:Q18, 10:CLB,
14 | 11:PBX, 13:APW, 14:PWE, 15:DRE, 16:S,
15 || OUTPUT
16 | 17:EN, 18:ME, 19:CS2, 20:CS3, 21:CSF, 22:QX, 23:APS
17 |
18 | ACTIVE-LOW: CSF, CS2, CS3, ME
19 |
20 | SIGNATURE: "0004 "
21 |
22 ||
23 | EN = (PHI0 # PHI2)
24 ||
25 || RAM DBR HIGH
26 | DH1 = (MH & DRE & RW & CLB')
27 | DH2 = (MH & RW' & PWE')
28 | DH3 = (MH & RW' & CLB)
29 || ME => DATA BANK MEMORY
30 | MEX = (ML # DH1 # DH2 # DH3)
31 | ME = ((MEX & S) # (MEX & S' & EN))
32 ||
33 || PBR
34 | PB1 = (PBE & DRE' & RW)
35 | PB2 = (PBE & CLB & RW)
36 | PB3 = (PBE & PWE & CLB' & RW')
37 | PBR = (PB1 # PB2 # PB3)
38 | QX = (Q18 ## PBX)
39 | A18 = QX
40 | CSFX = (A18' & PBR)
41 | CS2X = (A18 & PBR & Q17')
42 | CS3X = (A18 & PBR & Q17)
43 | CSF = ((CSFX & S) # (CSFX & S' & EN))
44 | CS2 = ((CS2X & S) # (CS2X & S' & EN))
45 | CS3 = ((CS3X & S) # (CS3X & S' & EN))
46 | APS = (PBE & PWE & CLB' & RW' & APW & SYS')
I200 No fatal errors found in source code (logic phase).
I201 No warnings.
I202 7/5/12 7:24 pm (Thursday)
I203 Memory usage 91K
I204 Elapsed time 1 second
OrCAD DEVICE FITTER v2.01 12/09/94 (Source file .\PLD\#0004.PLA)
RESOLVED EXPRESSIONS (Reduction 0)
Signal name Row Terms
EN 84 PHI0
85 PHI2
ME 67 MH RW CLB' DRE S' EN
68 MH RW' CLB S' EN
69 MH RW' PWE' S' EN
70 MH RW CLB' DRE S
71 MH RW' CLB S
72 MH RW' PWE' S
73 ML S' EN
74 ML S
QX 11 Q18' PBX
12 Q18 PBX'
CSF 22 PBE RW' CLB' PWE S' EN QX'
23 PBE RW' CLB' PWE S QX'
24 PBE RW CLB S' EN QX'
25 PBE RW DRE' S' EN QX'
26 PBE RW CLB S QX'
27 PBE RW DRE' S QX'
CS2 50 PBE RW' Q17' CLB' PWE S' EN QX
51 PBE RW' Q17' CLB' PWE S QX
52 PBE RW Q17' CLB S' EN QX
53 PBE RW Q17' DRE' S' EN QX
54 PBE RW Q17' CLB S QX
55 PBE RW Q17' DRE' S QX
CS3 35 PBE RW' Q17 CLB' PWE S' EN QX
36 PBE RW' Q17 CLB' PWE S QX
37 PBE RW Q17 CLB S' EN QX
38 PBE RW Q17 DRE' S' EN QX
39 PBE RW Q17 CLB S QX
40 PBE RW Q17 DRE' S QX
APS 2 SYS' PBE RW' CLB' APW PWE
SIGNAL ASSIGNMENT
Rows
Pin Signal name Column -------------- Activity
Beg Avail Used
1. SYS 0 - - - High (Clock)
2. ML 4 - - - High
3. MH 8 - - - High
4. PBE 12 - - - High
5. PHI0 16 - - - High
6. RW 20 - - - High
7. PHI2 24 - - - High
8. Q17 28 - - - High
9. Q18 32 - - - High
10. CLB 36 - - - High
11. PBX 40 - - - High
13. APW 42 - - - High
14. PWE 38 122 9 0 High (Registered)
15. DRE 34 111 11 0 High (Registered)
16. S 30 98 13 0 High (Registered)
17. EN 26 83 15 2 High (Three-state)
18. ME 23 66 17 8 Low (Three-state)
19. CS2 19 49 17 6 Low (Three-state)
20. CS3 15 34 15 6 Low (Three-state)
21. CSF 11 21 13 6 Low (Three-state)
22. QX 6 10 11 2 High (Three-state)
23. APS 2 1 9 1 High (Three-state)
25. - - 0 1 0
26. - - 131 1 0
---- ----
132 31 (23%)
I200 No fatal errors found in source code (device phase).
I201 No warnings.
OrCAD DEVICE
Type: PAL22V10
*
QP24* QF5828* QV1024*
F0*
L0044 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L0088 10 11 11 11 11 11 01 11 11 11 10 11 11 11 11 11 11 11 10 01 11 01 *
L0440 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L0484 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 10 11 11 11 01 11 *
L0528 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 01 11 11 11 10 11 *
L0924 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L0968 11 11 11 10 11 11 01 11 11 11 10 11 11 01 11 10 11 11 10 01 11 11 *
L1012 11 11 11 10 11 11 01 11 11 11 10 11 11 11 11 01 11 11 10 01 11 11 *
L1056 11 11 11 10 11 11 01 11 11 11 01 11 11 01 11 10 11 11 01 11 11 11 *
L1100 11 11 11 10 11 11 01 11 11 11 01 11 11 01 11 10 11 10 11 11 11 11 *
L1144 11 11 11 10 11 11 01 11 11 11 01 11 11 11 11 01 11 11 01 11 11 11 *
L1188 11 11 11 10 11 11 01 11 11 11 01 11 11 11 11 01 11 10 11 11 11 11 *
L1496 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L1540 11 11 11 01 11 11 01 11 11 11 10 11 11 01 01 10 11 11 10 01 11 11 *
L1584 11 11 11 01 11 11 01 11 11 11 10 11 11 11 01 01 11 11 10 01 11 11 *
L1628 11 11 11 01 11 11 01 11 11 11 01 11 11 01 01 10 11 11 01 11 11 11 *
L1672 11 11 11 01 11 11 01 11 11 11 01 11 11 01 01 10 11 10 11 11 11 11 *
L1716 11 11 11 01 11 11 01 11 11 11 01 11 11 11 01 01 11 11 01 11 11 11 *
L1760 11 11 11 01 11 11 01 11 11 11 01 11 11 11 01 01 11 10 11 11 11 11 *
L2156 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L2200 11 11 11 01 11 11 01 11 11 11 10 11 11 01 10 10 11 11 10 01 11 11 *
L2244 11 11 11 01 11 11 01 11 11 11 10 11 11 11 10 01 11 11 10 01 11 11 *
L2288 11 11 11 01 11 11 01 11 11 11 01 11 11 01 10 10 11 11 01 11 11 11 *
L2332 11 11 11 01 11 11 01 11 11 11 01 11 11 01 10 10 11 10 11 11 11 11 *
L2376 11 11 11 01 11 11 01 11 11 11 01 11 11 11 10 01 11 11 01 11 11 11 *
L2420 11 11 11 01 11 11 01 11 11 11 01 11 11 11 10 01 11 10 11 11 11 11 *
L2904 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L2948 11 11 11 11 01 11 11 11 11 11 01 11 11 01 11 10 11 01 10 11 11 11 *
L2992 11 11 11 11 01 11 11 11 11 11 10 11 11 01 11 10 11 11 01 11 11 11 *
L3036 11 11 11 11 01 11 11 11 11 11 10 11 11 01 11 10 11 11 11 10 11 11 *
L3080 11 11 11 11 01 11 11 11 11 11 01 11 11 11 11 01 11 01 10 11 11 11 *
L3124 11 11 11 11 01 11 11 11 11 11 10 11 11 11 11 01 11 11 01 11 11 11 *
L3168 11 11 11 11 01 11 11 11 11 11 10 11 11 11 11 01 11 11 11 10 11 11 *
L3212 11 11 01 11 11 11 11 11 11 11 11 11 11 01 11 10 11 11 11 11 11 11 *
L3256 11 11 01 11 11 11 11 11 11 11 11 11 11 11 11 01 11 11 11 11 11 11 *
L3652 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L3696 11 11 11 11 11 11 11 11 01 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L3740 11 11 11 11 11 11 11 11 11 11 11 11 01 11 11 11 11 11 11 11 11 11 *
L5808 11 11 01 01 01 01 11 11 11 11 *
CBFDB*
I202 7/5/12 7:24 pm (Thursday)
I203 Memory usage 9K
I204 Elapsed time 1 second