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OrCAD LOGIC COMPILER v2.01 N 12/09/94 (Source file .\PLD\#0003.PLD)
1 || FILE: #0003.PLD
2 || PROJ: 20120602
3 || PART: G16V8-#0003
4 ||
5 || DEV : GAL16V8
6 ||
7 || DESC: MUX READ BANK/CONTROL REG.
8 ||
9 |
10 |GAL16V8A
11 |
12 || INPUT
13 | 1:A0, 2:A1, 3:A2, 4:A3, 5:B0, 6:B1, 7:B2, 8:B3,
14 | 9:C0, 11:C1, 12:C2, 13:C3, 14:SA4, 19:SA5,
15 || OUTPUT
16 | 15:Y0, 16:Y1, 17:Y2, 18:Y3
17 |
18 ||
19 || ACTIVE-LOW:
20 |
21 | PROPERTY: "SIMPLE"
22 |
23 | SIGNATURE: "0003 "
24 |
25 | Y0 = ((A0 & SA5') # (B0 & SA5 & SA4') # (C0 & SA5 & SA4))
26 | Y1 = ((A1 & SA5') # (B1 & SA5 & SA4') # (C1 & SA5 & SA4))
27 | Y2 = ((A2 & SA5') # (B2 & SA5 & SA4') # (C2 & SA5 & SA4))
28 | Y3 = ((A3 & SA5') # (B3 & SA5 & SA4') # (C3 & SA5 & SA4))
I200 No fatal errors found in source code (logic phase).
I201 No warnings.
I202 7/5/12 7:24 pm (Thursday)
I203 Memory usage 77K
I204 Elapsed time 1 second
OrCAD DEVICE FITTER v2.01 12/09/94 (Source file .\PLD\#0003.PLA)
I289 Simple GAL architecture selected.
RESOLVED EXPRESSIONS (Reduction 0)
Signal name Row Terms
Y0 32 B0 SA4' SA5
33 C0 SA4 SA5
34 A0 SA5'
Y1 24 B1 SA4' SA5
25 C1 SA4 SA5
26 A1 SA5'
Y2 16 B2 SA4' SA5
17 C2 SA4 SA5
18 A2 SA5'
Y3 8 B3 SA4' SA5
9 C3 SA4 SA5
10 A3 SA5'
SIGNAL ASSIGNMENT
Rows
Pin Signal name Column -------------- Activity
Beg Avail Used
1. A0 2 - - - High (Clock)
2. A1 0 - - - High
3. A2 4 - - - High
4. A3 8 - - - High
5. B0 12 - - - High
6. B1 16 - - - High
7. B2 20 - - - High
8. B3 24 - - - High
9. C0 28 - - - High
11. C1 30 - - - High (Enable)
12. C2 26 56 8 0 High
13. C3 22 48 8 0 High
14. SA4 18 40 8 0 High
15. Y0 0 32 8 3 High
16. Y1 0 24 8 3 High
17. Y2 14 16 8 3 High
18. Y3 10 8 8 3 High
19. SA5 6 0 8 0 High
---- ----
64 12 (19%)
I200 No fatal errors found in source code (device phase).
I201 No warnings.
OrCAD DEVICE
Type: GAL16V8
*
QP20* QF2194* QV1024*
F0*
L0256 11 11 11 01 11 11 11 11 11 10 11 11 01 11 11 11 *
L0288 11 11 11 01 11 11 11 11 11 01 11 01 11 11 11 11 *
L0320 11 11 11 10 01 11 11 11 11 11 11 11 11 11 11 11 *
L0512 11 11 11 01 11 11 11 11 11 10 01 11 11 11 11 11 *
L0544 11 11 11 01 11 11 11 11 11 01 11 11 11 01 11 11 *
L0576 11 11 01 10 11 11 11 11 11 11 11 11 11 11 11 11 *
L0768 11 11 11 01 11 11 11 11 01 10 11 11 11 11 11 11 *
L0800 11 11 11 01 11 11 11 11 11 01 11 11 11 11 11 01 *
L0832 01 11 11 10 11 11 11 11 11 11 11 11 11 11 11 11 *
L1024 11 11 11 01 11 11 01 11 11 10 11 11 11 11 11 11 *
L1056 11 11 11 01 11 11 11 11 11 01 11 11 11 11 01 11 *
L1088 11 01 11 10 11 11 11 11 11 11 11 11 11 11 11 11 *
L2048 11 11 11 11 00 11 00 00 00 11 00 00 00 11 00 00 *
L2080 00 11 00 11 00 10 00 00 00 10 00 00 00 10 00 00 *
L2112 00 10 00 00 10 00 01 11 11 11 11 11 11 11 11 11 *
L2144 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L2176 11 11 11 11 11 11 11 11 10 *
C35AD*
I202 7/5/12 7:24 pm (Thursday)
I203 Memory usage 6K
I204 Elapsed time 1 second