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OrCAD LOGIC COMPILER  v2.01 N 12/09/94  (Source file .\PLD\#0159.PLD)

  1  || FILE:   #0159.PLD
  2  || PROJ:   20120600
  3  || PART:   G18V10-#0086
  4  ||
  5  || DEV :   GAL18V10
  6  ||
  7  ||         DESC:   FLAG REGISTER - KEYBOARD
  8  ||
  9  |GAL18V10
 10  |
 11  || INPUT
 12  |  1:KRS, 2:HWP, 3:HCN, 4:HCI, 5:SRP, 6:SSN, 7:SSI, 8:SSO, 9:SCO, 19:KBR,
 13  || OUTPUT 
 14  |  11:DRQN, 12:DRQ, 13:NMIN, 14:NMI, 15:INTN, 16:INT, 17:OFFN, 18:OFF
 15  |
 16  | SIGNATURE: "0159    "
 17  |
 18  |
 19  | RES = KRS
 20  |
 21  ||-------------------------------------------------------------------
 22  || DRQN --> PIC - segnala al PIC quando HOST ha inviato un comando
 23  ||          1: reset oppure PIC ha letto registro comando
 24  ||          0: HOST scrive sul registro di comando
 25  || DRQ  --> HOST - flag BUSY letto da HOST (PIC occupato)
 26  ||          0: reset oppure PIC ha letto registro comando
 27  ||          1: HOST scrive sul registro di comando
 28  || FLIP-FLOP SR per DRQ, DRQN
 29  |  DRQ  = (HWP & DRQN)'            || DRQ -> 1, DRQN -> 0
 30  |  DRQN = (RES & SRP & DRQ)'       || DRQ -> 0, DRQN -> 1
 31  ||-------------------------------------------------------------------
 32  || NMIN --> HOST - PIC invia ad HOST un NMI
 33  ||          1: reset oppure HOST ha azzerato il flag
 34  ||          0: PIC attiva NMI
 35  || NMI  --> PIC - flag attivazione NMI
 36  ||          0: reset oppure HOST ha azzerato il flag
 37  ||          1: PIC attiva NMI
 38  || FLIP-FLOP SR per NMI, NMIN
 39  |  NMIN = (RES & HCN & NMI)'       || NMI -> 0. NMIN -> 1
 40  |  NMI  = (SSN & NMIN)'            || NMI -> 1. NMIN -> 0
 41  ||-------------------------------------------------------------------
 42  || INTN --> HOST - PIC invia ad HOST un INT
 43  ||          1: reset oppure HOST ha azzerato il flag
 44  ||          0: PIC attiva INT
 45  || INT  --> PIC - flag attivazione INT
 46  ||          0: reset oppure HOST ha azzerato il flag
 47  ||          1: PIC attiva INT
 48  || FLIP-FLOP SR per INT, INTN
 49  |  INTN = (RES & HCI & INT)'       || INT -> 0, INTN -> 1
 50  |  INT  = (SSI & INTN)'            || INT -> 1, INTN -> 0
 51  ||-------------------------------------------------------------------
 52  || OFF  --> 1: reset oppure PIC abilita SSO
 53  ||          0: PIC abilita SCO
 54  || OFFN --> 1: PIC abilita SCO
 55  ||          0: reset oppure PIC abilita SSO


 56  |  OFF  = (KBR & RES & SSO & OFFN)'    || OFF -> 1, OFFN -> 0
 57  |  OFFN = (SCO & OFF)'                     || OFF -> 0, OFFN -> 1



I200  No fatal errors found in source code (logic phase).
I201  No warnings.


I202  7/24/12  11:28 am  (Tuesday)
I203  Memory usage 77K
I204  Elapsed time 1 second

OrCAD DEVICE FITTER  v2.01   12/09/94  (Source file .\PLD\#0159.PLA)




RESOLVED EXPRESSIONS (Reduction 0)

Signal name      Row   Terms

DRQ               69   HWP' 
                  70   DRQN' 

DRQN              78   KRS' 
                  79   SRP' 
                  80   DRQ' 

NMIN              60   KRS' 
                  61   HCN' 
                  62   NMI' 

INTN              38   KRS' 
                  39   HCI' 
                  40   INT' 

OFF               11   KRS' 
                  12   SSO' 
                  13   KBR' 
                  14   OFFN' 

NMI               49   SSN' 
                  50   NMIN' 

INT               29   SSI' 
                  30   INTN' 

OFFN              20   SCO' 
                  21   OFF' 




SIGNAL ASSIGNMENT
                                      Rows
 Pin    Signal name   Column     --------------    Activity
                                 Beg Avail Used

  1.     KRS             0        -    -    -        High    (Clock)
  2.     HWP             4        -    -    -        High     
  3.     HCN             8        -    -    -        High     
  4.     HCI            12        -    -    -        High     
  5.     SRP            16        -    -    -        High     
  6.     SSN            20        -    -    -        High     
  7.     SSI            24        -    -    -        High     
  8.     SSO            28        -    -    -        High     
  9.     SCO            34       86    9    0        High    (Registered)
 11.     DRQN           32       77    9    3        High    (Three-state)
 12.     DRQ            30       68    9    2        High    (Three-state)
 13.     NMIN           26       59    9    3        High    (Three-state)
 14.     NMI            22       48   11    2        High    (Three-state)
 15.     INTN           18       37   11    3        High    (Three-state)
 16.     INT            14       28    9    2        High    (Three-state)
 17.     OFFN           10       19    9    2        High    (Three-state)
 18.     OFF             6       10    9    4        High    (Three-state)
 19.     KBR             2        1    9    0        High    (Registered)
 21.     -               -        0    1    0                 
 22.     -               -       95    1    0                 
                                    ---- ----
                                      96   21  (22%)


I200  No fatal errors found in source code (device phase).
I201  No warnings.



OrCAD DEVICE
Type:       GAL18V10
*
QP20* QF3540* QV1024*
F0*
L0360 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L0396 10 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L0432 11 11 11 11 11 11 11 11 11 11 11 11 11 11 10 11 11 11 *
L0468 11 10 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L0504 11 11 11 11 11 10 11 11 11 11 11 11 11 11 11 11 11 11 *
L0684 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L0720 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 10 *
L0756 11 11 11 10 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L1008 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L1044 11 11 11 11 11 11 11 11 11 11 11 11 10 11 11 11 11 11 *
L1080 11 11 11 11 11 11 11 11 11 10 11 11 11 11 11 11 11 11 *
L1332 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L1368 10 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L1404 11 11 11 11 11 11 10 11 11 11 11 11 11 11 11 11 11 11 *
L1440 11 11 11 11 11 11 11 10 11 11 11 11 11 11 11 11 11 11 *
L1728 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L1764 11 11 11 11 11 11 11 11 11 11 10 11 11 11 11 11 11 11 *
L1800 11 11 11 11 11 11 11 11 11 11 11 11 11 10 11 11 11 11 *
L2124 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L2160 10 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L2196 11 11 11 11 10 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L2232 11 11 11 11 11 11 11 11 11 11 11 10 11 11 11 11 11 11 *
L2448 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L2484 11 11 10 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L2520 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 10 11 *
L2772 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L2808 10 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
L2844 11 11 11 11 11 11 11 11 10 11 11 11 11 11 11 11 11 11 *
L2880 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 10 11 11 *
L3456 11 11 11 11 11 11 11 11 11 11 00 11 00 00 00 11 00 01 *
L3492 00 11 01 01 00 11 10 01 00 10 00 00 00 10 00 00 00 10 *
L3528 00 00 00 10 00 00 *
C83FE*

I202  7/24/12  11:29 am  (Tuesday)
I203  Memory usage 6K
I204  Elapsed time 1 second