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OrCAD LOGIC COMPILER  v2.01 N 12/09/94  (Source file .\PLD\#0159.PLD)
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  1  ||	FILE:	#0159.PLD
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  2  ||	PROJ:	20120600
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  3  ||	PART:	G18V10-#0086
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  4  ||
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  5  ||	DEV :	GAL18V10
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  6  ||
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  7  || 	DESC:	FLAG REGISTER - KEYBOARD
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  8  ||
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  9  |GAL18V10
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 10  |
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 11  || INPUT
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 12  |  1:KRS, 2:HWP, 3:HCN, 4:HCI, 5:SRP, 6:SSN, 7:SSI, 8:SSO, 9:SCO, 19:KBR,
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 13  || OUTPUT
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 14  |  11:DRQN, 12:DRQ, 13:NMIN, 14:NMI, 15:INTN, 16:INT, 17:OFFN, 18:OFF
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 15  |
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 16  | SIGNATURE: "0159    "
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 17  |
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 18  |
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 19  | RES = KRS
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 20  |
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 21  ||-------------------------------------------------------------------
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 22  || DRQN --> PIC - segnala al PIC quando HOST ha inviato un comando
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 23  ||          1: reset oppure PIC ha letto registro comando
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 24  ||          0: HOST scrive sul registro di comando
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 25  || DRQ  --> HOST - flag BUSY letto da HOST (PIC occupato)
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 26  ||          0: reset oppure PIC ha letto registro comando
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 27  ||          1: HOST scrive sul registro di comando
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 28  || FLIP-FLOP SR per DRQ, DRQN
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 29  |  DRQ  = (HWP & DRQN)'		|| DRQ -> 1, DRQN -> 0
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 30  |  DRQN = (RES & SRP & DRQ)'	|| DRQ -> 0, DRQN -> 1
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 31  ||-------------------------------------------------------------------
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 32  || NMIN --> HOST - PIC invia ad HOST un NMI
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 33  ||          1: reset oppure HOST ha azzerato il flag
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 34  ||          0: PIC attiva NMI
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 35  || NMI  --> PIC - flag attivazione NMI
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 36  ||          0: reset oppure HOST ha azzerato il flag
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 37  ||          1: PIC attiva NMI
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 38  || FLIP-FLOP SR per NMI, NMIN
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 39  |  NMIN = (RES & HCN & NMI)'	|| NMI -> 0. NMIN -> 1
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 40  |  NMI  = (SSN & NMIN)'		|| NMI -> 1. NMIN -> 0
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 41  ||-------------------------------------------------------------------
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 42  || INTN --> HOST - PIC invia ad HOST un INT
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 43  ||          1: reset oppure HOST ha azzerato il flag
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 44  ||          0: PIC attiva INT
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 45  || INT  --> PIC - flag attivazione INT
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 46  ||          0: reset oppure HOST ha azzerato il flag
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 47  ||          1: PIC attiva INT
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 48  || FLIP-FLOP SR per INT, INTN
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 49  |  INTN = (RES & HCI & INT)'	|| INT -> 0, INTN -> 1
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 50  |  INT  = (SSI & INTN)'		|| INT -> 1, INTN -> 0
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 51  ||-------------------------------------------------------------------
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 52  || OFF  --> 1: reset oppure PIC abilita SSO
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 53  ||          0: PIC abilita SCO
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 54  || OFFN --> 1: PIC abilita SCO
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 55  ||          0: reset oppure PIC abilita SSO
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I202  7/24/12  11:28 am  (Tuesday)
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OrCAD DEVICE FITTER  v2.01   12/09/94  (Source file .\PLD\#0159.PLA)
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RESOLVED EXPRESSIONS (Reduction 0)
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                  70   DRQN'
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DRQN              78   KRS'
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                  80   DRQ'
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                  61   HCN'
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                  62   NMI'
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                  39   HCI'
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                  40   INT'
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                  12   SSO'
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                  13   KBR'
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                  14   OFFN'
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NMI               49   SSN'
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                  50   NMIN'
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INT               29   SSI'
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OFFN              20   SCO'
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SIGNAL ASSIGNMENT
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                                      Rows
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  2.     HWP             4        -    -    -        High
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  3.     HCN             8        -    -    -        High
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  4.     HCI            12        -    -    -        High
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  5.     SRP            16        -    -    -        High
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  7.     SSI            24        -    -    -        High
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  8.     SSO            28        -    -    -        High
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  9.     SCO            34       86    9    0        High    (Registered)
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 11.     DRQN           32       77    9    3        High    (Three-state)
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 12.     DRQ            30       68    9    2        High    (Three-state)
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 13.     NMIN           26       59    9    3        High    (Three-state)
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 14.     NMI            22       48   11    2        High    (Three-state)
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 15.     INTN           18       37   11    3        High    (Three-state)
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 16.     INT            14       28    9    2        High    (Three-state)
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 17.     OFFN           10       19    9    2        High    (Three-state)
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 18.     OFF             6       10    9    4        High    (Three-state)
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 19.     KBR             2        1    9    0        High    (Registered)
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 21.     -               -        0    1    0
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 22.     -               -       95    1    0
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                                    ---- ----
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                                      96   21  (22%)
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I200  No fatal errors found in source code (device phase).
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I201  No warnings.
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*
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QP20* QF3540* QV1024*
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L0432 11 11 11 11 11 11 11 11 11 11 11 11 11 11 10 11 11 11 *
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L0468 11 10 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
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L0504 11 11 11 11 11 10 11 11 11 11 11 11 11 11 11 11 11 11 *
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L0684 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
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L0720 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 10 *
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L0756 11 11 11 10 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
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L1008 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
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L1044 11 11 11 11 11 11 11 11 11 11 11 11 10 11 11 11 11 11 *
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L1080 11 11 11 11 11 11 11 11 11 10 11 11 11 11 11 11 11 11 *
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L1332 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
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L1368 10 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
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L1404 11 11 11 11 11 11 10 11 11 11 11 11 11 11 11 11 11 11 *
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L1440 11 11 11 11 11 11 11 10 11 11 11 11 11 11 11 11 11 11 *
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L1728 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
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L1764 11 11 11 11 11 11 11 11 11 11 10 11 11 11 11 11 11 11 *
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L1800 11 11 11 11 11 11 11 11 11 11 11 11 11 10 11 11 11 11 *
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L2124 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
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L2160 10 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
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L2196 11 11 11 11 10 11 11 11 11 11 11 11 11 11 11 11 11 11 *
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L2232 11 11 11 11 11 11 11 11 11 11 11 10 11 11 11 11 11 11 *
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L2448 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
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L2484 11 11 10 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
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L2520 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 10 11 *
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L2772 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
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L2808 10 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
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L2844 11 11 11 11 11 11 11 11 10 11 11 11 11 11 11 11 11 11 *
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L2880 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 10 11 11 *
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L3456 11 11 11 11 11 11 11 11 11 11 00 11 00 00 00 11 00 01 *
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L3492 00 11 01 01 00 11 10 01 00 10 00 00 00 10 00 00 00 10 *
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L3528 00 00 00 10 00 00 *
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C83FE*
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I202  7/24/12  11:29 am  (Tuesday)
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I203  Memory usage 6K
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I204  Elapsed time 1 second
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