WebSVN – MB01 Project – Blame – /trunk/sources/lst/F8/fdc.lst

Rev	Author	Line No.	Line
1	-	1	Tue Jul 17 11:00:16 2018 Page 1
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		8
		9	2500 A.D. 65816 Macro Assembler #26960 - Version 5.02g
		10	-----------------------------------------------------
		11
		12	Input Filename : src\F8\fdc.asm
		13	Output Filename : obj\F8\fdc.obj
		14	Listing Has Been Relocated
		15
		16
		17	2591 .LIST on
		18	2592
		19	2593 F8FFB1 .INCLUDE inc\dirp00.inc
		20	2594 ;----------------------------------------------------------
		21	2595 ; DIRP00.ASM
		22	2596 ; PROGETTO: B1601
		23	2597 ;
		24	2598 ; Variabili in Direct Page $00
		25	2599 ;----------------------------------------------------------
		26	2600
		27	2601 ; sezione COMMON -- questo permette di includere il file in piu' file
		28	2602
		29	2603 .LIST on
		30	2604
		31	2605 DIRP00: .SECTION page0, ref_only, common ;Direct-Page 00
		32	2606
		33	2607 000000 .ABSOLUTE ;; inizia sempre da $00
		34	2608 000000 .ORG 0x00
		35	2609 000000
		36	2610 000000 0000 JiffyClk .DW ; contatore 10ms 32 bit
		37	2611 000002 0000 .DW
		38	2612 000004 SysTmr .DS SYSTMRCNT ; system timer 0 (10ms)
		39	2613 000008 SysTMF .DS SYSTMRCNT ; flag timer (80 -> start)
		40	2614 00000C 00 Bnk0Flag .DB ; <7>: flag test RAM banco 0 ok
		41	2615 ; <6>: flag warm reset
		42	2616 00000D 00 RTCFlag .DB
		43	2617
		44	2618 00000E diskstat .DS 2 ; flag device on ata bus #0 & #1
		45	2619 ; <7>: device ready
		46	2620 ; <6>: compact flash device (C.F.)
		47	2621 ; <5>: device identification ok
		48	2622 ; <4>: MBR loaded
		49	2623 ; <3>: valid signature in MBR
		50	2624 ; <2>: first partition found&active
		51	2625 ; <1>:
		52	2626 ; <0>: valid partition flag
		53	2627
		54	2628 ; <7>: device ready
		55	2629 ; <6>: USB device
		56	2630 ; <5>: compact flash device (C.F.)
		57	2631 ; <4>: device identification ok
		58	2632 ; <3>: MBR loaded
		59	2633 ; <2>: first partition found&active
		60	2634 ; <1>: always 1
		61	2635 ; <0>: valid partition flag
		62	2636 000010
		63	Tue Jul 17 11:00:16 2018 Page 2
		64
		65
		66
		67
		68	2637
		69	2638 00000E atadev .EQU diskstat
		70	2639
		71	2640 000010 usbdev .DS 2 ; flag flash disk on usb bus #0
		72	2641 ; <7>: device plugged and ready
		73	2642 ; <6>: always 1
		74	2643 ; <5>: device identification ok
		75	2644 ; <4>: MBR loaded
		76	2645 ; <3>: valid signature in MBR
		77	2646 ; <2>: first partition found&active
		78	2647 ; <1>:
		79	2648 ; <0>: valid partition flag
		80	2649
		81	2650 000012 diskmax .DS 16 ; disk max. sector's
		82	2651 000012 atasec .EQU diskmax
		83	2652 00001A usbsec .EQU diskmax+8
		84	2653
		85	2654
		86	2655 000022 atambr .DS 8 ; data for first partition found in mbr
		87	2656 ; first 3 bytes for start sector of partition
		88	2657 ; last byte for partition type
		89	2658 00002A usbmbr .DS 8
		90	2659
		91	2660 000032 ataprt .DS 8 ; total sec's of first partition
		92	2661 00003A usbprt .DS 8 ; total sec's of first partition
		93	2662
		94	2663
		95	2664 000042 00 usb0ch .DB ; usb0 (ch375/ch376) flag
		96	2665 ; <7>: module on
		97	2666 ; <6>: ch376 flag
		98	2667 ; <5:0>: chip version
		99	2668
		100	2669 000043 00 usb0st .DB ; usb0 status
		101	2670 ; <7>: usb0 host mode ok
		102	2671 ; <6>: flash disk attached flag
		103	2672 ; <5>: usb device attached
		104	2673
		105	2674 000044 00 fdcdrv .DB ; phisycal drive status (drive #0)
		106	2675 ; <7>: disk format established in bit 0&1
		107	2676 ; <6>: double step seek done
		108	2677 ; <5>: trust format bit's (set after ok r/w)
		109	2678 ; <4>: write protect bit (if disk in drive)
		110	2679 ; <3>: don't care
		111	2680 ; <2>: don't care
		112	2681 ; <1>: HD disk if set else DD disk
		113	2682 ; <0>: CBM format if set else IBM format
		114	2683
		115	2684 000045 00 vdrive .DB ; virtual drive status (ram disk, drive #1)
		116	2685 ; <7>: disk format established in bit 0&1
		117	2686 ; <6>: change disk simulation (after format)
		118	2687 ; <5>: don't care
		119	2688 ; <4>: write protect bit (under sw control)
		120	2689 ; <3>: don't care
		121	2690 ; <2>: don't care
		122	2691 ; <1>: HD disk if set else DD disk
		123	2692 ; <0>: CBM format if set else IBM format
		124	2693
		125	Tue Jul 17 11:00:16 2018 Page 3
		126
		127
		128
		129
		130	2694 000046 00 fdcctl .DB ; fdc controller status
		131	2695 ; <7>: drive is attached
		132	2696 ; <6>: drive need recalibration (restore)
		133	2697 ; <5>: FDC controller ok
		134	2698 ; <4>: motor on
		135	2699 ; <3>: dma is active
		136	2700 ; <2>: dma chip ok (post routine)
		137	2701 ; <1>: clock rate (1=HD,0=DD)
		138	2702 ; <0>: disk ready
		139	2703
		140	2704 000047 00 fdctrk .DB ; fd: current seek track
		141	2705 000048 00 fdcerr .DB ; fd: last error code
		142	2706 000049 00 ataerr .DB ; ata: last error code
		143	2707 00004A 00 ataxer .DB ; ata: last extended error code
		144	2708
		145	2709 00004B 00 CtrlBrk .DB ; flag CTRL+BREAK (NMI)
		146	2710
		147	2711 00004C 0000 MemTop .DW ; top memoria RAM
		148	2712 00004E 00 .DB ; banco top mem
		149	2713
		150	2714 00004F 00 DflTxtIn .DB ; device di default text input
		151	2715 000050 00 DflTxtOut .DB ; device di default text output
		152	2716
		153	2717 000051 COPPtr LP ; long pointer for COP decoding
		154	2718 000054 00 COPIdx .DB ; COP signature/index
		155	2719
		156	2720 000055 00 BiosEnt .DB ; flag accesso a bios setup
		157	2721
		158	2722 ; variabili utilizzate da ACIA
		159	2723 000056 spwrk .DS $30
		160	2724
		161	2725 ; bios mem
		162	2726 000086 0000 nsize .DW ; dimensione blocco da allocare
		163	2727 ;bsize .DW ; dimensione vera blocco free
		164	2728 000088 0000 splitsz .DW ; dimensione blocco splittato
		165	2729 00008A 0000 bfree .DW ; puntatore blocco free
		166	2730 00008C 0000 hdrptr .DW ; puntatore header heap
		167	2731
		168	2732 00008E 0000 pbrklv .DW ; current break level of current process
		169	2733 000090 0000 pbrkmin .DW ; minimum breal level of current process
		170	2734 000092 0000 pbrkmax .DW ; maximum breal level of current process
		171	2735 000094
		172	2736 ; bios temp. work area
		173	2737 000094 bwrktmp .DS $28
		174	2738
		175	2739 0000BC 00 coptmp .DB ; temp. used while cop
		176	2740
		177	2741 0000BD 00 tstser .DB ; check ser/usb test board post
		178	2742 ; <7>: VIA2 ok
		179	2743 ; <6>: PICRAM ok
		180	2744 ; <1>: UART 16C550 ok
		181	2745 ; <0>: R65C51 ok
		182	2746
		183	2747
		184	2748 ;crc16 .DW
		185	2749
		186	2750 0000BD .RELATIVE
		187	Tue Jul 17 11:00:16 2018 Page 4
		188
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		191
		192	2751
		193	2752 .ENDS
		194	2753
		195	2754 [01] .IFDEF _ACIA_INC_
		196	2755 .INCLUDE INC\SP.INC
		197	2756 [00] .ENDIF
		198	2757
		199	2761 .LIST on
		200	2762
		201	2763 F8FFB1 .INCLUDE inc\BIOSSEG.INC
		202	2764
		203	2765 ;---------------------------------------------------------------------------
		204	2766 ; BIOS Working Segment
		205	2767 ;---------------------------------------------------------------------------
		206	2768
		207	2769 010000 BIOSSEG .EQU $010000
		208	2770 000001 BIOSWKB .EQU .SEG.TOSSEG ; BIOS working bank
		209	2771 010000 _BS .SET BIOSSEG
		210	2772 01FFFF _BE .SET BIOSSEG + $FFFF
		211	2773 ;;TO .SET TOSWKM
		212	2774
		213	2775 _BIOS: .SECTION ref_only, common, offset _BS, range _BS _BE ;BIOS working area
		214	2776 010000 _BIOS_START .DS 0
		215	2777
		216	2778 010000 _vram .DS $0800
		217	2779 010800 _vattr .DS $0800
		218	2780 011000 _vpal .DS $0400
		219	2781 011400 _ioram .DS $0400
		220	2782 011800 _ioram2 .DS $0800
		221	2783
		222	2784 012000 _xram .DS $2000
		223	2785
		224	2786 014000 _dmasave .DS $4800 ; save 36 fdc sec. ($4800)
		225	2787
		226	2788 ;_atamod0 .DS 41 ; model string device ata #0
		227	2789 ;_ataser0 .DS 21 ; serial string device ata #0
		228	2790 ;_atarev0 .DS 9 ; revision string device ata #0
		229	2791
		230	2792 ;_atamod1 .DS 41 ; model string device ata #1
		231	2793 ;_ataser1 .DS 21 ; serial string device ata #1
		232	2794 ;_atarev1 .DS 9 ; revision string device ata #1
		233	2795
		234	2796 ;_usbdsc0 .DS 32 ; identification string device usb #0
		235	2797 ;_usbdsc1 .DS 32 ; identification string device usb #1
		236	2798
		237	2799 018800 _BIOS_END .DS 0
		238	2800 008800 BIOSSIZ .EQU (_BIOS_END - _BIOS_START)
		239	2801 .ENDS
		240	2802
		241	2803 ;DMASEG .EQU $020000
		242	2804 ;DMASWKB .EQU .SEG.DMASEG ; DMA working bank
		243	2805 ;_DS .SET DMASEG
		244	2806 ;_DE .SET DMASEG + $FFFF
		245	2807
		246	2808 ;_DMAS1: .SECTION ref_only, common, offset _DS, range _DS _DE ;DMA segment
		247	2809 ;_clscache .DS $8000
		248	2810 ;.ENDS
		249	Tue Jul 17 11:00:16 2018 Page 5
		250
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		253
		254	2811
		255	2812
		256	2813 000002 BUFDSK1 .EQU $02
		257	2814 000003 BUFDSK2 .EQU $03
		258	2815
		259	2816 ; costanti di temporizzazione
		260	2817 000010 T1MS .EQU (4 * PHI2) ; costante 1ms (timer PHI2)
		261	2818 009C40 T10MS .EQU (10 * 1000 * PHI2)
		262	2819 000014 T20MS .EQU 20
		263	2820 0007D0 SNDTMO .EQU 2000 ; 2000ms (timer PB6) - timeout SendTo
		264	2821
		265	2822 0009C4 INTTMO .EQU 2500 ; 2000ms (timer PB6) - timeout INT
		266	2823 0009C4 RESTMO .EQU 2500 ; 2500ms (timer PB6) - timeout res
		267	2824
		268	2825 0003B6 MOTACL .EQU 950 ; ritardo spin-up (ms)
		269	2826 000A28 MOTDCL .EQU 2600 ; ritardo spin-down (ms)
		270	2827
		271	2828 ; GAP 3 read/write
		272	2829 00001B RWGPL3DD .EQU $1B ; GPL3 -> D.D. standard
		273	2830 000010 RWGPL3DDA .EQU $10 ; GPL3 -> D.D. 10 tracce
		274	2831 000036 RWGPL3HD .EQU $36 ; GPL3 -> H.D.
		275	2832 000014 RWGPL3HDA .EQU $14 ; GPL3 -> D.D. 10 tracce
		276	2833
		277	2834 ; GAP 3 format
		278	2835 000054 FMGPL3DD .EQU $54 ; GPL3 -> D.D. standard
		279	2836 000024 FMGPL3DDA .EQU $24 ; GPL3 -> D.D. 10 tracce
		280	2837 00006C FMGPL3HD .EQU $6C ; GPL3 -> H.D.
		281	2838 000032 FMGPL3HDA .EQU $32 ; GPL3 -> H.D.
		282	2839
		283	2840 ; comandi per UM8388
		284	2841 000003 CMDSPECIFY .EQU $03
		285	2842 000004 CMDSENSEST .EQU $04
		286	2843 000007 CMDRECAL .EQU $07
		287	2844 000008 CMDSENSEINT .EQU $08
		288	2845 00000F CMDSEEK .EQU $0F
		289	2846 000045 CMDWRITE .EQU $45
		290	2847 00004A CMDREADID .EQU $4A
		291	2848 00004D CMDFMT .EQU $4D
		292	2849 000066 CMDREAD .EQU $66
		293	2850
		294	2851 0000DF UM_SRTHUT .EQU $DF ; SRT = 3ms, HUT = 240ms
		295	2852 ;UM_SRTHUT .EQU $0F ; SRT = 3ms, HUT = 240ms
		296	2853
		297	2854 000002 UM_HLTND .EQU $02 ; HLT = 2ms, ND = 0 (DMA MODE)
		298	2855 ;UM_HLTND .EQU $FE ; HLT = 2ms, ND = 0 (DMA MODE)
		299	2856
		300	2857 ; costanti per modo DMA (no autoinc, address inc, single mode)
		301	2858 000042 VERFTRASF .EQU $42 ; verfy transfer: read FDC, dummy MEM
		302	2859 000046 WRITETRASF .EQU $46 ; write transfer: read FDC, write MEM
		303	2860 00004A READTRASF .EQU $4A ; read transfer: read MEM, write FDC
		304	2861
		305	2862 000005 maxret .EQU 5 ; retries #
		306	2863
		307	2864 ; page 0 local var's (declared in bios temp. work area)
		308	2865 _P0BTMP: .SECTION page0, ref_only, offset bwrktmp ; DP Tmp. BIOS
		309	2866
		310	2867 000094 FDCTMP_START .EQU $
		311	Tue Jul 17 11:00:16 2018 Page 6
		312
		313
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		315
		316	2868
		317	2869 000094 0000 ncnt .DW ; number of bytes for dma
		318	2870 000096 0000 ntrsf .DW ; number of trasferred bytes
		319	2871 000098 0000 ptmp .DW ; temp. pointer used by format
		320	2872 00009A 0000 bufstart .DW ; used by ram disk
		321	2873 00009C 0000 bufend .DW ; used by ram disk
		322	2874 00009E bufp LP ; buffer pointer
		323	2875 0000A1 verfp LP ; verify buffer pointer
		324	2876
		325	2877 000098 xmstart .EQU ptmp ; ram disk start address
		326	2878 00009C dmabuf .EQU bufend ; dma buffer # & needs dma buffers #
		327	2879 00009D bufcnt .EQU bufend+1
		328	2880 00009A drvhead .EQU bufstart
		329	2881 00009B dtlstp .EQU bufstart+1
		330	2882 0000A1 lpfn .EQU verfp ; callback function pointer
		331	2883
		332	2884 0000A4 fdcres .DS 7 ; store phase reult bytes
		333	2885 0000AB 00 drive .DB ; current drive #
		334	2886 0000AC 00 track .DB ; current track
		335	2887 0000AD 00 head .DB ; current side
		336	2888 0000AE 00 sector .DB ; start sector
		337	2889 0000AF 00 sectnum .DB ; sector's number/track
		338	2890 0000B0 00 maxsect .DB ; max. number of sects/track + 1
		339	2891 0000B1 00 eot .DB ; end of track
		340	2892 0000B2 00 gap3 .DB ; gap 3 length
		341	2893 0000B3 00 dmast .DB ; save dma status reg.
		342	2894 0000B4 00 fdop .DB ; fdc function index
		343	2895 0000B5 00 vdop .DB ; ram disk operation
		344	2896 0000B6 00 opfg .DB ; flag param's
		345	2897
		346	2898 0000B6 fmtfg .EQU opfg
		347	2899 0000B2 buftst .EQU gap3 ; used by ram disk
		348	2900
		349	2901 0000B7 00 dskfmt .DB ; disk format
		350	2902 0000B8 00 fmtfill .DB ; fill byte while format
		351	2903 0000B9 00 tmpa .DB
		352	2904 0000BA 00 tmpx .DB
		353	2905 0000BB 00 retries .DB ; retries #
		354	2906
		355	2907 0000BB xmbank .EQU retries ; bank that hold ram disk
		356	2908 0000B9 mcand1 .EQU tmpa ; used by ram disk
		357	2909 0000BA mcand2 .EQU tmpx
		358	2910
		359	2911 000028 FDCTMP_SIZ .EQU ($-FDCTMP_START)
		360	2912
		361	2913 .ENDS
		362	2914
		363	2915 .CODEF8
		364	2916 .GLOBAL fdinit, vdinit
		365	2917 ;.EXTERN LF8Tst, getctime
		366	2918 F8921B
		367	2919 .LONGA off
		368	2920 .LONGI off
		369	2921 F8921B
		370	2922 F8921B .DS 37
		371	2923
		372	2924 ;---------------------------------------------------------------------------
		373	Tue Jul 17 11:00:16 2018 Page 7
		374
		375
		376
		377
		378	2925 ; System interface
		379	2926 ;---------------------------------------------------------------------------
		380	2927
		381	2928 ;---------------------------------------------------------------------------
		382	2929 ; sys_fdrw - read/write/verify sectors in floppy disk
		383	2930 ;
		384	2931 ; prototype: sys_fdrw(bDrive, bTrak, bHead, bSect, bNum, bBuf, bFlag)
		385	2932 ;
		386	2933 ; Params (7 bytes):
		387	2934 ; bDrive = drive number (0..1)
		388	2935 ; bTrak = track number ($00..$4F)
		389	2936 ; bHead = head number ($00..$01)
		390	2937 ; bSect = sector number ($01...)
		391	2938 ; bNum = number of sectors to be read/write ($01...)
		392	2939 ; bBuf = buffer number ($00..$FF)
		393	2940 ; bFlag = flag
		394	2941 ; <7>: verify data after writing
		395	2942 ; <0>: CBM format (otherwise DOS format)
		396	2943 ;
		397	2944 ; Out:
		398	2945 ; CF = 0 if operation completed successfully
		399	2946 ; C = number of bytes effectively transferred
		400	2947 ; X = disk format ($00, $01, $02, $03)
		401	2948 ; Y = unchanged
		402	2949 ; CF = 1 if error
		403	2950 ; C = number of bytes effectively transferred
		404	2951 ; X = disk format ($00, $01, $02, $03, $FF)
		405	2952 ; Y = error code
		406	2953 ; Status register always preserved except carry
		407	2954
		408	2955 ; params offset
		409	2956 000013 bFlag .SET STKPRMS
		410	2957 000014 bBuf .SET STKPRMS + 1
		411	2958 000015 bNum .SET STKPRMS + 2
		412	2959 000016 bSect .SET STKPRMS + 3
		413	2960 000017 bHead .SET STKPRMS + 4
		414	2961 000018 bTrak .SET STKPRMS + 5
		415	2962 000019 bDrive .SET STKPRMS + 6
		416	2963
		417	2964 F89240 sys_fdrw:
		418	2965 .GLOBAL sys_fdrw
		419	2966
		420	2967 F89240 ACC16 ; retrieve function number
		421	2968 F89240 C2 20 rep #PMFLAG
		422	2969 .LONGA on
		423	2970 .MNLIST
		424	2971 F89242 A3 10 lda STKPCL,s ; pointer to byte after signature
		425	2972 F89244 85 51 sta COPPtr
		426	2973 F89246 1A inc a ; update return address
		427	2974 F89247 83 10 sta STKPCL,s
		428	2975 F89249 64 96 stz ntrsf ; clear bytes transferred
		429	2976 F8924B ACC08 ; A,M -> 8 bit
		430	2977 F8924B E2 20 sep #PMFLAG
		431	2978 .LONGA off
		432	2979 .MNLIST
		433	2980 F8924D 64 48 stz fdcerr
		434	2981 F8924F 64 B3 stz dmast
		435	Tue Jul 17 11:00:16 2018 Page 8
		436
		437
		438
		439
		440	2982 F89251 A9 FF lda #$FF ; invalid format
		441	2983 F89253 85 B7 sta dskfmt
		442	2984 F89255 A3 12 lda STKPBR,s ; bank where was executed cop instruction
		443	2985 F89257 85 53 sta COPPtr+2
		444	2986 F89259 A7 51 lda [COPPtr] ; byte after signature
		445	2987 F8925B C9 03 cmp #$03 ; right value: 0,1,2
		446	2988 F8925D B0 50 bcs ?12 ; error
		447	2989 F8925F 85 B4 sta fdop
		448	2990 F89261 A3 19 lda bDrive,s ; drive number
		449	2991 F89263 AA tax
		450	2992 F89264 E0 02 cpx #FDMAXDRIVE
		451	2993 F89266 B0 4B bcs ?14 ; error
		452	2994 F89268 85 AB sta drive
		453	2995 F8926A A3 18 lda bTrak,s ; track number
		454	2996 F8926C C9 50 cmp #$50 ; max track number $4F
		455	2997 F8926E B0 47 bcs ?16 ; error
		456	2998 F89270 85 AC sta track
		457	2999 F89272 A3 17 lda bHead,s ; head number
		458	3000 F89274 C9 02 cmp #$02
		459	3001 F89276 B0 3F bcs ?16
		460	3002 F89278 85 AD sta head
		461	3003 F8927A 38 sec
		462	3004 F8927B A3 16 lda bSect,s ; starting sector
		463	3005 F8927D F0 38 beq ?16
		464	3006 F8927F 85 AE sta sector
		465	3007 F89281 A3 15 lda bNum,s ; number of sector
		466	3008 F89283 F0 32 beq ?16
		467	3009 F89285 85 AF sta sectnum
		468	3010 F89287 A3 14 lda bBuf,s ; buffer number
		469	3011 F89289 85 9C sta dmabuf
		470	3012 F8928B A3 13 lda bFlag,s ; flag
		471	3013 F8928D 29 81 and #$81 ; mask bit 7 and bit 0
		472	3014 F8928F 85 B6 sta opfg
		473	3015 F89291 8A txa ; phisycal drive?
		474	3016 F89292 F0 11 beq ?08 ; yes
		475	3017 F89294 A5 45 lda vdrive ; ram disk formatted?
		476	3018 F89296 10 13 bpl ?10 ; no
		477	3019 F89298 29 03 and #$03
		478	3020 F8929A C9 03 cmp #$03 ; format $03?
		479	3021 F8929C F0 0D beq ?10 ; yes, invalid format
		480	3022 F8929E 85 B7 sta dskfmt ; current ram disk format
		481	3023 F892A0 20 99 9E jsr vdrw ; ram disk operation
		482	3024 F892A3 80 1C bra ?24
		483	3025 F892A5 24 46 ?08: bit fdcctl ; drive attached?
		484	3026 F892A7 30 15 bmi ?22 ; yes
		485	3027 F892A9 80 08 bra ?14
		486	3028 F892AB A9 0D ?10: lda #FDC_BADFMT
		487	3029 F892AD 80 0A bra ?20
		488	3030 F892AF A9 15 ?12: lda #FDC_BADOP
		489	3031 F892B1 80 06 bra ?20
		490	3032 F892B3 A9 0E ?14: lda #FDC_NODRIVE ; invalid drive
		491	3033 F892B5 80 02 bra ?20
		492	3034 F892B7 A9 14 ?16: lda #FDC_PARAMS
		493	3035 F892B9 85 48 ?20: sta fdcerr
		494	3036 F892BB 38 sec
		495	3037 F892BC 80 03 bra ?24
		496	3038 F892BE 20 E1 94 ?22: jsr fdrw ; fd operation
		497	Tue Jul 17 11:00:16 2018 Page 9
		498
		499
		500
		501
		502	3039 F892C1 ?24: ACC16 ; report out data
		503	3040 F892C1 C2 20 rep #PMFLAG
		504	3041 .LONGA on
		505	3042 .MNLIST
		506	3043 F892C3 A5 96 lda ntrsf
		507	3044 F892C5 83 0D sta STKCR,s
		508	3045 F892C7 ACC08
		509	3046 F892C7 E2 20 sep #PMFLAG
		510	3047 .LONGA off
		511	3048 .MNLIST
		512	3049 F892C9 A5 B7 lda dskfmt
		513	3050 F892CB 83 0B sta STKXR,s
		514	3051 F892CD A9 00 lda #0
		515	3052 F892CF 83 0C sta STKXR+1,s
		516	3053 F892D1 A5 48 lda fdcerr ; error code if CF=1
		517	3054 F892D3 6B rtl
		518	3055 F892D4
		519	3056 ;---------------------------------------------------------------------------
		520	3057 ; sys_fdtrack - read/write/verify whole track (both side) on floppy disk
		521	3058 ;
		522	3059 ; prototype: sys_fdtrack(bDrive, bTrak, bBuf, bFlag)
		523	3060 ;
		524	3061 ; Params (4 bytes):
		525	3062 ; bDrive = drive number
		526	3063 ; bTrak = track number ($00..$4F)
		527	3064 ; bBuf = buffer number ($00..$FF)
		528	3065 ; bFlag = flag
		529	3066 ; <7>: verify data after writing
		530	3067 ; <0>: CBM format (otherwise DOS format)
		531	3068 ;
		532	3069 ; Out:
		533	3070 ; CF = 0 if operation completed successfully
		534	3071 ; C = number of bytes effectively transferred
		535	3072 ; X = disk format ($00, $01, $02, $03)
		536	3073 ; Y = unchanged
		537	3074 ; CF = 1 if error
		538	3075 ; C = number of bytes effectively transferred
		539	3076 ; X = disk format ($00, $01, $02, $03, $FF)
		540	3077 ; Y = error code
		541	3078 ; Status register always preserved except carry
		542	3079
		543	3080 ; params offset
		544	3081 000013 bFlag .SET STKPRMS
		545	3082 000014 bBuf .SET STKPRMS + 1
		546	3083 000015 bTrak .SET STKPRMS + 2
		547	3084 000016 bDrive .SET STKPRMS + 3
		548	3085
		549	3086 F892D4 sys_fdtrack:
		550	3087 .GLOBAL sys_fdtrack
		551	3088
		552	3089 F892D4 ACC16 ; retrieve function number
		553	3090 F892D4 C2 20 rep #PMFLAG
		554	3091 .LONGA on
		555	3092 .MNLIST
		556	3093 F892D6 A3 10 lda STKPCL,s ; pointer to byte after signature
		557	3094 F892D8 85 51 sta COPPtr
		558	3095 F892DA 1A inc a ; update return address
		559	Tue Jul 17 11:00:16 2018 Page 10
		560
		561
		562
		563
		564	3096 F892DB 83 10 sta STKPCL,s
		565	3097 F892DD 64 96 stz ntrsf ; clear bytes transferred
		566	3098 F892DF ACC08 ; A,M -> 8 bit
		567	3099 F892DF E2 20 sep #PMFLAG
		568	3100 .LONGA off
		569	3101 .MNLIST
		570	3102 F892E1 64 48 stz fdcerr
		571	3103 F892E3 64 B3 stz dmast
		572	3104 F892E5 A9 FF lda #$FF
		573	3105 F892E7 85 B7 sta dskfmt
		574	3106 F892E9 A3 12 lda STKPBR,s ; bank where was executed cop instruction
		575	3107 F892EB 85 53 sta COPPtr+2
		576	3108 F892ED A7 51 lda [COPPtr] ; byte after signature
		577	3109 F892EF C9 03 cmp #$03 ; right value: 0,1,2
		578	3110 F892F1 B0 43 bcs ?12 ; error
		579	3111 F892F3 85 B4 sta fdop
		580	3112 F892F5 A3 16 lda bDrive,s ; drive number
		581	3113 F892F7 AA tax
		582	3114 F892F8 E0 02 cpx #FDMAXDRIVE
		583	3115 F892FA B0 3E bcs ?14 ; error
		584	3116 F892FC 85 AB sta drive
		585	3117 F892FE A3 15 lda bTrak,s ; track number
		586	3118 F89300 C9 50 cmp #$50 ; max track number $4F
		587	3119 F89302 B0 3A bcs ?16 ; error
		588	3120 F89304 85 AC sta track
		589	3121 F89306 64 AD stz head
		590	3122 F89308 A9 01 lda #1
		591	3123 F8930A 85 AE sta sector
		592	3124 F8930C A3 14 lda bBuf,s ; buffer number
		593	3125 F8930E 85 9C sta dmabuf
		594	3126 F89310 A3 13 lda bFlag,s ; flag
		595	3127 F89312 29 81 and #$81 ; mask bit 7 and bit 0
		596	3128 F89314 09 40 ora #$40 ; flag MT
		597	3129 F89316 85 B6 sta opfg
		598	3130 F89318 8A txa ; phisycal drive?
		599	3131 F89319 F0 11 beq ?08 ; yes
		600	3132 F8931B A5 45 lda vdrive ; ram disk formatted?
		601	3133 F8931D 10 13 bpl ?10 ; no
		602	3134 F8931F 29 03 and #$03
		603	3135 F89321 C9 03 cmp #$03 ; format $03?
		604	3136 F89323 F0 0D beq ?10 ; yes, invalid format
		605	3137 F89325 85 B7 sta dskfmt ; current ram disk format
		606	3138 F89327 20 99 9E jsr vdrw ; ram disk operation
		607	3139 F8932A 80 1C bra ?24
		608	3140 F8932C 24 46 ?08: bit fdcctl ; drive attached?
		609	3141 F8932E 30 15 bmi ?22 ; yes
		610	3142 F89330 80 08 bra ?14
		611	3143 F89332 A9 0D ?10: lda #FDC_BADFMT
		612	3144 F89334 80 0A bra ?20
		613	3145 F89336 A9 15 ?12: lda #FDC_BADOP
		614	3146 F89338 80 06 bra ?20
		615	3147 F8933A A9 0E ?14: lda #FDC_NODRIVE
		616	3148 F8933C 80 02 bra ?20
		617	3149 F8933E A9 14 ?16: lda #FDC_PARAMS
		618	3150 F89340 85 48 ?20: sta fdcerr
		619	3151 F89342 38 sec
		620	3152 F89343 80 03 bra ?24
		621	Tue Jul 17 11:00:16 2018 Page 11
		622
		623
		624
		625
		626	3153 F89345 20 E1 94 ?22: jsr fdrw ; fd drive operation
		627	3154 F89348 ?24: ACC16 ; report out data
		628	3155 F89348 C2 20 rep #PMFLAG
		629	3156 .LONGA on
		630	3157 .MNLIST
		631	3158 F8934A A5 96 lda ntrsf
		632	3159 F8934C 83 0D sta STKCR,s
		633	3160 F8934E ACC08
		634	3161 F8934E E2 20 sep #PMFLAG
		635	3162 .LONGA off
		636	3163 .MNLIST
		637	3164 F89350 A5 B7 lda dskfmt
		638	3165 F89352 83 0B sta STKXR,s
		639	3166 F89354 A9 00 lda #0
		640	3167 F89356 83 0C sta STKXR+1,s
		641	3168 F89358 A5 48 lda fdcerr ; error code if CF=1
		642	3169 F8935A 6B rtl
		643	3170
		644	3171 ;---------------------------------------------------------------------------
		645	3172 ; sys_fdfmt - low level format whole floppy disk
		646	3173 ;
		647	3174 ; prototype: sys_fdfmt(bDrive, bFlag, bFill, lpCall)
		648	3175 ;
		649	3176 ; Params (6 bytes):
		650	3177 ; bDrive = drive number
		651	3178 ; bFlag = format flag
		652	3179 ; <7>: valid callback function in lpCall
		653	3180 ; <6>: verify track after format one
		654	3181 ; <1>: select H.D. format (otherwise D.D. format)
		655	3182 ; <0>: select CBM format (otherwise standard DOS format)
		656	3183 ; bFill = fill byte for all sectors
		657	3184 ; lpCall = long pointer to callback user function while formatting
		658	3185 ;
		659	3186 ; Out:
		660	3187 ; CF = 0 if operation completed successfully
		661	3188 ; A,X,Y preserved
		662	3189 ; CF = 1 if error
		663	3190 ; A, X preserved
		664	3191 ; Y = error code
		665	3192 ; Status register always preserved except carry
		666	3193
		667	3194 ; params offset
		668	3195 000013 lpCall .SET STKPRMS
		669	3196 000016 bFill .SET STKPRMS + 3
		670	3197 000017 bFlag .SET STKPRMS + 4
		671	3198 000018 bDrive .SET STKPRMS + 5
		672	3199
		673	3200 F8935B sys_fdfmt:
		674	3201 .GLOBAL sys_fdfmt
		675	3202
		676	3203 F8935B A3 18 lda bDrive,s ; recover params from stack
		677	3204 F8935D 85 AB sta drive ; drive number
		678	3205 F8935F A8 tay
		679	3206 F89360 A3 17 lda bFlag,s
		680	3207 F89362 85 B6 sta fmtfg ; format flag
		681	3208 F89364 AA tax
		682	3209 F89365 29 03 and #00000011B
		683	Tue Jul 17 11:00:16 2018 Page 12
		684
		685
		686
		687
		688	3210 F89367 85 B7 sta dskfmt ; required format
		689	3211 F89369 C9 03 cmp #00000011B ; format 3 is invalid
		690	3212 F8936B D0 05 bne ?01
		691	3213 F8936D A9 0D lda #FDC_BADFMT
		692	3214 F8936F 38 sec
		693	3215 F89370 80 45 bra ?05 ; error
		694	3216 F89372 A3 16 ?01: lda bFill,s
		695	3217 F89374 85 B8 sta fmtfill ; fill byte
		696	3218 F89376 8A txa
		697	3219 F89377 10 14 bpl ?04 ; no callback
		698	3220 F89379 A3 15 lda lpCall+2,s ; bank that hold callback function
		699	3221 F8937B 85 A3 sta lpfn+2
		700	3222 F8937D D0 06 bne ?02 ; callback function cannot stay in bank $00
		701	3223 F8937F A9 80 lda #$80 ; invalid callback
		702	3224 F89381 14 B6 trb fmtfg ; no callback
		703	3225 F89383 80 08 bra ?04
		704	3226 F89385 ?02: CPU16
		705	3227 F89385 C2 30 rep #(PMFLAG.OR.PXFLAG)
		706	3228 .LONGA on
		707	3229 .LONGI on
		708	3230 .MNLIST
		709	3231 F89387 A3 13 lda lpCall,s ; address of callback function
		710	3232 F89389 85 A1 sta lpfn
		711	3233 F8938B CPU08
		712	3234 F8938B E2 30 sep #(PMFLAG.OR.PXFLAG)
		713	3235 .LONGA off
		714	3236 .LONGI off
		715	3237 .MNLIST
		716	3238 F8938D A9 00 ?04: lda #0
		717	3239 F8938F AA tax
		718	3240 F89390 85 48 sta fdcerr ; clear error
		719	3241 F89392 85 AC sta track
		720	3242 F89394 85 AD sta head
		721	3243 F89396 85 9E sta bufp ; set dma buffer at $030000
		722	3244 F89398 85 9F sta bufp+1
		723	3245 F8939A 1A inc a
		724	3246 F8939B 85 AE sta sector ; sector = 1
		725	3247 F8939D 1A inc a
		726	3248 F8939E 1A inc a
		727	3249 F8939F 85 A0 sta bufp+2
		728	3250 F893A1 CA dex
		729	3251 F893A2 86 9B stx dtlstp ; DTL/STP = $FF
		730	3252 F893A4 A6 B7 ldx dskfmt
		731	3253 F893A6 BF A1 A0 F8 lda >MAXSECT,x
		732	3254 F893AA 85 B0 sta maxsect ; max. numbers of sectors/track + 1
		733	3255 F893AC 3A dec a
		734	3256 F893AD 85 AF sta sectnum ; sectors/track
		735	3257 F893AF 85 B1 sta eot ; end of track
		736	3258 F893B1 C0 02 cpy #FDMAXDRIVE
		737	3259 F893B3 90 05 bcc ?06
		738	3260 F893B5 A9 0E lda #FDC_NODRIVE
		739	3261 F893B7 85 48 ?05: sta fdcerr
		740	3262 F893B9 6B rtl
		741	3263 F893BA BB ?06: tyx ; phisycal drive?
		742	3264 F893BB F0 05 beq ?08 ; yes
		743	3265 F893BD 20 F1 9D jsr vdfmt ; ram disk formattation
		744	3266 F893C0 80 03 bra ?10
		745	Tue Jul 17 11:00:16 2018 Page 13
		746
		747
		748
		749
		750	3267 F893C2 20 7E 95 ?08: jsr fdfmt ; format floppy disk
		751	3268 F893C5 A5 48 ?10: lda fdcerr ; report error if one
		752	3269 F893C7 6B rtl
		753	3270
		754	3271 ;---------------------------------------------------------------------------
		755	3272 ; sys_fdverf - verify integrity of low level format of whole floppy disk
		756	3273 ;
		757	3274 ; prototype: sys_fdverf(bDrive, lpCall)
		758	3275 ;
		759	3276 ; Params (4 bytes):
		760	3277 ; bDrive = drive number
		761	3278 ; lpCall = long pointer to callback user function while verify
		762	3279 ; if lpCall = null the callback function is not called
		763	3280 ; callback function ignored for ram disk
		764	3281 ;
		765	3282 ; Out:
		766	3283 ; CF = 0 if operation completed successfully
		767	3284 ; A,X preserved
		768	3285 ; Y = disk format
		769	3286 ; CF = 1 if error
		770	3287 ; A, X preserved
		771	3288 ; Y = error code
		772	3289 ; Status register always preserved except carry
		773	3290
		774	3291 ; params offset
		775	3292 000013 lpCall .SET STKPRMS
		776	3293 000016 bDrive .SET STKPRMS + 3
		777	3294
		778	3295 F893C8 sys_fdverf:
		779	3296 .GLOBAL sys_fdverf
		780	3297
		781	3298 F893C8 64 B6 stz fmtfg ; no callback
		782	3299 F893CA 64 48 stz fdcerr
		783	3300 F893CC A3 16 lda bDrive,s ; recover params from stack
		784	3301 F893CE 85 AB sta drive ; drive number
		785	3302 F893D0 A8 tay
		786	3303 F893D1 A3 15 lda lpCall+2,s ; bank that hold callback function
		787	3304 F893D3 85 A3 sta lpfn+2
		788	3305 F893D5 F0 0C beq ?02 ; callback function cannot stay in bank $00
		789	3306 F893D7 CPU16
		790	3307 F893D7 C2 30 rep #(PMFLAG.OR.PXFLAG)
		791	3308 .LONGA on
		792	3309 .LONGI on
		793	3310 .MNLIST
		794	3311 F893D9 A3 13 lda lpCall,s ; address of callback function
		795	3312 F893DB 85 A1 sta lpfn
		796	3313 F893DD CPU08
		797	3314 F893DD E2 30 sep #(PMFLAG.OR.PXFLAG)
		798	3315 .LONGA off
		799	3316 .LONGI off
		800	3317 .MNLIST
		801	3318 F893DF A9 80 lda #$80 ; call callback function
		802	3319 F893E1 04 B6 tsb fmtfg
		803	3320 F893E3 C0 02 ?02: cpy #FDMAXDRIVE
		804	3321 F893E5 90 05 bcc ?06
		805	3322 F893E7 A9 0E lda #FDC_NODRIVE ; error
		806	3323 F893E9 85 48 ?04: sta fdcerr
		807	Tue Jul 17 11:00:16 2018 Page 14
		808
		809
		810
		811
		812	3324 F893EB 6B rtl
		813	3325 F893EC BB ?06: tyx ; phisycal drive?
		814	3326 F893ED F0 0E beq ?10 ; yes
		815	3327 F893EF A5 45 lda vdrive ; ram disk formatted?
		816	3328 F893F1 30 05 bmi ?08 ; yes
		817	3329 F893F3 A9 0D lda #FDC_BADFMT
		818	3330 F893F5 38 sec
		819	3331 F893F6 80 F1 bra ?04
		820	3332 F893F8 29 0B ?08: and #00000011
		821	3333 F893FA 18 clc
		822	3334 F893FB 80 07 bra ?12
		823	3335 F893FD 20 67 96 ?10: jsr fdverf ; verify floppy disk format
		824	3336 F89400 B0 08 bcs ?14
		825	3337 F89402 A5 B7 lda dskfmt ; get format
		826	3338 F89404 83 09 ?12: sta STKYR,s
		827	3339 F89406 A9 00 lda #0
		828	3340 F89408 83 0A sta STKYR+1,s
		829	3341 F8940A A5 48 ?14: lda fdcerr ; report error if one
		830	3342 F8940C 6B rtl
		831	3343
		832	3344 ;---------------------------------------------------------------------------
		833	3345 ; sys_fdctl - control function
		834	3346 ;
		835	3347 ; prototype: sys_fdctl(X=drive number if required)
		836	3348 ;
		837	3349 ; Functions:
		838	3350 ; $00: reset FDC controller
		839	3351 ; input reg.: none
		840	3352 ; output reg.: unchanged
		841	3353 ; $01: POST routine (init FDC controller)
		842	3354 ; input reg.: none
		843	3355 ; output reg.: unchanged
		844	3356 ; $02: get drive status
		845	3357 ; input reg.: X = drive number
		846	3358 ; output reg.: Y = drive status (ST3), A,X unchanged
		847	3359 ; output reg.: A,X,Y unchanged
		848	3360 ; $03: check if disk inserted into drive
		849	3361 ; input reg.: X = drive number
		850	3362 ; output reg.: unchanged
		851	3363 ; $04: get format diskette if inserted into drive
		852	3364 ; input reg.: X = drive number
		853	3365 ; output reg.: Y = diskette format, A,X unchanged
		854	3366 ; $05: set write protect bit on ram disk (no effect for phis. drive)
		855	3367 ; input reg.: X = drive number
		856	3368 ; output reg.: unchanged
		857	3369 ; $06: reset write protect bit on ram disk (no effect for phis. drive)
		858	3370 ; input reg.: X = drive number
		859	3371 ; output reg.: unchanged
		860	3372 ; Out:
		861	3373 ; CF = 0 if operation completed successfully
		862	3374 ; CF = 1 if error
		863	3375 ; A, X preserved
		864	3376 ; Y = error code
		865	3377 ; Status register always preserved except carry
		866	3378 F8940D sys_fdctl:
		867	3379 .GLOBAL sys_fdctl
		868	3380
		869	Tue Jul 17 11:00:16 2018 Page 15
		870
		871
		872
		873
		874	3381 F8940D ACC16 ; retrieve function number
		875	3382 F8940D C2 20 rep #PMFLAG
		876	3383 .LONGA on
		877	3384 .MNLIST
		878	3385 F8940F A3 10 lda STKPCL,s ; pointer to byte after signature
		879	3386 F89411 85 51 sta COPPtr
		880	3387 F89413 1A inc a ; update return address
		881	3388 F89414 83 10 sta STKPCL,s
		882	3389 F89416 ACC08 ; A,M -> 8 bit
		883	3390 F89416 E2 20 sep #PMFLAG
		884	3391 .LONGA off
		885	3392 .MNLIST
		886	3393 F89418 A3 12 lda STKPBR,s ; bank where was executed cop instruction
		887	3394 F8941A 85 53 sta COPPtr+2
		888	3395 F8941C A3 0B lda STKXR,s
		889	3396 F8941E 85 AB sta drive ; get drive # (X reg.)
		890	3397 F89420 A7 51 lda [COPPtr] ; byte after signature
		891	3398 F89422 C9 07 cmp #MXCTLFN
		892	3399 F89424 90 05 bcc ?04
		893	3400 F89426 A9 15 lda #FDC_BADOP
		894	3401 F89428 85 48 sta fdcerr
		895	3402 F8942A 60 rts
		896	3403 F8942B 64 48 ?04: stz fdcerr
		897	3404 F8942D 0A asl a
		898	3405 F8942E AA tax ; function index
		899	3406 F8942F FC 93 A0 jsr (CTLFN,x)
		900	3407 F89432 A5 48 lda fdcerr ; return error code if any
		901	3408 F89434 6B rtl
		902	3409
		903	3410 ; ctl function 0: reset controller
		904	3411 F89435 ctl_fn0:
		905	3412 F89435 20 3A 9B jsr fdcrst
		906	3413 F89438 85 48 sta fdcerr
		907	3414 F8943A 60 rts
		908	3415
		909	3416 ; ctl function 1: POST routine (init)
		910	3417 F8943B ctl_fn1:
		911	3418 F8943B 4C B6 9F jmp fdinit
		912	3419
		913	3420 ; ctl function 2: get drive status
		914	3421 F8943E ctl_fn2:
		915	3422 F8943E 20 C9 94 jsr ctl_tst ; check drive #
		916	3423 F89441 AA tax ; phisycal drive?
		917	3424 F89442 F0 10 beq ?10 ; yes
		918	3425 F89444 A5 45 lda vdrive ; bit 4: wp on bit
		919	3426 F89446 0A asl a
		920	3427 F89447 0A asl a ; shift to bit 6
		921	3428 F89448 29 40 and #01000000B
		922	3429 F8944A 09 20 ora #00100000B ; ready bit
		923	3430 F8944C 18 clc
		924	3431 F8944D 83 0B ?05: sta STKYR+2,s ; report status
		925	3432 F8944F A9 00 lda #0
		926	3433 F89451 83 0C sta STKYR+3,s
		927	3434 F89453 60 rts
		928	3435 F89454 20 D6 94 ?10: jsr ctl_dr ; check drive attached
		929	3436 F89457 20 2E 99 jsr drvst
		930	3437 F8945A 90 F1 bcc ?05
		931	Tue Jul 17 11:00:16 2018 Page 16
		932
		933
		934
		935
		936	3438 F8945C 60 rts
		937	3439 F8945D
		938	3440 ; ctl function 3: check disk ready
		939	3441 F8945D ctl_fn3:
		940	3442 F8945D 20 C9 94 jsr ctl_tst ; check drive #
		941	3443 F89460 AA tax ; phisycal drive?
		942	3444 F89461 F0 0F beq ?10 ; yes
		943	3445 F89463 24 45 bit vdrive ; test bit 6: change disk bit
		944	3446 F89465 18 clc
		945	3447 F89466 50 09 bvc ?05 ; disk not changed
		946	3448 F89468 A9 40 lda #$40
		947	3449 F8946A 14 45 trb vdrive ; reset change disk bit
		948	3450 F8946C A9 11 lda #FDC_CHANGE
		949	3451 F8946E 85 48 sta fdcerr
		950	3452 F89470 38 sec
		951	3453 F89471 60 ?05: rts
		952	3454 F89472 20 D6 94 ?10: jsr ctl_dr ; check drive attached
		953	3455 F89475 20 D7 98 jsr chkdsk ; change disk line test
		954	3456 F89478 4C 77 95 jmp stop
		955	3457
		956	3458 ; ctl function 4: get disk format
		957	3459 F8947B ctl_fn4:
		958	3460 F8947B 20 C9 94 jsr ctl_tst ; check drive #
		959	3461 F8947E AA tax ; phisycal drive?
		960	3462 F8947F F0 14 beq ?10 ; yes
		961	3463 F89481 A5 45 lda vdrive ; test bit 7: ram disk formatted?
		962	3464 F89483 30 06 bmi ?02 ; yes
		963	3465 F89485 A9 0D lda #FDC_BADFMT
		964	3466 F89487 85 48 sta fdcerr
		965	3467 F89489 38 sec
		966	3468 F8948A 60 rts
		967	3469 F8948B 29 03 ?02: and #00000011B ; report current format
		968	3470 F8948D 83 0B sta STKYR+2,s
		969	3471 F8948F A9 00 lda #0
		970	3472 F89491 83 0C sta STKYR+3,s
		971	3473 F89493 18 clc
		972	3474 F89494 60 rts
		973	3475 F89495 64 44 ?10: stz fdcdrv ; get disk format - invalidate current format
		974	3476 F89497 20 3F 98 jsr chkfmt ; try to check format
		975	3477 F8949A B0 12 bcs ?20 ; error
		976	3478 F8949C A5 44 lda fdcdrv ; update format
		977	3479 F8949E 29 7C and #01111100B
		978	3480 F894A0 05 B7 ora dskfmt
		979	3481 F894A2 09 80 ora #$80 ; recognized format
		980	3482 F894A4 85 44 sta fdcdrv
		981	3483 F894A6 A5 B7 lda dskfmt ; report format in Y reg.
		982	3484 F894A8 83 0B sta STKYR+2,s
		983	3485 F894AA A9 00 lda #0
		984	3486 F894AC 83 0C sta STKYR+3,s
		985	3487 F894AE 4C 77 95 ?20: jmp stop
		986	3488
		987	3489 ; ctl function 5: set write protect bit on ram disk
		988	3490 F894B1 ctl_fn5:
		989	3491 F894B1 20 C9 94 jsr ctl_tst ; check drive #
		990	3492 F894B4 AA tax ; phisycal drive?
		991	3493 F894B5 F0 04 beq ?10 ; yes, done
		992	3494 F894B7 A9 10 lda #$10 ; set bit 4
		993	Tue Jul 17 11:00:16 2018 Page 17
		994
		995
		996
		997
		998	3495 F894B9 04 45 tsb vdrive
		999	3496 F894BB 18 ?10: clc
		1000	3497 F894BC 60 rts
		1001	3498
		1002	3499 ; ctl function 6: reset write protect bit on ram disk
		1003	3500 F894BD ctl_fn6:
		1004	3501 F894BD 20 C9 94 jsr ctl_tst ; check drive #
		1005	3502 F894C0 AA tax ; phisycal drive?
		1006	3503 F894C1 F0 04 beq ?10 ; yes, done
		1007	3504 F894C3 A9 10 lda #$10 ; reset bit 4
		1008	3505 F894C5 14 45 trb vdrive
		1009	3506 F894C7 18 ?10: clc
		1010	3507 F894C8 60 rts
		1011	3508
		1012	3509 ; test drive number
		1013	3510 F894C9 ctl_tst:
		1014	3511 F894C9 A5 AB lda drive
		1015	3512 F894CB C9 02 cmp #FDMAXDRIVE
		1016	3513 F894CD 90 06 bcc ?10
		1017	3514 F894CF A9 0E lda #FDC_NODRIVE ; error: invalid drive
		1018	3515 F894D1 85 48 sta fdcerr
		1019	3516 F894D3 68 pla ; skip return address
		1020	3517 F894D4 68 pla
		1021	3518 F894D5 60 ?10: rts
		1022	3519
		1023	3520 ; test if drive is attached to controller
		1024	3521 F894D6 ctl_dr:
		1025	3522 F894D6 24 46 bit fdcctl
		1026	3523 F894D8 30 06 bmi ?10
		1027	3524 F894DA A9 0E lda #FDC_NODRIVE ; error: invalid drive
		1028	3525 F894DC 85 48 sta fdcerr
		1029	3526 F894DE 68 pla ; skip return address
		1030	3527 F894DF 68 pla
		1031	3528 F894E0 60 ?10: rts
		1032	3529
		1033	3530 ;---------------------------------------------------------------------------
		1034	3531 ; fdc read/write & format routines
		1035	3532 ;---------------------------------------------------------------------------
		1036	3533
		1037	3534 ; execute read/verf/write track/sector's on floppy disk
		1038	3535 ; param's:
		1039	3536 ; fdop=fdc operation (0=read,1=fake verify,2=write)
		1040	3537 ; track=fd track
		1041	3538 ; sector=fd first sector
		1042	3539 ; head=fd side
		1043	3540 ; eot=fd last sector
		1044	3541 ; gap3=gap3 length for read/write
		1045	3542 ; dtlstp=fd DTL/STP param
		1046	3543 ; ncnt=bytes # to transfer
		1047	3544 ; opfg<7>=verify buffer with disk
		1048	3545 ; opfg<6>=MT command (multi track)
		1049	3546 ; bufp=buffer pointer
		1050	3547 ; verfp=verify buffer pointer
		1051	3548 ;
		1052	3549 ; out: CF=1 if error, fdcerr hold error code
		1053	3550 F894E1 fdrw:
		1054	3551 F894E1 20 3F 98 jsr chkfmt ; start motor and test disk format
		1055	Tue Jul 17 11:00:16 2018 Page 18
		1056
		1057
		1058
		1059
		1060	3552 F894E4 90 03 bcc ?00
		1061	3553 F894E6 4C 77 95 jmp stop ; stop motor
		1062	3554 F894E9 20 60 9D ?00: jsr chkparms ; check params
		1063	3555 F894EC 90 03 bcc ?01
		1064	3556 F894EE 4C 77 95 jmp stop ; stop motor
		1065	3557 F894F1 A9 05 ?01: lda #maxret ; retries count
		1066	3558 F894F3 85 BB sta retries
		1067	3559 F894F5 24 B6 bit opfg ; will verify buffer?
		1068	3560 F894F7 10 03 bpl ?02 ; no
		1069	3561 F894F9 20 2C 9D jsr savebuf ; save dma buffer for verify
		1070	3562 F894FC A4 AC ?02: ldy track ; seek track
		1071	3563 F894FE 20 C6 99 jsr seek
		1072	3564 F89501 B0 55 bcs ?14 ; error: retry?
		1073	3565 F89503 A6 B4 ldx fdop
		1074	3566 F89505 BF B1 A0 F8 lda >CMDTAB,x ; FDC command
		1075	3567 F89509 48 pha
		1076	3568 F8950A BF B4 A0 F8 lda >DMATAB,x ; DMA mode
		1077	3569 F8950E EB xba ; B=dma mode
		1078	3570 F8950F A6 9E ldx bufp
		1079	3571 F89511 A4 9F ldy bufp+1
		1080	3572 F89513 A5 A0 lda bufp+2
		1081	3573 F89515 20 7C 9A jsr dmaset ; dma setup
		1082	3574 F89518 68 pla ; FDC command
		1083	3575 F89519 24 B6 bit opfg
		1084	3576 F8951B 50 02 bvc ?04 ; no MT
		1085	3577 F8951D 09 80 ora #$80 ; MT operation
		1086	3578 F8951F 20 6F 97 ?04: jsr fdcmd ; execute command
		1087	3579 F89522 B0 34 bcs ?14 ; error: retry?
		1088	3580 F89524 24 B6 bit opfg ; will verify data?
		1089	3581 F89526 10 36 bpl ?16 ; no -- no error
		1090	3582 F89528 A9 46 lda #WRITETRASF ; read disk into verify buffer
		1091	3583 F8952A EB xba ; dma mode (read data)
		1092	3584 F8952B A6 A1 ldx verfp
		1093	3585 F8952D A4 A2 ldy verfp+1
		1094	3586 F8952F A5 A3 lda verfp+2
		1095	3587 F89531 20 7C 9A jsr dmaset ; dma setup
		1096	3588 F89534 A9 66 lda #CMDREAD
		1097	3589 F89536 24 B6 bit opfg
		1098	3590 F89538 50 02 bvc ?06 ; no MT
		1099	3591 F8953A 09 80 ora #$80 ; MT operation
		1100	3592 F8953C 20 6F 97 ?06: jsr fdcmd ; execute command
		1101	3593 F8953F B0 17 bcs ?14 ; error: retry?
		1102	3594 F89541 A0 00 ldy #0
		1103	3595 F89543 INDEX16 ; verify buffer's
		1104	3596 F89543 C2 10 rep #PXFLAG
		1105	3597 .LONGI on
		1106	3598 .MNLIST
		1107	3599 F89545 B7 9E ?08: lda [bufp],y
		1108	3600 F89547 D7 A1 cmp [verfp],y
		1109	3601 F89549 D0 05 bne ?10 ; unmatch (ZF=0)
		1110	3602 F8954B C8 iny
		1111	3603 F8954C C4 94 cpy ncnt
		1112	3604 F8954E 90 F5 bcc ?08
		1113	3605 F89550 ?10: INDEX08 ; here ZF=1 if match, ZF=0 if not
		1114	3606 F89550 E2 10 sep #PXFLAG
		1115	3607 .LONGI off
		1116	3608 .MNLIST
		1117	Tue Jul 17 11:00:16 2018 Page 19
		1118
		1119
		1120
		1121
		1122	3609 F89552 18 clc ; assume no error
		1123	3610 F89553 F0 09 beq ?16 ; match
		1124	3611 F89555 A9 12 lda #FDC_VER ; verify error
		1125	3612 F89557 38 sec
		1126	3613 F89558 C6 BB ?14: dec retries ; try again?
		1127	3614 F8955A D0 A0 bne ?02 ; yes
		1128	3615 F8955C 80 0A bra ?18 ; CF=1, A=error code
		1129	3616 F8955E A5 44 ?16: lda fdcdrv ; set valid format
		1130	3617 F89560 29 7C and #01111100B
		1131	3618 F89562 05 B7 ora dskfmt ; update format in drive
		1132	3619 F89564 09 A0 ora #$A0 ; current valid format&trust bit
		1133	3620 F89566 85 44 sta fdcdrv
		1134	3621 F89568 24 B6 ?18: bit opfg ; will restore dma buffer after verify?
		1135	3622 F8956A 10 03 bpl done ; no
		1136	3623 F8956C 20 44 9D jsr restbuf ; restore dma buffer
		1137	3624
		1138	3625 ; end fdc operation: reset controller if any error
		1139	3626 ; stop motor & set fdcerr if error
		1140	3627 ; in: CF=1 if error, A=error code
		1141	3628 F8956F done:
		1142	3629 F8956F 90 0A bcc stop2
		1143	3630 F89571 48 pha ; save error code
		1144	3631 F89572 20 3A 9B jsr fdcrst ; reset controller after error
		1145	3632 F89575 68 pla ; restore error code
		1146	3633 F89576 38 sec
		1147	3634
		1148	3635 ; stop motor & set error code if any
		1149	3636 ; in: CF=1 if error, A=error code
		1150	3637 F89577 stop:
		1151	3638 F89577 90 02 bcc stop2
		1152	3639 F89579 85 48 sta fdcerr ; set error code
		1153	3640 F8957B stop2:
		1154	3641 F8957B 4C 07 9D jmp stopmtr
		1155	3642
		1156	3643 ; format whole floppy disk
		1157	3644 ; out: CF=1 if error, fdcerr hold error code
		1158	3645 F8957E fdfmt:
		1159	3646 F8957E 24 46 bit fdcctl ; drive attached?
		1160	3647 F89580 30 06 bmi ?02 ; yes
		1161	3648 F89582 A9 0E lda #FDC_NODRIVE
		1162	3649 F89584 85 48 sta fdcerr
		1163	3650 F89586 38 sec
		1164	3651 F89587 60 rts
		1165	3652 F89588 20 D7 98 ?02: jsr chkdsk ; start motor and check if disk in drive
		1166	3653 F8958B 90 02 bcc ?04 ; ok - ready
		1167	3654 F8958D 50 E8 bvc stop ; not ready, stop motor&exit
		1168	3655 F8958F A9 10 ?04: lda #$10 ; test disk write protect on
		1169	3656 F89591 24 44 bit fdcdrv
		1170	3657 F89593 F0 04 beq ?06
		1171	3658 F89595 A9 0B lda #FDC_WP ; wp on error
		1172	3659 F89597 80 DE bra stop ; stop motor&exit
		1173	3660 F89599 64 48 ?06: stz fdcerr ; clear error
		1174	3661 F8959B A5 44 lda fdcdrv ; reset format
		1175	3662 F8959D 29 5C and #01011100B
		1176	3663 F8959F 85 44 sta fdcdrv
		1177	3664 F895A1 24 44 bit fdcdrv ; need to call seek0 double step?
		1178	3665 F895A3 70 05 bvs ?08 ; no
		1179	Tue Jul 17 11:00:16 2018 Page 20
		1180
		1181
		1182
		1183
		1184	3666 F895A5 20 95 99 jsr seek0 ; double step seek track 0
		1185	3667 F895A8 B0 CD bcs stop ; error
		1186	3668 F895AA A5 B7 ?08: lda dskfmt ; set FDC rate
		1187	3669 F895AC 20 BB 9C jsr setrate
		1188	3670 F895AF A9 01 lda #$01 ; reset bit 0...
		1189	3671 F895B1 14 B6 trb fmtfg ; ...for first call to callback
		1190	3672 F895B3 ACC16
		1191	3673 F895B3 C2 20 rep #PMFLAG
		1192	3674 .LONGA on
		1193	3675 .MNLIST
		1194	3676 F895B5 3B tsc ; make room for a local buffer in stack
		1195	3677 F895B6 38 sec
		1196	3678 F895B7 E9 50 00 sbc #80
		1197	3679 F895BA 1B tcs
		1198	3680 F895BB 1A inc a ; pointer to temp. buffer
		1199	3681 F895BC 85 98 sta ptmp
		1200	3682 F895BE ACC08
		1201	3683 F895BE E2 20 sep #PMFLAG
		1202	3684 .LONGA off
		1203	3685 .MNLIST
		1204	3686 F895C0 A0 4F ldy #79 ; save buffer dma in temp. buffer
		1205	3687 F895C2 B7 9E ?09: lda [bufp],y
		1206	3688 F895C4 91 98 sta (ptmp),y
		1207	3689 F895C6 88 dey
		1208	3690 F895C7 10 F9 bpl ?09
		1209	3691 F895C9 C8 iny ; Y=0
		1210	3692 F895CA BB tyx ; X=0
		1211	3693 F895CB 84 AC ?10: sty track ; format this track...
		1212	3694 F895CD 86 AD ?11: stx head ; ...in this side
		1213	3695 F895CF A9 05 lda #maxret
		1214	3696 F895D1 85 BB sta retries ; retries count
		1215	3697 F895D3 A0 00 ?12: ldy #0 ; fill buffer with data for current track/head
		1216	3698 F895D5 A2 01 ldx #1 ; X=sector
		1217	3699 F895D7 A5 AC ?14: lda track
		1218	3700 F895D9 97 9E sta [bufp],y ; C=track
		1219	3701 F895DB C8 iny
		1220	3702 F895DC A5 AD lda head
		1221	3703 F895DE 97 9E sta [bufp],y ; H=head
		1222	3704 F895E0 C8 iny
		1223	3705 F895E1 8A txa
		1224	3706 F895E2 97 9E sta [bufp],y ; R=sector
		1225	3707 F895E4 C8 iny
		1226	3708 F895E5 A9 02 lda #2
		1227	3709 F895E7 97 9E sta [bufp],y ; N=size of sector
		1228	3710 F895E9 C8 iny
		1229	3711 F895EA E8 inx
		1230	3712 F895EB E4 B0 cpx maxsect ; loop
		1231	3713 F895ED 90 E8 bcc ?14
		1232	3714 F895EF 84 94 sty ncnt ; DMA count of bytes
		1233	3715 F895F1 64 95 stz ncnt+1
		1234	3716 F895F3 20 32 98 jsr tstrdy ; test disk ready
		1235	3717 F895F6 B0 4A bcs ?20 ; error - no disk or disk changed
		1236	3718 F895F8 A9 4A lda #READTRASF ; read transfer
		1237	3719 F895FA EB xba ; B=dma mode
		1238	3720 F895FB A6 9E ldx bufp
		1239	3721 F895FD A4 9F ldy bufp+1
		1240	3722 F895FF A5 A0 lda bufp+2
		1241	Tue Jul 17 11:00:16 2018 Page 21
		1242
		1243
		1244
		1245
		1246	3723 F89601 20 7C 9A jsr dmaset
		1247	3724 F89604 24 B6 bit fmtfg
		1248	3725 F89606 10 13 bpl ?16 ; no callback
		1249	3726 F89608 4B phk ; JSL simulation
		1250	3727 F89609 F4 1A 96 pea #?16-1 ; return address
		1251	3728 F8960C A5 B1 lda eot ; params for callback
		1252	3729 F8960E EB xba ; B = sector/track
		1253	3730 F8960F A5 B6 lda fmtfg
		1254	3731 F89611 4A lsr a ; bit 0 -> carry -> 0 if first call
		1255	3732 F89612 A5 AB lda drive ; A = drive
		1256	3733 F89614 A4 AC ldy track ; Y = track
		1257	3734 F89616 A6 AD ldx head ; X = head
		1258	3735 F89618 DC A1 00 jmp [lpfn]
		1259	3736 ?16: ; return from notify callback
		1260	3737 F8961B A4 AC ldy track ; track seek
		1261	3738 F8961D 20 C6 99 jsr seek
		1262	3739 F89620 B0 20 bcs ?20 ; seek error
		1263	3740 F89622 20 07 97 jsr fdftcmd ; format track
		1264	3741 F89625 90 06 bcc ?18 ; no error
		1265	3742 F89627 C6 BB dec retries
		1266	3743 F89629 D0 A8 bne ?12 ; try again
		1267	3744 F8962B 80 15 bra ?20
		1268	3745 F8962D A9 01 ?18: lda #$01
		1269	3746 F8962F 04 B6 tsb fmtfg ; bit 0 = 1 -> for callback
		1270	3747 F89631 A6 AD ldx head ; next side
		1271	3748 F89633 E8 inx
		1272	3749 F89634 E0 02 cpx #2
		1273	3750 F89636 90 95 bcc ?11 ; format same track in next side
		1274	3751 F89638 A2 00 ldx #0 ; restart side=0
		1275	3752 F8963A A4 AC ldy track ; next track
		1276	3753 F8963C C8 iny
		1277	3754 F8963D C0 50 cpy #80
		1278	3755 F8963F 90 8A bcc ?10 ; format next track
		1279	3756 F89641 18 clc ; format end without error
		1280	3757 F89642 08 ?20: php ; save carry
		1281	3758 F89643 FA plx ; save carry in X bit 0
		1282	3759 F89644 A0 4F ldy #79 ; restore buffer dma
		1283	3760 F89646 B1 98 ?22: lda (ptmp),y
		1284	3761 F89648 97 9E sta [bufp],y
		1285	3762 F8964A 88 dey
		1286	3763 F8964B 10 F9 bpl ?22
		1287	3764 F8964D ACC16CLC
		1288	3765 F8964D C2 21 rep #(PMFLAG.OR.PCFLAG)
		1289	3766 .LONGA on
		1290	3767 .MNLIST
		1291	3768 F8964F 3B tsc ; restore stack frame
		1292	3769 F89650 69 50 00 adc #80
		1293	3770 F89653 1B tcs
		1294	3771 F89654 ACC08
		1295	3772 F89654 E2 20 sep #PMFLAG
		1296	3773 .LONGA off
		1297	3774 .MNLIST
		1298	3775 F89656 8A txa ; A = saved status
		1299	3776 F89657 4A lsr a ; CF=1 if error
		1300	3777 F89658 B0 0A bcs ?24 ; error
		1301	3778 F8965A A5 44 lda fdcdrv ; set valid format
		1302	3779 F8965C 29 7C and #01111100B
		1303	Tue Jul 17 11:00:16 2018 Page 22
		1304
		1305
		1306
		1307
		1308	3780 F8965E 05 B7 ora dskfmt ; update format in selected drive
		1309	3781 F89660 09 80 ora #$80 ; current valid format (but not trust bit)
		1310	3782 F89662 85 44 sta fdcdrv
		1311	3783 F89664 4C 6F 95 ?24: jmp done ; stop motor - reset controller if error
		1312	3784
		1313	3785 ; verify low level format of floppy disk
		1314	3786 ; out: CF=1 if error, fdcerr hold error code
		1315	3787 F89667 fdverf:
		1316	3788 F89667 24 46 bit fdcctl ; drive attached?
		1317	3789 F89669 30 06 bmi ?02 ; yes
		1318	3790 F8966B A9 0E lda #FDC_NODRIVE
		1319	3791 F8966D 85 48 sta fdcerr
		1320	3792 F8966F 38 sec
		1321	3793 F89670 60 rts
		1322	3794 F89671 64 44 ?02: stz fdcdrv ; get disk format - invalidate current format
		1323	3795 F89673 20 3F 98 jsr chkfmt ; try to check format
		1324	3796 F89676 90 03 bcc ?06
		1325	3797 F89678 4C 77 95 ?04: jmp stop ; error
		1326	3798 F8967B A9 00 ?06: lda #0
		1327	3799 F8967D AA tax
		1328	3800 F8967E 85 9E sta bufp ; set dma buffer at $030000
		1329	3801 F89680 85 9F sta bufp+1 ; fake transfer
		1330	3802 F89682 1A inc a
		1331	3803 F89683 85 AE sta sector ; sector = 1
		1332	3804 F89685 1A inc a
		1333	3805 F89686 1A inc a
		1334	3806 F89687 85 A0 sta bufp+2
		1335	3807 F89689 CA dex
		1336	3808 F8968A 86 9B stx dtlstp ; DTL/STP = $FF
		1337	3809 F8968C A6 B7 ldx dskfmt
		1338	3810 F8968E BF A1 A0 F8 lda >MAXSECT,x
		1339	3811 F89692 85 B0 sta maxsect ; max. numbers of sectors/track + 1
		1340	3812 F89694 3A dec a
		1341	3813 F89695 85 AF sta sectnum ; sectors/track
		1342	3814 F89697 85 B1 sta eot ; end of track
		1343	3815 F89699 0A asl a ; num. of bytes
		1344	3816 F8969A 85 95 sta ncnt+1
		1345	3817 F8969C 64 94 stz ncnt
		1346	3818 F8969E A0 00 ldy #0 ; Y=0
		1347	3819 F896A0 BB tyx ; X=0
		1348	3820 F896A1 84 AC ?10: sty track ; check this track...
		1349	3821 F896A3 86 AD ?11: stx head ; ...in this side
		1350	3822 F896A5 A9 05 lda #maxret
		1351	3823 F896A7 85 BB sta retries ; retries count
		1352	3824 F896A9 20 32 98 ?12: jsr tstrdy ; test disk
		1353	3825 F896AC B0 CA bcs ?04 ; error - no disk or disk changed
		1354	3826 F896AE A9 42 lda #VERFTRASF ; fake transfer, only check track
		1355	3827 F896B0 EB xba ; B=dma mode
		1356	3828 F896B1 A6 9E ldx bufp ; buffer pointer
		1357	3829 F896B3 A4 9F ldy bufp+1
		1358	3830 F896B5 A5 A0 lda bufp+2
		1359	3831 F896B7 20 7C 9A jsr dmaset
		1360	3832 F896BA 24 B6 bit fmtfg
		1361	3833 F896BC 10 13 bpl ?14 ; no callback
		1362	3834 F896BE 4B phk ; JSL simulation
		1363	3835 F896BF F4 D0 96 pea #?14-1 ; return address
		1364	3836 F896C2 A5 B7 lda dskfmt
		1365	Tue Jul 17 11:00:16 2018 Page 23
		1366
		1367
		1368
		1369
		1370	3837 F896C4 EB xba ; B = sector/track
		1371	3838 F896C5 A5 B6 lda fmtfg
		1372	3839 F896C7 4A lsr a ; bit 0 -> carry -> 0 if first call
		1373	3840 F896C8 A5 AB lda drive ; A = drive
		1374	3841 F896CA A4 AC ldy track ; Y = track
		1375	3842 F896CC A6 AD ldx head
		1376	3843 F896CE DC A1 00 jmp [lpfn]
		1377	3844 ?14: ; return from notify callback
		1378	3845 F896D1 A4 AC ldy track ; track seek
		1379	3846 F896D3 20 C6 99 jsr seek
		1380	3847 F896D6 B0 A0 bcs ?04 ; seek error
		1381	3848 F896D8 A9 66 lda #CMDREAD ; fake read whole track in current side
		1382	3849 F896DA 20 6F 97 jsr fdcmd
		1383	3850 F896DD 90 06 bcc ?18
		1384	3851 F896DF C6 BB dec retries
		1385	3852 F896E1 D0 C6 bne ?12
		1386	3853 F896E3 80 1F bra ?20
		1387	3854 F896E5 A9 01 ?18: lda #$01
		1388	3855 F896E7 04 B6 tsb fmtfg ; bit 0 = 1 -> for callback
		1389	3856 F896E9 A6 AD ldx head ; next side
		1390	3857 F896EB E8 inx
		1391	3858 F896EC E0 02 cpx #2
		1392	3859 F896EE 90 B3 bcc ?11 ; same track, side=1
		1393	3860 F896F0 A2 00 ldx #0 ; clear head
		1394	3861 F896F2 A4 AC ldy track ; next track
		1395	3862 F896F4 C8 iny
		1396	3863 F896F5 C0 50 cpy #80
		1397	3864 F896F7 90 A8 bcc ?10 ; next track, side=0
		1398	3865 F896F9 A5 44 lda fdcdrv ; set valid format
		1399	3866 F896FB 29 7C and #01111100B
		1400	3867 F896FD 05 B7 ora dskfmt ; update format (but not trut bit)
		1401	3868 F896FF 09 80 ora #$80 ; current valid format
		1402	3869 F89701 85 44 sta fdcdrv
		1403	3870 F89703 18 clc
		1404	3871 F89704 4C 6F 95 ?20: jmp done
		1405	3872
		1406	3873 ;---------------------------------------------------------------------------
		1407	3874 ; fdc basic read/write/format command's
		1408	3875 ;---------------------------------------------------------------------------
		1409	3876
		1410	3877 ; fd format track command
		1411	3878 ; out: CF=1 if error, A=error code
		1412	3879 ; A,X,Y destroyed
		1413	3880 F89707 fdftcmd:
		1414	3881 F89707 64 96 stz ntrsf ; clear numbers of transferred bytes
		1415	3882 F89709 64 97 stz ntrsf+1
		1416	3883 F8970B A5 B7 lda dskfmt
		1417	3884 F8970D 29 03 and #$03 ; disk format [0..2]
		1418	3885 F8970F AA tax ; X=format
		1419	3886 F89710 BF A9 A0 F8 lda >FGPLTBL,x ; GAP 3 length
		1420	3887 F89714 85 B2 sta gap3
		1421	3888 F89716 BF AD A0 F8 lda >HEADTBL,x ; head inversion for CBM format
		1422	3889 F8971A 45 AD eor head
		1423	3890 F8971C 0A asl a ; head -> bit 2
		1424	3891 F8971D 0A asl a
		1425	3892 F8971E 85 9A sta drvhead ; head + drive (=0)
		1426	3893 F89720 A9 4D lda #CMDFMT ; format track command
		1427	Tue Jul 17 11:00:16 2018 Page 24
		1428
		1429
		1430
		1431
		1432	3894 F89722 20 9A 9B jsr sendto
		1433	3895 F89725 A5 9A lda drvhead ; head + drive
		1434	3896 F89727 20 9A 9B jsr sendto
		1435	3897 F8972A A9 02 lda #2 ; sector size = 512 bytes
		1436	3898 F8972C 20 9A 9B jsr sendto
		1437	3899 F8972F A5 B1 lda eot ; SC = sector/track
		1438	3900 F89731 20 9A 9B jsr sendto
		1439	3901 F89734 A5 B2 lda gap3 ; GPL 3 length
		1440	3902 F89736 20 9A 9B jsr sendto
		1441	3903 F89739 A5 B8 lda fmtfill ; D = fill byte
		1442	3904 F8973B 20 9A 9B jsr sendto
		1443	3905 F8973E 2C 00 FD bit VIA0+VIAPRB ; clear CB1 flag
		1444	3906 F89741 A9 02 lda #$02 ; enable DMA bus
		1445	3907 F89743 1C 0F FD trb VIA0+VIAPRANH ; PA1 -> /DME = 0
		1446	3908 F89746 20 5F 99 jsr chkres ; wait result
		1447	3909 F89749 20 BC 97 jsr chkdma
		1448	3910 F8974C B0 20 bcs ?10 ; error in phase result
		1449	3911 F8974E 24 B6 bit fmtfg ; verf track ?
		1450	3912 F89750 50 1C bvc ?10 ; no
		1451	3913 F89752 A5 B1 lda eot
		1452	3914 F89754 0A asl a ; number of bytes
		1453	3915 F89755 85 95 sta ncnt+1
		1454	3916 F89757 64 94 stz ncnt
		1455	3917 F89759 64 96 stz ntrsf ; clear numbers of transferred bytes
		1456	3918 F8975B 64 97 stz ntrsf+1
		1457	3919 F8975D A9 42 lda #VERFTRASF ; fake transfer, just check track
		1458	3920 F8975F EB xba ; B=dma mode
		1459	3921 F89760 A6 9E ldx bufp ; buffer pointer
		1460	3922 F89762 A4 9F ldy bufp+1
		1461	3923 F89764 A5 A0 lda bufp+2
		1462	3924 F89766 20 7C 9A jsr dmaset
		1463	3925 F89769 A9 66 lda #CMDREAD ; fake read whole track in current side
		1464	3926 F8976B 20 6F 97 jsr fdcmd
		1465	3927 F8976E 60 ?10: rts
		1466	3928
		1467	3929 ; fd read/write/verf command
		1468	3930 ; in: A=command
		1469	3931 ; out: CF=1 if error, A=error code
		1470	3932 ; A,X,Y destroyed
		1471	3933 F8976F fdcmd:
		1472	3934 ;stz ntrsf ; clear numbers of transferred bytes
		1473	3935 ;stz ntrsf+1
		1474	3936 F8976F A8 tay ; Y=command
		1475	3937 F89770 A5 B7 lda dskfmt
		1476	3938 F89772 29 03 and #$03 ; disk format [0..2]
		1477	3939 F89774 AA tax ; X=format
		1478	3940 F89775 BF A5 A0 F8 lda >RWGPLTBL,x ; GAP 3 length for required format
		1479	3941 F89779 85 B2 sta gap3
		1480	3942 F8977B BF AD A0 F8 lda >HEADTBL,x ; head inversion for CBM format
		1481	3943 F8977F 45 AD eor head
		1482	3944 F89781 0A asl a ; head -> bit 2
		1483	3945 F89782 0A asl a
		1484	3946 F89783 85 9A sta drvhead ; head + drive (=0)
		1485	3947 F89785 98 tya ; A=command
		1486	3948 F89786 20 9A 9B jsr sendto
		1487	3949 F89789 A5 9A lda drvhead ; head + drive
		1488	3950 F8978B 20 9A 9B jsr sendto
		1489	Tue Jul 17 11:00:16 2018 Page 25
		1490
		1491
		1492
		1493
		1494	3951 F8978E A5 AC lda track ; track
		1495	3952 F89790 20 9A 9B jsr sendto
		1496	3953 F89793 A5 AD lda head ; head
		1497	3954 F89795 20 9A 9B jsr sendto
		1498	3955 F89798 A5 AE lda sector ; sector
		1499	3956 F8979A 20 9A 9B jsr sendto
		1500	3957 F8979D A9 02 lda #2 ; sector size = 512 bytes
		1501	3958 F8979F 20 9A 9B jsr sendto
		1502	3959 F897A2 A5 B1 lda eot ; EOT (last sector)
		1503	3960 F897A4 20 9A 9B jsr sendto
		1504	3961 F897A7 A5 B2 lda gap3 ; GPL 3 length
		1505	3962 F897A9 20 9A 9B jsr sendto
		1506	3963 F897AC A5 9B lda dtlstp ; DTL/STP
		1507	3964 F897AE 20 9A 9B jsr sendto
		1508	3965 F897B1 2C 00 FD bit VIA0+VIAPRB ; clear CB1 flag (FDC interrupt)
		1509	3966 F897B4 A9 02 lda #$02 ; enable DMA bus control
		1510	3967 F897B6 1C 0F FD trb VIA0+VIAPRANH ; PA1 -> /DME = 0
		1511	3968 ;jsr chkres3 ; wait for transfer ending and CPU bus enable
		1512	3969 F897B9
		1513	3970 F897B9 20 5F 99 jsr chkres ; wait for transfer ending and CPU bus enable
		1514	3971
		1515	3972 ; read from dma count the effective transferred bytes count
		1516	3973 F897BC chkdma:
		1517	3974 F897BC 48 pha ; save error code if any
		1518	3975 F897BD 08 php ; save carry for pending error
		1519	3976 F897BE AF 98 FD 00 lda >DMASR ; save DMA status & clear status reg
		1520	3977 F897C2 85 B3 sta dmast
		1521	3978 F897C4 85 EE sta <$ee
		1522	3979
		1523	3980 F897C6 8E 9C FD stx .ABS.DMAWCLRFF
		1524	3981 F897C9 AE 95 FD ldx .ABS.DMAC+DMACNT2
		1525	3982 F897CC 86 E8 stx <$e8
		1526	3983 F897CE AE 95 FD ldx .ABS.DMAC+DMACNT2
		1527	3984 F897D1 86 E9 stx <$e9
		1528	3985 F897D3 8E 9C FD stx .ABS.DMAWCLRFF
		1529	3986 F897D6 AE 94 FD ldx .ABS.DMAC+DMAADDR2
		1530	3987 F897D9 86 EA stx <$ea
		1531	3988 F897DB EA nop
		1532	3989 F897DC EA nop
		1533	3990 F897DD EA nop
		1534	3991 F897DE EA nop
		1535	3992 F897DF AE 94 FD ldx .ABS.DMAC+DMAADDR2
		1536	3993 F897E2 86 EB stx <$eb
		1537	3994 F897E4 64 EF stz <$ef
		1538	3995 F897E6 90 04 bcc ?10
		1539	3996 F897E8 C6 EF dec <$ef
		1540	3997 F897EA B0 43 bcs ?30 ; error pending
		1541	3998 F897EC 8D 9C FD ?10: sta !DMAWCLRFF ; loop for read dma reg.
		1542	3999 F897EF EA nop
		1543	4000 F897F0 EA nop
		1544	4001 F897F1 AD 95 FD lda !DMAC+DMACNT2 ; low count DMA residue
		1545	4002 F897F4 EB xba
		1546	4003 F897F5 EA nop
		1547	4004 F897F6 AD 95 FD lda !DMAC+DMACNT2 ; high count DMA residue
		1548	4005 F897F9 EB xba
		1549	4006 F897FA EA nop
		1550	4007 F897FB 8D 9C FD sta !DMAWCLRFF
		1551	Tue Jul 17 11:00:16 2018 Page 26
		1552
		1553
		1554
		1555
		1556	4008 F897FE CD 95 FD cmp !DMAC+DMACNT2
		1557	4009 F89801 EA nop
		1558	4010 F89802 D0 E8 bne ?10
		1559	4011 F89804 EB xba
		1560	4012 F89805 EA nop
		1561	4013 F89806 CD 95 FD cmp !DMAC+DMACNT2
		1562	4014 F89809 EA nop
		1563	4015 F8980A D0 E0 bne ?10
		1564	4016 F8980C EB xba ; C = residual bytes #
		1565	4017 F8980D ACC16
		1566	4018 F8980D C2 20 rep #PMFLAG
		1567	4019 .LONGA on
		1568	4020 .MNLIST
		1569	4021 F8980F 1A inc a ; DMA count residue
		1570	4022 F89810 85 96 sta ntrsf
		1571	4023 F89812 38 sec
		1572	4024 F89813 A5 94 lda ncnt ; # transferred bytes
		1573	4025 F89815 E5 96 sbc ntrsf
		1574	4026 ;sta ntrsf
		1575	4027 F89817 C5 94 cmp ncnt
		1576	4028 F89819 ACC08
		1577	4029 F89819 E2 20 sep #PMFLAG
		1578	4030 .LONGA off
		1579	4031 .MNLIST
		1580	4032 F8981B D0 06 bne ?20 ; error: no match
		1581	4033 F8981D A5 B3 lda dmast ; check dma status
		1582	4034 F8981F 89 04 bit #$04 ; premature cycle ending?
		1583	4035 F89821 D0 0C bne ?30 ; no
		1584	4036 F89823 A3 01 ?20: lda $01,s ; set CF in saved status
		1585	4037 F89825 09 01 ora #PCFLAG ; set error flag
		1586	4038 F89827 83 01 sta $01,s
		1587	4039 F89829 A9 08 lda #FDC_DLOSS ; data loss error
		1588	4040 F8982B
		1589	4041 F8982B 09 80 ora #$80
		1590	4042
		1591	4043 F8982D 83 02 sta $02,s ; report error
		1592	4044 F8982F 28 ?30: plp ; return CF
		1593	4045 F89830 68 pla ; return error code
		1594	4046 F89831 60 rts
		1595	4047
		1596	4048 ;---------------------------------------------------------------------------
		1597	4049 ; disk check routines
		1598	4050 ;---------------------------------------------------------------------------
		1599	4051
		1600	4052 ; test if disk ready while motor is spinning
		1601	4053 ; out: CF=0 if disk ready
		1602	4054 ; CF=1 if disk not ready or changed, A=FDC_NOTREADY
		1603	4055 ; A destroyed, X&Y preserved
		1604	4056 F89832 tstrdy:
		1605	4057 F89832 18 clc
		1606	4058 F89833 AF DF FD 00 lda >FDCDIR ; read disk change line
		1607	4059 F89837 29 80 and #$80 ; bit 7 will be 0
		1608	4060 F89839 F0 03 beq ?10 ; ready - exit with CF = 0
		1609	4061 F8983B A9 10 lda #FDC_NOTREADY ; not ready
		1610	4062 F8983D 38 sec ; error
		1611	4063 F8983E 60 ?10: rts
		1612	4064
		1613	Tue Jul 17 11:00:16 2018 Page 27
		1614
		1615
		1616
		1617
		1618	4065 ; check disk format - if the actual disk was not never checked it will be
		1619	4066 ; tested for the format
		1620	4067 ; out: CF=1 if error, A=error code
		1621	4068 ; A&Y destroyed, X preserved
		1622	4069 F8983F chkfmt:
		1623	4070 F8983F 20 D7 98 jsr chkdsk ; start motor and check if disk ready
		1624	4071 F89842 90 04 bcc ?06 ; disk ready and not changed
		1625	4072 F89844 50 3F bvc ?20 ; not ready - exit with CF = 1
		1626	4073 F89846 64 48 stz fdcerr ; disk changed
		1627	4074 F89848 24 44 ?06: bit fdcdrv ; need to call seek0 double step?
		1628	4075 F8984A 70 05 bvs ?08 ; no
		1629	4076 F8984C 20 95 99 jsr seek0 ; double step seek track 0
		1630	4077 F8984F B0 34 bcs ?20 ; error
		1631	4078 F89851 A5 44 ?08: lda fdcdrv ; bit 7 -> know format ?
		1632	4079 F89853 30 31 bmi ?30 ; yes, so check and compare
		1633	4080 F89855 A9 02 lda #$02 ; start with H.D.
		1634	4081 F89857 85 B7 ?10: sta dskfmt
		1635	4082 F89859 20 BB 9C jsr setrate ; setup rate
		1636	4083 F8985C 20 C2 98 jsr ?50 ; little delay
		1637	4084 F8985F 20 48 99 jsr readid ; read ID track=0 head=0
		1638	4085 F89862 90 08 bcc ?12 ; ok
		1639	4086 F89864 A5 B7 lda dskfmt
		1640	4087 F89866 F0 14 beq ?16 ; error - unrecognized format
		1641	4088 F89868 A9 00 lda #0 ; try D.D. rate
		1642	4089 F8986A 80 EB bra ?10
		1643	4090 F8986C 20 76 98 ?12: jsr ?14 ; check track & head
		1644	4091 F8986F B0 14 bcs ?20
		1645	4092 F89871 A9 80 lda #$80
		1646	4093 F89873 04 44 tsb fdcdrv ; set know format bit
		1647	4094 F89875 60 rts
		1648	4095 F89876 A5 A7 ?14: lda fdcres+3 ; check track
		1649	4096 F89878 C5 47 cmp fdctrk
		1650	4097 F8987A F0 04 beq ?18 ; will be the same
		1651	4098 F8987C A9 0D ?16: lda #FDC_BADFMT ; unknow format
		1652	4099 F8987E 38 ?17: sec
		1653	4100 F8987F 60 rts
		1654	4101 F89880 A5 A8 ?18: lda fdcres+4 ; head is inverted if CBM format
		1655	4102 F89882 04 B7 tsb dskfmt ; this set eventually bit 0 for CBM format
		1656	4103 F89884 18 clc
		1657	4104 F89885 60 ?20: rts
		1658	4105 F89886 89 20 ?30: bit #$20 ; trust format?
		1659	4106 F89888 D0 32 bne ?34 ; yes
		1660	4107 F8988A 29 02 and #$02 ; mask rate
		1661	4108 F8988C 85 B7 sta dskfmt ; here bit 0 = 0
		1662	4109 F8988E A8 tay
		1663	4110 F8988F 45 46 eor fdcctl ; compare with current rate
		1664	4111 F89891 29 02 and #$02
		1665	4112 F89893 F0 07 beq ?31 ; same rate
		1666	4113 F89895 98 tya
		1667	4114 F89896 20 BB 9C jsr setrate
		1668	4115 F89899 20 C2 98 jsr ?50 ; little delay
		1669	4116 F8989C A9 80 ?31: lda #$80
		1670	4117 F8989E 14 44 trb fdcdrv ; clear know format bit
		1671	4118 F898A0 20 48 99 jsr readid ; read first ID in current track
		1672	4119 F898A3 B0 E0 bcs ?20 ; error
		1673	4120 F898A5 20 76 98 jsr ?14 ; check track & head
		1674	4121 F898A8 B0 DB bcs ?20 ; error
		1675	Tue Jul 17 11:00:16 2018 Page 28
		1676
		1677
		1678
		1679
		1680	4122 F898AA A5 44 lda fdcdrv
		1681	4123 F898AC 45 B7 eor dskfmt ; compare computed format with the stored one
		1682	4124 F898AE 29 03 and #$03 ; will be 0
		1683	4125 F898B0 F0 04 beq ?32
		1684	4126 F898B2 A9 0F lda #FDC_FMT ; mismatch format
		1685	4127 F898B4 80 C8 bra ?17
		1686	4128 F898B6 A9 80 ?32: lda #$80
		1687	4129 F898B8 04 44 tsb fdcdrv ; set know format bit
		1688	4130 F898BA 18 clc
		1689	4131 F898BB 60 rts
		1690	4132 F898BC 29 03 ?34: and #$03 ; trust format
		1691	4133 F898BE 85 B7 sta dskfmt
		1692	4134 F898C0 18 clc
		1693	4135 F898C1 60 rts
		1694	4136
		1695	4137 ; 1ms delay
		1696	4138 F898C2 A9 20 ?50: lda #$20 ; T2 count PHI2 pulses
		1697	4139 F898C4 1C 0B FD trb VIA0+VIAACR
		1698	4140 F898C7 A9 10 lda #T1MS
		1699	4141 F898C9 9C 08 FD stz VIA0+VIAT2CL
		1700	4142 F898CC 8D 09 FD sta VIA0+VIAT2CH
		1701	4143 F898CF AD 0D FD ?55: lda VIA0+VIAIFR
		1702	4144 F898D2 89 20 bit #T2IFRB
		1703	4145 F898D4 F0 F9 beq ?55
		1704	4146 F898D6 60 rts
		1705	4147
		1706	4148 ; check disk in drive - if disk is changed reset controller and recalibrate
		1707	4149 ; drive & move head in track 0 & aquire wp status on disk
		1708	4150 ; out: CF=0 if disk ready
		1709	4151 ; CF=1 if disk not ready or changed
		1710	4152 ; VF=1 if disk changed else VF=0 if not ready
		1711	4153 ; A=error code FDC_NOTREADY or FDC_CHANGE or others
		1712	4154 ; A destroyed, X&Y preserved
		1713	4155 F898D7 chkdsk:
		1714	4156 F898D7 5A phy
		1715	4157 F898D8 64 48 stz fdcerr
		1716	4158 F898DA 20 CE 9C jsr startmtr ; start motor
		1717	4159 F898DD 18 clc
		1718	4160 F898DE AF DF FD 00 lda >FDCDIR ; read disk change line
		1719	4161 F898E2 29 80 and #$80 ; bit 7 will be 0
		1720	4162 F898E4 F0 21 beq ?20 ; ready so aquire wp status
		1721	4163 F898E6 A9 01 lda #$01 ; clear ready bit
		1722	4164 F898E8 14 46 trb fdcctl
		1723	4165 F898EA 20 3A 9B jsr fdcrst ; aquire new disk change line status
		1724	4166 F898ED B0 1F bcs ?30 ; error
		1725	4167 F898EF 20 95 99 jsr seek0 ; recalibrate after reset and seek track 0
		1726	4168 F898F2 B0 1A bcs ?30 ; error
		1727	4169 F898F4 A0 11 ldy #FDC_CHANGE ; disk change?
		1728	4170 F898F6 E2 40 sep #PVFLAG ; VF = 1 if disk change
		1729	4171 F898F8 AF DF FD 00 lda >FDCDIR ; read line
		1730	4172 F898FC 29 80 and #$80 ; bit 7 = 0 if disk inserted into drive
		1731	4173 F898FE F0 03 beq ?10 ; so disk changed
		1732	4174 F89900 A0 10 ldy #FDC_NOTREADY ; not ready
		1733	4175 F89902 B8 clv ; VF flag = 0 if not ready
		1734	4176 F89903 38 ?10: sec ; error
		1735	4177 F89904 98 tya ; A=error code
		1736	4178 F89905 50 07 bvc ?30 ; not ready
		1737	Tue Jul 17 11:00:16 2018 Page 29
		1738
		1739
		1740
		1741
		1742	4179 F89907 08 ?20: php ; save CF&VF
		1743	4180 F89908 48 pha ; save error code if any
		1744	4181 F89909 20 10 99 jsr chkwp ; aquire wp disk status
		1745	4182 F8990C 68 pla
		1746	4183 F8990D 28 plp
		1747	4184 F8990E 7A ?30: ply
		1748	4185 F8990F 60 rts
		1749	4186
		1750	4187 ; set write protect on bit and disk ready bit
		1751	4188 F89910 chkwp:
		1752	4189 F89910 A9 10 lda #$10
		1753	4190 F89912 14 44 trb fdcdrv ; clear wp on bit
		1754	4191 F89914 A9 01 lda #$01 ; set ready bit
		1755	4192 F89916 04 46 tsb fdcctl
		1756	4193 F89918 A9 04 lda #CMDSENSEST ; sense status
		1757	4194 F8991A 20 9A 9B jsr sendto
		1758	4195 F8991D A9 00 lda #0 ; drive
		1759	4196 F8991F 20 9A 9B jsr sendto
		1760	4197 F89922 20 D0 9B jsr waitres ; get result
		1761	4198 F89925 24 A4 bit fdcres ; ST3 bit 6 is wp on bit
		1762	4199 F89927 50 04 bvc ?10 ; no wp
		1763	4200 F89929 A9 10 lda #$10
		1764	4201 F8992B 04 44 tsb fdcdrv ; set bit 4: wp on
		1765	4202 F8992D 60 ?10: rts
		1766	4203
		1767	4204 ; sense phisycal drive #0 status
		1768	4205 ; out: A=ST3 status if no error
		1769	4206 ; CF=1 if error, fdcerr=error code
		1770	4207 F8992E drvst:
		1771	4208 F8992E 20 CE 9C jsr startmtr
		1772	4209 F89931 20 37 99 jsr ?20
		1773	4210 F89934 4C 77 95 jmp stop
		1774	4211
		1775	4212 F89937 A9 04 ?20: lda #CMDSENSEST ; sense status
		1776	4213 F89939 20 9A 9B jsr sendto
		1777	4214 F8993C A9 00 lda #0 ; drive
		1778	4215 F8993E 20 9A 9B jsr sendto
		1779	4216 F89941 20 D0 9B jsr waitres ; get result
		1780	4217 F89944 A5 A4 lda fdcres ; get ST3
		1781	4218 F89946 18 clc
		1782	4219 F89947 60 rts
		1783	4220
		1784	4221 ; read first valid ID in current track, head = 0
		1785	4222 ; if current track is not valid ($FF) seek to track 0
		1786	4223 ; out: CF=1 if error, A=error code
		1787	4224 ; A&Y destroyed, X preserved
		1788	4225 F89948 readid:
		1789	4226 F89948 A5 47 lda fdctrk
		1790	4227 F8994A C9 FF cmp #$FF
		1791	4228 F8994C D0 07 bne ?02
		1792	4229 F8994E A0 00 ldy #0
		1793	4230 F89950 20 C6 99 jsr seek
		1794	4231 F89953 B0 3F bcs chk
		1795	4232 F89955 A9 4A ?02: lda #CMDREADID
		1796	4233 F89957 20 9A 9B jsr sendto
		1797	4234 F8995A A9 00 lda #0 ; head + drive (head = 0)
		1798	4235 F8995C 20 9A 9B jsr sendto
		1799	Tue Jul 17 11:00:16 2018 Page 30
		1800
		1801
		1802
		1803
		1804	4236 F8995F
		1805	4237 ; wait phase result after read/write/format/read ID and check result
		1806	4238 ; out: CF=1 if error, A=error code
		1807	4239 ; A&Y destroyed, X preserved
		1808	4240 F8995F chkres:
		1809	4241 F8995F 20 20 9C jsr waitint ; wait interrupt
		1810	4242 F89962 chkres2:
		1811	4243 F89962 20 D0 9B jsr waitres ; get result
		1812	4244 F89965 A5 A4 lda fdcres ; test ST0
		1813	4245 F89967 29 C0 and #11000000B
		1814	4246 F89969 F0 29 beq chk ; here CF = 0 - result ok
		1815	4247 F8996B C9 40 cmp #01000000B
		1816	4248 F8996D D0 21 bne ?10 ; bad controller
		1817	4249 F8996F 18 clc ; no error
		1818	4250 F89970 A5 A5 lda fdcres+1 ; test ST1
		1819	4251 F89972 30 20 bmi chk ; 7 -> end of track, no error
		1820	4252 F89974 0A asl a ; skip bit 7
		1821	4253 F89975 0A asl a ; 6 -> skip
		1822	4254 F89976 0A asl a
		1823	4255 F89977 A0 09 ldy #FDC_DATACRC
		1824	4256 F89979 B0 18 bcs ?20 ; 5 -> CRC error
		1825	4257 F8997B 0A asl a
		1826	4258 F8997C A0 08 ldy #FDC_DLOSS
		1827	4259 F8997E B0 13 bcs ?20 ; 4 -> data loss
		1828	4260 F89980 0A asl a
		1829	4261 F89981 0A asl a
		1830	4262 F89982 A0 0A ldy #FDC_NOID
		1831	4263 F89984 B0 0D bcs ?20 ; 2 -> ID not found
		1832	4264 F89986 0A asl a
		1833	4265 F89987 A0 0B ldy #FDC_WP
		1834	4266 F89989 B0 08 bcs ?20 ; 1 -> write protect
		1835	4267 F8998B 0A asl a
		1836	4268 F8998C A0 0C ldy #FDC_MARK
		1837	4269 F8998E B0 03 bcs ?20 ; 0 -> mark address
		1838	4270 F89990 A0 01 ?10: ldy #FDC_BAD ; bad controller
		1839	4271 F89992 38 sec
		1840	4272 F89993 98 ?20: tya ; A=error code
		1841	4273 F89994 60 chk: rts
		1842	4274
		1843	4275 ;---------------------------------------------------------------------------
		1844	4276 ; drive seek routines
		1845	4277 ;---------------------------------------------------------------------------
		1846	4278
		1847	4279 ; recalibrate drive if need and move head in track 0 with a double step seek
		1848	4280 ; this routine should be called if bit 6 of fdcdrv is 0 as after a reset
		1849	4281 ; out: CF=1 if error, A=error code
		1850	4282 ; A&Y destroyed, X preserved
		1851	4283 F89995 seek0:
		1852	4284 ;jsr restore
		1853	4285 ;bcs ?20
		1854	4286 ;stz fdctrk ; store current track (=0)
		1855	4287 ;lda #$40
		1856	4288 ;trb fdcctl ; reset flag restore: done
		1857	4289 F89995 A0 01 ldy #1 ; seek track 1
		1858	4290 F89997 20 C6 99 jsr seek ; and recalibrate if need
		1859	4291 F8999A B0 0B bcs ?10 ; error
		1860	4292 F8999C A0 00 ldy #0 ; seek track 0
		1861	Tue Jul 17 11:00:16 2018 Page 31
		1862
		1863
		1864
		1865
		1866	4293 F8999E 20 C6 99 jsr seek
		1867	4294 F899A1 B0 04 bcs ?10
		1868	4295 F899A3 A9 40 lda #$40 ; set bit 6 of fdcdrv
		1869	4296 F899A5 04 44 tsb fdcdrv
		1870	4297 F899A7 60 ?10: rts
		1871	4298 F899A8 A2 00 ?20: ldx #0
		1872	4299 F899AA A4 47 ldy fdctrk
		1873	4300 F899AC A5 FF lda $ff
		1874	4301 F899AE 00 00 brk
		1875	4302 F899B0 EA nop
		1876	4303 F899B1 EA nop
		1877	4304 F899B2 A2 01 ?30: ldx #1
		1878	4305 F899B4 A4 47 ldy fdctrk
		1879	4306 F899B6 A5 FF lda $ff
		1880	4307 F899B8 00 00 brk
		1881	4308 F899BA EA nop
		1882	4309 F899BB EA nop
		1883	4310 F899BC A2 02 ?40: ldx #2
		1884	4311 F899BE A4 47 ldy fdctrk
		1885	4312 F899C0 A5 FF lda $ff
		1886	4313 F899C2 00 00 brk
		1887	4314 F899C4 EA nop
		1888	4315 F899C5 EA nop
		1889	4316 F899C6
		1890	4317 ; move head in track Y & recalibrate drive if need
		1891	4318 ; in: Y=track
		1892	4319 ; A destroyed, X&Y preserved
		1893	4320 F899C6 seek:
		1894	4321 ;bit $FD2a
		1895	4322 ;bpl ?00
		1896	4323 ;lda !FDCDATA
		1897	4324
		1898	4325 F899C6 ?00:
		1899	4326
		1900	4327 F899C6 24 46 bit fdcctl ; test bit 6: need restore?
		1901	4328 F899C8 50 0F bvc ?04 ; no
		1902	4329 F899CA 20 31 9A jsr restore ; recalibrate drive
		1903	4330 F899CD B0 31 bcs ?10 ; error - exit
		1904	4331 F899CF 64 47 stz fdctrk ; store current track (=0)
		1905	4332 F899D1 A9 40 lda #$40
		1906	4333 F899D3 14 46 trb fdcctl ; reset flag restore: done
		1907	4334 F899D5 C0 00 cpy #0 ; requested track=0 ?
		1908	4335 F899D7 F0 21 beq ?06 ; yes, exit after a while
		1909	4336 F899D9 C4 47 ?04: cpy fdctrk ; already in the desidered track ?
		1910	4337 F899DB F0 1D beq ?06 ; yes, exit
		1911	4338 F899DD A9 0F lda #CMDSEEK ; send seek command
		1912	4339 F899DF 20 96 9B jsr sndto2
		1913	4340 F899E2 B0 17 bcs ?08
		1914	4341 F899E4 A9 00 lda #0 ; drive
		1915	4342 F899E6 20 96 9B jsr sndto2
		1916	4343 F899E9 B0 10 bcs ?08
		1917	4344 F899EB 98 tya ; track
		1918	4345 F899EC 85 47 sta fdctrk
		1919	4346 F899EE 20 96 9B jsr sndto2
		1920	4347 F899F1 B0 08 bcs ?08
		1921	4348 F899F3 A9 07 lda #FDC_SEEK ; error seek ?
		1922	4349 F899F5 20 46 9A jsr wseek ; wait result
		1923	Tue Jul 17 11:00:16 2018 Page 32
		1924
		1925
		1926
		1927
		1928	4350 F899F8 B0 01 bcs ?08
		1929	4351 F899FA 18 ?06: clc
		1930	4352 F899FB 20 09 9A ?08: jsr ?20
		1931	4353 F899FE 90 08 bcc ?12
		1932	4354 F89A00 85 B9 ?10: sta tmpa
		1933	4355 F89A02 A9 FF lda #$FF ; invalidate current track
		1934	4356 F89A04 85 47 sta fdctrk
		1935	4357 F89A06 A5 B9 lda tmpa
		1936	4358 F89A08 60 ?12: rts
		1937	4359
		1938	4360 ; 10ms delay
		1939	4361 F89A09 08 ?20: php
		1940	4362 F89A0A 48 pha
		1941	4363 F89A0B A9 20 lda #$20 ; T2 count PHI2 pulses
		1942	4364 F89A0D 1C 0B FD trb VIA0+VIAACR
		1943	4365 F89A10 A9 40 lda #<T10MS
		1944	4366 F89A12 8D 08 FD sta VIA0+VIAT2CL
		1945	4367 F89A15 A9 9C lda #>T10MS
		1946	4368 F89A17 8D 09 FD sta VIA0+VIAT2CH
		1947	4369 F89A1A ?22: TASKSW
		1948	4370 F89A1A 02 00 cop FN_TASKSW
		1949	4371 F89A1C 00 .DB $00
		1950	4372 .MNLIST
		1951	4373 F89A1D AD 0D FD lda VIA0+VIAIFR
		1952	4374 F89A20 89 20 bit #T2IFRB
		1953	4375 F89A22 F0 F6 beq ?22
		1954	4376 F89A24 68 pla
		1955	4377 F89A25 28 plp
		1956	4378 F89A26 60 rts
		1957	4379
		1958	4380 F89A27 A2 FF ?40: ldx #$FF
		1959	4381 F89A29 A5 FF lda $ff
		1960	4382 F89A2B A4 47 ldy fdctrk
		1961	4383 F89A2D 00 00 brk
		1962	4384 F89A2F EA nop
		1963	4385 F89A30 EA nop
		1964	4386 F89A31
		1965	4387 ; causes the read/write head within the FDD to retract in the track 0 position
		1966	4388 ; out: CF=1 if error, A=error code
		1967	4389 ; A destroyed, X&Y preserved
		1968	4390 F89A31 restore:
		1969	4391 F89A31 20 36 9A jsr ?10 ; ricalibrate: first step
		1970	4392 F89A34 90 45 bcc wsk ; no double step need
		1971	4393 ; if error, need one step more
		1972	4394 F89A36 A9 07 ?10: lda #CMDRECAL ; ricalibrate command
		1973	4395 F89A38 20 96 9B jsr sndto2
		1974	4396 F89A3B B0 3E bcs wsk ; error
		1975	4397 F89A3D A9 00 lda #0 ; drive
		1976	4398 F89A3F 20 96 9B jsr sndto2
		1977	4399 F89A42 B0 37 bcs wsk ; error
		1978	4400 F89A44 A9 06 lda #FDC_FAULT ; restore error ?
		1979	4401
		1980	4402 ; wait result phase after seek/recalibrate command
		1981	4403 ; in: A=error code FDC_FAULT or FDC_SEEK
		1982	4404 ; out: CF=1 if error, A=error code
		1983	4405 ; A,X,Y preserved
		1984	4406 F89A46 wseek:
		1985	Tue Jul 17 11:00:16 2018 Page 33
		1986
		1987
		1988
		1989
		1990	4407 F89A46 85 B9 sta tmpa ; save error code
		1991	4408 F89A48 20 6E 9A jsr ?20 ; sense interrupt
		1992	4409 F89A4B B0 2E bcs wsk ; return pending error
		1993	4410 F89A4D A5 A4 ?01: lda fdcres ; test result status
		1994	4411 F89A4F 85 FF sta $FF
		1995	4412 F89A51 C9 80 cmp #$80
		1996	4413 F89A53 F0 0B beq ?30
		1997	4414 F89A55 29 60 and #01100000B
		1998	4415 F89A57 C9 60 cmp #01100000B
		1999	4416 F89A59 38 sec
		2000	4417 F89A5A F0 01 beq ?10 ; restore/seek error
		2001	4418 F89A5C 18 clc ; no error
		2002	4419 F89A5D A5 B9 ?10: lda tmpa
		2003	4420 F89A5F 60 rts
		2004	4421
		2005	4422 F89A60 AD 2A FD ?30: lda !$FD2A
		2006	4423 F89A63 85 FD sta $fd
		2007	4424 F89A65 10 F9 bpl ?30
		2008	4425 F89A67 20 71 9A jsr ?21
		2009	4426 F89A6A B0 0F bcs wsk
		2010	4427 ;lda !VIA0+VIAPRB
		2011	4428 F89A6C 80 DF bra ?01
		2012	4429 F89A6E
		2013	4430 ; wait result phase after sensing interrupt
		2014	4431 F89A6E 20 20 9C ?20: jsr waitint ; wait interrupt within timeout
		2015	4432 F89A71 A9 08 ?21: lda #CMDSENSEINT ; sense interrupt
		2016	4433 F89A73 20 9A 9B jsr sendto
		2017	4434 F89A76 64 A4 stz fdcres
		2018	4435 F89A78 20 D0 9B jsr waitres ; wait result phase
		2019	4436 F89A7B 60 wsk: rts
		2020	4437
		2021	4438 ;---------------------------------------------------------------------------
		2022	4439 ; low level controller routines
		2023	4440 ;---------------------------------------------------------------------------
		2024	4441
		2025	4442 ; dma setup on channel 2 for a transfer cycle
		2026	4443 ; in: X=transfer buffer low pointer
		2027	4444 ; Y=transfer buffer high pointer
		2028	4445 ; A=transfer buffer bank
		2029	4446 ; B=dma mode transfer
		2030	4447 ; ncnt=bytes to transfer count #
		2031	4448 F89A7C dmaset:
		2032	4449 F89A7C 48 pha
		2033	4450 F89A7D 64 F0 stz <$f0
		2034	4451 F89A7F 64 F1 stz <$f1
		2035	4452 F89A81 A9 01 lda #$01
		2036	4453 F89A83 1C 0F FD trb VIA0+VIAPRANH ; DMA X16=0 (bank 2)
		2037	4454 F89A86 A9 02 lda #2
		2038	4455 F89A88 0C 00 FD tsb VIA0+VIAPRB
		2039	4456 F89A8B 68 pla
		2040	4457 F89A8C 29 01 and #$01 ; mask bit 0
		2041	4458 F89A8E F0 05 beq ?02 ; transfer buffer is in bank 2
		2042	4459 F89A90 A9 01 lda #$01
		2043	4460 F89A92 0C 0F FD tsb VIA0+VIAPRANH ; DMA X16=1 (bank 3)
		2044	4461 F89A95 ?02:
		2045	4462 F89A95 A9 07 lda #$07
		2046	4463 F89A97 1C CF FD trb VIA3+VIAPRANH
		2047	Tue Jul 17 11:00:16 2018 Page 34
		2048
		2049
		2050
		2051
		2052	4464 F89A9A
		2053	4465 ;lda #01011000B
		2054	4466 F89A9A A9 00 lda #0
		2055	4467 F89A9C 8D C0 FD sta !VIA3+VIAPRB
		2056	4468
		2057	4469 F89A9F 78 sei
		2058	4470 F89AA0 8F 9D FD 00 sta >DMAWMCLR
		2059	4471 F89AA4 EA nop
		2060	4472 F89AA5 EA nop
		2061	4473 F89AA6 EA nop
		2062	4474 F89AA7 EA nop
		2063	4475 F89AA8 AF 98 FD 00 lda >DMASR ; clear status flag
		2064	4476 F89AAC EA nop
		2065	4477 F89AAD EA nop
		2066	4478 F89AAE A9 00 lda #$00
		2067	4479 F89AB0 8F 98 FD 00 sta >DMAWCMD
		2068	4480 F89AB4 EA nop
		2069	4481 F89AB5 EA nop
		2070	4482 F89AB6 8F 9D FD 00 sta >DMAWMCLR
		2071	4483 F89ABA EA nop
		2072	4484 F89ABB EA nop
		2073	4485 F89ABC A9 06 lda #$06
		2074	4486 F89ABE EA nop
		2075	4487 F89ABF 8F 9A FD 00 sta >DMAWMSKB ; mask off bit channel 2
		2076	4488 F89AC3 EA nop
		2077	4489 F89AC4 EB xba ; A=transfer mode
		2078	4490 F89AC5 8F 9B FD 00 sta >DMAMODE ; set DMA transfer mode
		2079	4491 F89AC9 85 F2 sta <$f2
		2080	4492 F89ACB
		2081	4493 F89ACB EA nop
		2082	4494 F89ACC 8F 9C FD 00 ?06: sta >DMAWCLRFF ; clear F/F
		2083	4495 F89AD0 E6 F0 inc <$f0
		2084	4496 F89AD2 EA nop
		2085	4497 F89AD3 EA nop
		2086	4498 F89AD4 8A txa
		2087	4499 F89AD5 8F 94 FD 00 sta >DMAC+DMAADDR2 ; store low buffer address
		2088	4500 F89AD9 EA nop
		2089	4501 F89ADA EA nop
		2090	4502 F89ADB 98 tya
		2091	4503 F89ADC 8F 94 FD 00 sta >DMAC+DMAADDR2 ; store high buffer address
		2092	4504 F89AE0 EA nop
		2093	4505 F89AE1 8F 9C FD 00 sta >DMAWCLRFF ; clear F/F
		2094	4506 F89AE5 EA nop
		2095	4507 F89AE6 EA nop
		2096	4508 F89AE7 8A txa
		2097	4509 F89AE8 CF 94 FD 00 cmp >DMAC+DMAADDR2 ; cmp low buffer address
		2098	4510 F89AEC D0 DE bne ?06
		2099	4511 F89AEE 98 tya
		2100	4512 F89AEF CF 94 FD 00 cmp >DMAC+DMAADDR2 ; cmp high buffer address
		2101	4513 F89AF3 D0 D7 bne ?06
		2102	4514 F89AF5 ACC16
		2103	4515 F89AF5 C2 20 rep #PMFLAG
		2104	4516 .LONGA on
		2105	4517 .MNLIST
		2106	4518 F89AF7 A5 94 lda ncnt
		2107	4519 F89AF9 3A dec a ; DMA count=ncnt-1
		2108	4520 F89AFA 48 pha
		2109	Tue Jul 17 11:00:16 2018 Page 35
		2110
		2111
		2112
		2113
		2114	4521 F89AFB ACC08
		2115	4522 F89AFB E2 20 sep #PMFLAG
		2116	4523 .LONGA off
		2117	4524 .MNLIST
		2118	4525 F89AFD FA plx ; X=low count
		2119	4526 F89AFE 7A ply ; Y=high count
		2120	4527 F89AFF 8F 9C FD 00 ?08: sta >DMAWCLRFF ; clear F/F
		2121	4528 F89B03 E6 F1 inc <$f1
		2122	4529 F89B05 EA nop
		2123	4530 F89B06 EA nop
		2124	4531 F89B07 8A txa
		2125	4532 F89B08 8F 95 FD 00 sta >DMAC+DMACNT2 ; store low count
		2126	4533 F89B0C EA nop
		2127	4534 F89B0D EA nop
		2128	4535 F89B0E 98 tya
		2129	4536 F89B0F 8F 95 FD 00 sta >DMAC+DMACNT2 ; store high count
		2130	4537 F89B13 EA nop
		2131	4538 F89B14 8F 9C FD 00 sta >DMAWCLRFF ; clear F/F
		2132	4539 F89B18 EA nop
		2133	4540 F89B19 EA nop
		2134	4541 F89B1A 8A txa
		2135	4542 F89B1B CF 95 FD 00 cmp >DMAC+DMACNT2 ; cmp low count
		2136	4543 F89B1F D0 DE bne ?08
		2137	4544 F89B21 98 tya
		2138	4545 F89B22 CF 95 FD 00 cmp >DMAC+DMACNT2 ; cmp high count
		2139	4546 F89B26 D0 D7 bne ?08
		2140	4547 F89B28 8F 9C FD 00 sta >DMAWCLRFF ; clear F/F
		2141	4548 F89B2C A9 02 lda #$02
		2142	4549 F89B2E EA nop
		2143	4550 F89B2F EA nop
		2144	4551 F89B30 8F 9A FD 00 sta >DMAWMSKB ; un-mask bit channel 2
		2145	4552 F89B34 A9 08 lda #$08
		2146	4553 F89B36 04 46 tsb fdcctl ; set bit 3
		2147	4554 F89B38 58 cli
		2148	4555 F89B39 60 rts
		2149	4556
		2150	4557 ; reset controller FDC after boot or for recovering after error
		2151	4558 ; motor status as in current fdcctl bit 4
		2152	4559 ; after reset restore flag (bit 6) in fdcctl are set
		2153	4560 ; and drive status will be cleared
		2154	4561 ; out: CF=1 if error, A=error code
		2155	4562 ; fdcctl<6:5> set/reset
		2156	4563 ; registers: A&Y destroyed, X preserved
		2157	4564 F89B3A fdcrst:
		2158	4565 F89B3A 08 php ; save I status
		2159	4566 F89B3B 78 sei ; disable interrupt
		2160	4567 F89B3C 2C 00 FD bit VIA0+VIAPRB ; reset flag CB1
		2161	4568 F89B3F 64 48 stz fdcerr
		2162	4569 F89B41 A9 20 lda #$20
		2163	4570 F89B43 14 46 trb fdcctl ; reset flag FDC
		2164	4571 F89B45 A9 40 lda #$40
		2165	4572 F89B47 04 46 tsb fdcctl ; force restore
		2166	4573 F89B49 64 44 stz fdcdrv ; invalidate drive
		2167	4574 F89B4B A5 46 lda fdcctl
		2168	4575 F89B4D 29 10 and #00010000B ; mask on motor bit
		2169	4576 F89B4F 09 08 ora #00001000B ; enable FDC interrupt&dma, reset FDC
		2170	4577 F89B51 8F DA FD 00 sta >FDCDOR ; reset controller
		2171	Tue Jul 17 11:00:16 2018 Page 36
		2172
		2173
		2174
		2175
		2176	4578 F89B55 EA nop
		2177	4579 F89B56 EA nop
		2178	4580 F89B57 EA nop
		2179	4581 F89B58 EA nop
		2180	4582 F89B59 2C 00 FD bit VIA0+VIAPRB ; reset flag CB1
		2181	4583 F89B5C EA nop
		2182	4584 F89B5D EA nop
		2183	4585 F89B5E EA nop
		2184	4586 F89B5F EA nop
		2185	4587 F89B60 09 0C ora #00001100B ; enable controller
		2186	4588 F89B62 8F DA FD 00 sta >FDCDOR ; this write cause interrupt from FDC
		2187	4589 F89B66 28 plp ; restore I flag
		2188	4590 F89B67 20 20 9C jsr waitint ; wait interrupt within timeout
		2189	4591 F89B6A
		2190	4592 ; controller reply to sense interrupt command
		2191	4593 ; with 4 status bytes: $C0, $C1, $C2, $C3
		2192	4594 F89B6A
		2193	4595 F89B6A A0 C0 ldy #$C0 ; first expected status
		2194	4596 F89B6C A9 08 ?01: lda #CMDSENSEINT
		2195	4597 F89B6E 20 9A 9B jsr sendto ; sense interrupt
		2196	4598 F89B71 20 D0 9B jsr waitres ; result phase (normally 2 bytes)
		2197	4599 F89B74 C4 A4 cpy fdcres ; check first byte result
		2198	4600 F89B76 F0 04 beq ?03 ; ok, as expected
		2199	4601 F89B78 38 sec ; controller error
		2200	4602 F89B79 A9 01 lda #FDC_BAD ; bad controller error
		2201	4603 F89B7B 60 rts
		2202	4604 F89B7C C8 ?03: iny
		2203	4605 F89B7D C0 C4 cpy #$C4 ; last expected result is $C3
		2204	4606 F89B7F 90 EB bcc ?01 ; loop
		2205	4607 F89B81 A9 20 lda #$20
		2206	4608 F89B83 04 46 tsb fdcctl ; flag controller FDC OK
		2207	4609 F89B85 A5 46 lda fdcctl
		2208	4610 F89B87 20 BB 9C jsr setrate ; select current rate
		2209	4611 F89B8A A9 03 lda #CMDSPECIFY
		2210	4612 F89B8C 20 9A 9B jsr sendto ; setup standard controller
		2211	4613 F89B8F A9 DF lda #UM_SRTHUT
		2212	4614 F89B91 20 9A 9B jsr sendto
		2213	4615 F89B94 A9 02 lda #UM_HLTND ; send command to FDC
		2214	4616
		2215	4617 ; like sendto but always return to the caller, even if error
		2216	4618 F89B96 sndto2:
		2217	4619 F89B96 20 9A 9B jsr sendto
		2218	4620 F89B99 60 rts
		2219	4621
		2220	4622 ; send command to controller within SNDTMO timeout
		2221	4623 ; in: A=command
		2222	4624 ; out: CF=1 if error, A=error code
		2223	4625 ; A,X,Y preserved (if error A will be destroyed)
		2224	4626 ; if error, return address from stack will be pulled out and discarded
		2225	4627 F89B9A sendto:
		2226	4628 F89B9A 85 B9 sta tmpa
		2227	4629 F89B9C 20 E8 9D jsr wait16us ; 16uS delay safety
		2228	4630 F89B9F A9 20 lda #$20 ; T2 count PB6 pulses (1ms)
		2229	4631 F89BA1 0C 0B FD tsb VIA0+VIAACR
		2230	4632 F89BA4 A9 D0 lda #<SNDTMO ; timeout send byte
		2231	4633 F89BA6 8D 08 FD sta !VIA0+VIAT2CL
		2232	4634 F89BA9 A9 07 lda #>SNDTMO
		2233	Tue Jul 17 11:00:16 2018 Page 37
		2234
		2235
		2236
		2237
		2238	4635 F89BAB 8D 09 FD sta !VIA0+VIAT2CH
		2239	4636 F89BAE AF DC FD 00 ?02: lda >FDCMSR ; read FDC status
		2240	4637 F89BB2 29 C0 and #$C0 ; mask bit 7,6
		2241	4638 F89BB4 C9 80 cmp #$80 ; bit 6 will be 0
		2242	4639 F89BB6 F0 0D beq ?03 ; FDCcan accept data within timeout
		2243	4640 F89BB8 A9 20 lda #T2IFRB
		2244	4641 F89BBA 2C 0D FD bit VIA0+VIAIFR ; test timeout
		2245	4642 F89BBD F0 EF beq ?02 ; no timeout
		2246	4643 F89BBF 68 pla ; pull out return address...
		2247	4644 F89BC0 68 pla ; ...and discard it
		2248	4645 F89BC1 A9 02 lda #FDC_SNDTOUT ; timeout error
		2249	4646 F89BC3 38 sec ; error
		2250	4647 F89BC4 60 rts
		2251	4648 F89BC5 20 E8 9D ?03: jsr wait16us ; 16uS delay before to access data register
		2252	4649 F89BC8 A5 B9 lda tmpa
		2253	4650 F89BCA 8F DD FD 00 sta >FDCDATA ; send byte to controller
		2254	4651 F89BCE 18 clc
		2255	4652 F89BCF 60 rts
		2256	4653 F89BD0
		2257	4654 ; wait result phase from FDC within RESTMO timeout
		2258	4655 ; out: CF=1 if result phase error, A=error code
		2259	4656 ; A destroyed, X&Y preserved
		2260	4657 ; if error, return address from stack will be pulled out and discarded
		2261	4658 F89BD0 waitres:
		2262	4659 F89BD0 86 BA stx tmpx ; save X
		2263	4660 F89BD2 20 E8 9D jsr wait16us ; safety delay of 16uS
		2264	4661 F89BD5 A2 00 ldx #0 ; index for store 7 bytes of result
		2265	4662 F89BD7 A9 20 lda #$20 ; T2 count PB6 pulses (1ms)
		2266	4663 F89BD9 0C 0B FD tsb VIA0+VIAACR
		2267	4664 F89BDC A9 C4 ?00: lda #<RESTMO ; setup result phase timeout
		2268	4665 F89BDE 8D 08 FD sta !VIA0+VIAT2CL
		2269	4666 F89BE1 A9 09 lda #>RESTMO
		2270	4667 F89BE3 8D 09 FD sta !VIA0+VIAT2CH
		2271	4668 F89BE6 AF DC FD 00 ?01: lda >FDCMSR ; read status reg. of FDC
		2272	4669 F89BEA 29 C0 and #$C0 ; mask bit 7,6
		2273	4670 F89BEC C9 C0 cmp #$C0 ; bit 6 will be 1 when CPU can read FDC
		2274	4671 F89BEE F0 0F beq ?03 ; data ready within timeout
		2275	4672 F89BF0 A9 20 lda #T2IFRB
		2276	4673 F89BF2 2C 0D FD bit VIA0+VIAIFR ; test timeout
		2277	4674 F89BF5 F0 EF beq ?01 ; no timeout
		2278	4675 F89BF7 A9 03 lda #FDC_RESTOUT ; set timeout result phase error
		2279	4676 F89BF9 FA ?02: plx ; pull out return address...
		2280	4677 F89BFA FA plx ; ...and discard it
		2281	4678 F89BFB A6 BA ldx tmpx ; restore X
		2282	4679 F89BFD 38 sec ; error
		2283	4680 F89BFE 60 rts ; exit
		2284	4681 F89BFF 20 E8 9D ?03: jsr wait16us ; 16uS delay before to read data register
		2285	4682 F89C02 AF DD FD 00 lda >FDCDATA ; read FDC data register
		2286	4683 F89C06 95 A4 sta fdcres,x ; store byte
		2287	4684 F89C08 20 E8 9D jsr wait16us ; 16uS delay before to read status register
		2288	4685 F89C0B AF DC FD 00 lda >FDCMSR ; test bit 4 (busy)
		2289	4686 F89C0F 89 10 bit #00010000B
		2290	4687 F89C11 F0 09 beq ?05 ; no more bytes
		2291	4688 F89C13 E8 inx
		2292	4689 F89C14 E0 07 cpx #7 ; max. 7 bytes in result phase
		2293	4690 F89C16 90 C4 bcc ?00 ; loop next byte
		2294	4691 F89C18 A9 05 lda #FDC_BADRES ; too many bytes
		2295	Tue Jul 17 11:00:16 2018 Page 38
		2296
		2297
		2298
		2299
		2300	4692 F89C1A D0 DD bne ?02 ; error
		2301	4693 F89C1C A6 BA ?05: ldx tmpx
		2302	4694 F89C1E 18 clc ; OK
		2303	4695 F89C1F 60 rts
		2304	4696
		2305	4697 ; wait interrupt from UM8388 within INTTMO timeout
		2306	4698 ; out: CF=1 if timeout error, A=error code
		2307	4699 ; A destroyed, X&Y preserved
		2308	4700 ; if error, return address from stack will be pulled out and discarded
		2309	4701 F89C20 waitint:
		2310	4702 F89C20 A9 20 lda #$20 ; T2 count PB6 pulses (1ms)
		2311	4703 F89C22 0C 0B FD tsb VIA0+VIAACR
		2312	4704 F89C25 A9 C4 lda #<INTTMO ; interrupt timeout
		2313	4705 F89C27 8D 08 FD sta !VIA0+VIAT2CL
		2314	4706 F89C2A A9 09 lda #>INTTMO
		2315	4707 F89C2C 8D 09 FD sta !VIA0+VIAT2CH
		2316	4708 F89C2F AF 0D FD 00 ?02: lda >VIA0+VIAIFR
		2317	4709 F89C33 89 10 bit #CB1IFRB ; CB1 -> positive edge INT from FDC
		2318	4710 F89C35 D0 0C bne ?04 ; INT within timeout
		2319	4711
		2320	4712 F89C37 89 20 bit #T2IFRB ; test timeout
		2321	4713 F89C39 F0 F4 beq ?02 ; no timeout
		2322	4714 F89C3B 38 sec ; error
		2323	4715 F89C3C 68 pla ; pull out return address...
		2324	4716 F89C3D 68 pla ; ...and discard it
		2325	4717 F89C3E A9 04 lda #FDC_INTTOUT ; set timeout error
		2326	4718 F89C40 85 FE sta $fe
		2327	4719 F89C42
		2328	4720 F89C42 60 rts
		2329	4721 F89C43 2C 00 FD ?04: bit VIA0+VIAPRB ; clear flag CB1
		2330	4722 F89C46 A9 02 lda #$02 ; enable CPU bus
		2331	4723 F89C48 0C 0F FD tsb VIA0+VIAPRANH ; PA1 -> /DME = 1
		2332	4724 F89C4B A9 08 lda #$08
		2333	4725 F89C4D 14 46 trb fdcctl ; reset dma active bit
		2334	4726 F89C4F 18 clc ; no error
		2335	4727 F89C50
		2336	4728 F89C50 60 rts
		2337	4729
		2338	4730 F89C51 chkres3:
		2339	4731 F89C51 20 57 9C jsr waitint3
		2340	4732 F89C54 4C 62 99 jmp chkres2
		2341	4733
		2342	4734 F89C57 waitint3:
		2343	4735 F89C57 A9 10 lda #CB1IFRB
		2344	4736 F89C59 8D CD FD sta !VIA3+VIAIFR
		2345	4737 F89C5C 64 F4 stz <$f4
		2346	4738 F89C5E 64 F5 stz <$f5
		2347	4739 F89C60 64 F6 stz <$f6
		2348	4740 F89C62 64 F7 stz <$f7
		2349	4741 F89C64 A2 00 ldx #0
		2350	4742 F89C66 9B txy
		2351	4743 F89C67 A9 10 lda #$10
		2352	4744 F89C69 0C CC FD tsb VIA3+VIAPCR
		2353	4745 F89C6C 78 sei
		2354	4746 F89C6D INDEX16
		2355	4747 F89C6D C2 10 rep #PXFLAG
		2356	4748 .LONGI on
		2357	Tue Jul 17 11:00:16 2018 Page 39
		2358
		2359
		2360
		2361
		2362	4749 .MNLIST
		2363	4750 F89C6F ?02:
		2364	4751 F89C6F A9 10 lda #CB1IFRB
		2365	4752 F89C71 ?03:
		2366	4753 F89C71 2C CD FD bit !VIA3+VIAIFR
		2367	4754 F89C74 F0 04 beq ?04
		2368	4755 F89C76 2C C0 FD bit !VIA3+VIAPRB
		2369	4756 F89C79 C8 iny
		2370	4757
		2371	4758 F89C7A ?04:
		2372	4759 F89C7A 2C 0D FD bit !VIA0+VIAIFR
		2373	4760 ;bit #CB1IFRB ; CB1 -> positive edge INT from FDC
		2374	4761 F89C7D F0 F2 beq ?03
		2375	4762
		2376	4763 ;bne ?10 ; INT within timeout
		2377	4764
		2378	4765 ;bit !VIA3+VIAIFR
		2379	4766 ;beq ?03
		2380	4767 ;bit !VIA3+VIAPRB
		2381	4768 ;iny
		2382	4769 ;bra ?03
		2383	4770
		2384	4771 F89C7F 2C 00 FD ?10: bit VIA0+VIAPRB ; clear flag CB1
		2385	4772
		2386	4773 F89C82 A2 00 00 ldx #$00
		2387	4774 F89C85 ?11:
		2388	4775 F89C85 2C CD FD bit !VIA3+VIAIFR
		2389	4776 F89C88 F0 04 beq ?11a
		2390	4777 F89C8A 2C C0 FD bit !VIA3+VIAPRB
		2391	4778 F89C8D C8 iny
		2392	4779
		2393	4780 F89C8E ?11a:
		2394	4781 F89C8E CA dex
		2395	4782 F89C8F D0 F4 bne ?11
		2396	4783
		2397	4784 F89C91 A2 00 00 ldx #$00
		2398	4785 F89C94 ?11c:
		2399	4786 F89C94 2C CD FD bit !VIA3+VIAIFR
		2400	4787 F89C97 F0 04 beq ?11d
		2401	4788 F89C99 2C C0 FD bit !VIA3+VIAPRB
		2402	4789 F89C9C C8 iny
		2403	4790
		2404	4791 F89C9D ?11d:
		2405	4792 F89C9D CA dex
		2406	4793 F89C9E D0 F4 bne ?11c
		2407	4794 F89CA0
		2408	4795 F89CA0 A9 02 lda #$02 ; enable CPU bus
		2409	4796 F89CA2 0C 0F FD tsb VIA0+VIAPRANH ; PA1 -> /DME = 1
		2410	4797 F89CA5 A9 08 lda #$08
		2411	4798 F89CA7 14 46 trb fdcctl ; reset dma active bit
		2412	4799 F89CA9 18 clc ; no error
		2413	4800
		2414	4801 F89CAA 2C CD FD bit !VIA3+VIAIFR
		2415	4802 F89CAD F0 04 beq ?12
		2416	4803 F89CAF 2C C0 FD bit !VIA3+VIAPRB
		2417	4804 F89CB2 C8 iny
		2418	4805 F89CB3 ?12:
		2419	Tue Jul 17 11:00:16 2018 Page 40
		2420
		2421
		2422
		2423
		2424	4806 F89CB3
		2425	4807 F89CB3 86 F4 stx <$f4
		2426	4808 F89CB5 84 F6 sty <$f6
		2427	4809 F89CB7 INDEX08
		2428	4810 F89CB7 E2 10 sep #PXFLAG
		2429	4811 .LONGI off
		2430	4812 .MNLIST
		2431	4813 F89CB9 58 cli
		2432	4814 F89CBA 60 rts
		2433	4815
		2434	4816 ; setup clock rate in controller
		2435	4817 ; in: A=$00(DD),=$02(HD)
		2436	4818 ; A destroyed, X&Y preserved
		2437	4819 F89CBB setrate:
		2438	4820 F89CBB 29 02 and #00000010B ; mask bit 1
		2439	4821 F89CBD F0 06 beq ?02 ; select DD
		2440	4822 F89CBF 04 46 tsb fdcctl ; select HD
		2441	4823 F89CC1 A9 00 lda #0 ; rate 500Kb/s
		2442	4824 F89CC3 F0 04 beq ?04 ; set rate
		2443	4825 F89CC5 A9 02 ?02: lda #00000010B ; rate 250Kb/s
		2444	4826 F89CC7 14 46 trb fdcctl
		2445	4827 F89CC9 8F DF FD 00 ?04: sta >FDCCCR ; set rate
		2446	4828 F89CCD 60 rts
		2447	4829
		2448	4830 ; enable motor and wait for spin-up timer expiration
		2449	4831 ; A destroyed, X&Y preserved
		2450	4832 F89CCE startmtr:
		2451	4833 F89CCE 78 sei ; disable IRQ
		2452	4834 F89CCF A9 30 lda #00110000B ; CNT0 mode 0 - 2 bytes
		2453	4835 F89CD1 8D 4B FD sta !CTC0+CTCCTRL ; CTC 0 stopped
		2454	4836 F89CD4 A9 08 lda #CB2IFRB ; spin-down timer stopped
		2455	4837 F89CD6 8D 0E FD sta VIA0+VIAIER ; clear IRQ CB2 (TMF0) from CNT0 CTC
		2456	4838 F89CD9 8D 0D FD sta VIA0+VIAIFR ; clear flag CB2
		2457	4839 F89CDC A9 10 lda #00010000B ; motor already on?
		2458	4840 F89CDE 24 46 bit fdcctl
		2459	4841 F89CE0 F0 02 beq ?04 ; no, put on
		2460	4842 F89CE2 58 cli ; yes - exit
		2461	4843 F89CE3 60 rts
		2462	4844 F89CE4 04 46 ?04: tsb fdcctl ; flag motor on
		2463	4845 F89CE6 09 0C ora #00001100B ; enable controller,IRQ,DMA,drive0
		2464	4846 F89CE8 8F DA FD 00 sta >FDCDOR ; select drive and motor
		2465	4847 F89CEC 58 cli
		2466	4848 F89CED A9 20 lda #$20 ; T2 count PB6 pulses (1ms)
		2467	4849 F89CEF 0C 0B FD tsb VIA0+VIAACR
		2468	4850 F89CF2 A9 B6 lda #<MOTACL ; spin-up delay
		2469	4851 F89CF4 8D 08 FD sta !VIA0+VIAT2CL
		2470	4852 F89CF7 A9 03 lda #>MOTACL
		2471	4853 F89CF9 8D 09 FD sta !VIA0+VIAT2CH
		2472	4854 F89CFC ?06: TASKSW ; task switch while wait timer expiration
		2473	4855 F89CFC 02 00 cop FN_TASKSW
		2474	4856 F89CFE 00 .DB $00
		2475	4857 .MNLIST
		2476	4858 F89CFF AD 0D FD lda !VIA0+VIAIFR ; loop spin-up
		2477	4859 F89D02 89 20 bit #T2IFRB
		2478	4860 F89D04 F0 F6 beq ?06
		2479	4861 F89D06 60 rts
		2480	4862 F89D07
		2481	Tue Jul 17 11:00:16 2018 Page 41
		2482
		2483
		2484
		2485
		2486	4863 ; set up motor spin-down timer
		2487	4864 ; this routine preserve CF
		2488	4865 ; A&X&Y preserved
		2489	4866 F89D07 stopmtr:
		2490	4867 F89D07 78 sei ; disable IRQ
		2491	4868 F89D08 A5 46 lda fdcctl
		2492	4869 F89D0A 89 10 bit #00010000B ; motor bit
		2493	4870 F89D0C F0 1C beq ?10 ; motor already off
		2494	4871 ; motor on -> setup spin-down timer
		2495	4872 F89D0E A9 30 lda #00110000B ; CNT0 mode 0 - 2 bytes
		2496	4873 F89D10 8D 4B FD sta !CTC0+CTCCTRL ; CTC 0 stopped
		2497	4874 F89D13 A9 08 lda #CB2IFRB
		2498	4875 F89D15 8D 0E FD sta !VIA0+VIAIER ; clear IRQ CB2 (TMF0) from CNT0
		2499	4876 F89D18 8D 0D FD sta !VIA0+VIAIFR ; clear flag CB2
		2500	4877 F89D1B A9 28 lda #<MOTDCL ; setup spin-down timer
		2501	4878 F89D1D 8D 48 FD sta !CTC0 ; CNT0
		2502	4879 F89D20 A9 0A lda #>MOTDCL
		2503	4880 F89D22 8D 48 FD sta !CTC0
		2504	4881 F89D25 A9 88 lda #(CB2IFRB.OR.$80)
		2505	4882 F89D27 8D 0E FD sta !VIA0+VIAIER ; enable interrupt on CB2
		2506	4883 F89D2A 58 ?10: cli
		2507	4884 F89D2B 60 rts
		2508	4885
		2509	4886 ; move dma buffer to safe area while verify data
		2510	4887 F89D2C savebuf:
		2511	4888 F89D2C A5 A3 lda verfp+2 ; the source bank
		2512	4889 F89D2E 8F 3F 9D F8 sta ?10+2 ; store source bank for mvn istruction
		2513	4890 F89D32 8B phb ; save data bank
		2514	4891 F89D33 CPU16
		2515	4892 F89D33 C2 30 rep #(PMFLAG.OR.PXFLAG)
		2516	4893 .LONGA on
		2517	4894 .LONGI on
		2518	4895 .MNLIST
		2519	4896 F89D35 A5 94 lda ncnt
		2520	4897 F89D37 3A dec a ; count #
		2521	4898 F89D38 A6 A1 ldx verfp ; source address
		2522	4899 F89D3A A0 00 40 ldy #!DMASAVE ; dest address
		2523	4900 F89D3D 54 01 00 ?10: mvn #0,#1 ; move to bank 1
		2524	4901 F89D40 CPU08
		2525	4902 F89D40 E2 30 sep #(PMFLAG.OR.PXFLAG)
		2526	4903 .LONGA off
		2527	4904 .LONGI off
		2528	4905 .MNLIST
		2529	4906 F89D42 AB plb ; restore data bank
		2530	4907 F89D43 60 rts
		2531	4908
		2532	4909 ; restore dma buffer from safe area
		2533	4910 F89D44 restbuf:
		2534	4911 F89D44 08 php ; save carry
		2535	4912 F89D45 48 pha ; save error code if any
		2536	4913 F89D46 A5 A3 lda verfp+2 ; the source bank
		2537	4914 F89D48 8F 58 9D F8 sta ?10+1 ; store dest bank for mvn istruction
		2538	4915 F89D4C 8B phb ; save data bank
		2539	4916 F89D4D CPU16
		2540	4917 F89D4D C2 30 rep #(PMFLAG.OR.PXFLAG)
		2541	4918 .LONGA on
		2542	4919 .LONGI on
		2543	Tue Jul 17 11:00:16 2018 Page 42
		2544
		2545
		2546
		2547
		2548	4920 .MNLIST
		2549	4921 F89D4F A5 94 lda ncnt
		2550	4922 F89D51 3A dec a ; count #
		2551	4923 F89D52 A2 00 40 ldx #!DMASAVE ; source address
		2552	4924 F89D55 A4 A1 ldy verfp ; dest address
		2553	4925 F89D57 54 00 01 ?10: mvn #1,#0 ; move from bank 1
		2554	4926 F89D5A CPU08
		2555	4927 F89D5A E2 30 sep #(PMFLAG.OR.PXFLAG)
		2556	4928 .LONGA off
		2557	4929 .LONGI off
		2558	4930 .MNLIST
		2559	4931 F89D5C AB plb ; restore data bank
		2560	4932 F89D5D 68 pla
		2561	4933 F89D5E 28 plp
		2562	4934 F89D5F 60 rts
		2563	4935
		2564	4936 ; check params for read/write
		2565	4937 ; out: CF=1 if error, A=error code
		2566	4938 F89D60 chkparms:
		2567	4939 F89D60 64 9E stz bufp ; always aligned at 512 bytes
		2568	4940 F89D62 64 A1 stz verfp
		2569	4941 F89D64 A9 FF lda #$FF
		2570	4942 F89D66 85 9B sta dtlstp ; standard for disk r/w
		2571	4943 F89D68 A6 B4 ldx fdop ; operation index
		2572	4944 F89D6A BF B7 A0 F8 lda >VDOPTAB,x
		2573	4945 F89D6E 85 B5 sta vdop ; ram disk operation
		2574	4946 F89D70 30 04 bmi ?02 ; write operation
		2575	4947 F89D72 A9 80 lda #$80
		2576	4948 F89D74 14 B6 trb opfg ; no verify for read
		2577	4949 F89D76 A6 B7 ?02: ldx dskfmt
		2578	4950 F89D78 BF A1 A0 F8 lda >MAXSECT,x
		2579	4951 F89D7C 85 B0 sta maxsect ; max. number of sectors/track + 1
		2580	4952 F89D7E A5 B6 lda opfg ; test required format
		2581	4953 F89D80 45 B7 eor dskfmt ; compare bit 0
		2582	4954 F89D82 29 01 and #$01 ; they will be the same
		2583	4955 F89D84 D0 56 bne ?20 ; mismatch format
		2584	4956 F89D86 24 B6 bit opfg ; test MT operation
		2585	4957 F89D88 50 0B bvc ?04 ; no MT
		2586	4958 F89D8A 64 AD stz head ; MT -> start head = 0
		2587	4959 F89D8C A2 01 ldx #1 ; MT -> start sector = 1
		2588	4960 F89D8E 86 AE stx sector
		2589	4961 F89D90 A6 B0 ldx maxsect ; MT -> SectNum = max. sectors
		2590	4962 F89D92 CA dex
		2591	4963 F89D93 86 AF stx sectnum
		2592	4964 F89D95 A5 AE ?04: lda sector ; start sector will be < MaxSect
		2593	4965 F89D97 C5 B0 cmp maxsect
		2594	4966 F89D99 B0 45 bcs ?22
		2595	4967 F89D9B A5 AF lda sectnum ; here CF = 0
		2596	4968 F89D9D A8 tay
		2597	4969 F89D9E 3A dec a ; SectNum - 1
		2598	4970 F89D9F 65 AE adc sector ; EOT = end of track
		2599	4971 F89DA1 B0 3D bcs ?22 ; overflow
		2600	4972 F89DA3 C5 B0 cmp maxsect
		2601	4973 F89DA5 B0 39 bcs ?22 ; EOT > (MaxSect - 1)
		2602	4974 F89DA7 85 B1 sta eot ; end of track
		2603	4975 F89DA9 98 tya ; number of sectors
		2604	4976 F89DAA 24 B6 bit opfg
		2605	Tue Jul 17 11:00:16 2018 Page 43
		2606
		2607
		2608
		2609
		2610	4977 F89DAC 50 02 bvc ?08 ; no MT
		2611	4978 F89DAE 0A asl a ; MT -> double number of sectors
		2612	4979 F89DAF A8 tay
		2613	4980 F89DB0 0A ?08: asl a ; number of pages of 256 bytes - here CF = 0
		2614	4981 F89DB1 85 95 sta ncnt+1 ; number of bytes to be trasferred
		2615	4982 F89DB3 64 94 stz ncnt
		2616	4983 F89DB5 84 9D sty bufcnt ; number of required dma buffers
		2617	4984 F89DB7 A5 9C lda dmabuf ; test buffer dma
		2618	4985 F89DB9 A8 tay
		2619	4986 F89DBA 29 7F and #$7F ; mask off bit 7
		2620	4987 F89DBC AA tax
		2621	4988 F89DBD 65 9D adc bufcnt ; here never carry
		2622	4989 F89DBF C9 81 cmp #$81 ; over the limit of the bank?
		2623	4990 F89DC1 B0 21 bcs ?24 ; yes
		2624	4991 F89DC3 8A txa
		2625	4992 F89DC4 0A asl a ; high byte of address of the buffer
		2626	4993 F89DC5 85 9F sta bufp+1 ; verfp and bufp equal but in opposite bank
		2627	4994 F89DC7 85 A2 sta verfp+1
		2628	4995 F89DC9 A2 02 ldx #BUFDSK1 ; bank of buffer #0..#127
		2629	4996 F89DCB 98 tya
		2630	4997 F89DCC 10 01 bpl ?12
		2631	4998 F89DCE E8 inx ; bank of buffer #128..#255
		2632	4999 F89DCF 86 A0 ?12: stx bufp+2
		2633	5000 F89DD1 A0 02 ldy #BUFDSK1 ; bank of verify buffer
		2634	5001 F89DD3 E0 03 cpx #BUFDSK2 ; always different from other buffer
		2635	5002 F89DD5 F0 01 beq ?16
		2636	5003 F89DD7 C8 iny
		2637	5004 F89DD8 84 A3 ?16: sty verfp+2
		2638	5005 F89DDA 18 clc
		2639	5006 F89DDB 60 rts
		2640	5007 F89DDC A9 0F ?20: lda #FDC_FMT ; format mismatch
		2641	5008 F89DDE 38 sec
		2642	5009 F89DDF 60 rts
		2643	5010 F89DE0 A9 14 ?22: lda #FDC_PARAMS ; invalid params
		2644	5011 F89DE2 38 sec
		2645	5012 F89DE3 60 rts
		2646	5013 F89DE4 A9 13 ?24: lda #FDC_BADBUF ; invalid buffer
		2647	5014 F89DE6 38 sec
		2648	5015 F89DE7 60 rts
		2649	5016
		2650	5017 ; 16us delay for safe access to FDC register's
		2651	5018 F89DE8 wait16us:
		2652	5019
		2653	5020 [01] .IF PHI2 = 4
		2654	5021 000009 ??CNT .EQU 9
		2655	5022 [01] .ELSE
		2656	5023 ??CNT .EQU 5
		2657	5024 [00] .ENDIF
		2658	5025
		2659	5026 ; #cycles = 5N + 13 + M(2 nop) = 64/32 cycles
		2660	5027 ; 4MHz -> N = 9, M = 6
		2661	5028 ; 2MHz -> N = 5, M = 4
		2662	5029
		2663	5030 F89DE8 A9 09 lda #??CNT
		2664	5031 F89DEA 3A ?01: dec a
		2665	5032 F89DEB D0 FD bne ?01
		2666	5033 [01] .IF PHI2 = 4
		2667	Tue Jul 17 11:00:16 2018 Page 44
		2668
		2669
		2670
		2671
		2672	5034 F89DED EA nop
		2673	5035 [00] .ENDIF
		2674	5036 F89DEE EA nop
		2675	5037 F89DEF EA nop
		2676	5038 F89DF0 60 rts
		2677	5039
		2678	5040 ;---------------------------------------------------------------------------
		2679	5041 ; ram disk managment
		2680	5042 ;---------------------------------------------------------------------------
		2681	5043
		2682	5044 ; ram disk format whole disk (X = drive)
		2683	5045 ; always return CF=0
		2684	5046 ; any time ram disk is formatted, change disk bit (bit 6) is set
		2685	5047 F89DF1 vdfmt:
		2686	5048 F89DF1 A5 45 lda vdrive
		2687	5049 F89DF3 89 10 bit #$10 ; ram disk write protect on?
		2688	5050 F89DF5 F0 06 beq ?01 ; no
		2689	5051 F89DF7 A9 0B lda #FDC_WP ; wp on error
		2690	5052 F89DF9 85 48 sta fdcerr
		2691	5053 F89DFB 38 sec
		2692	5054 F89DFC 60 rts
		2693	5055 F89DFD 29 7C ?01: and #01111100B ; reset format
		2694	5056 F89DFF 85 45 sta vdrive
		2695	5057 F89E01 A9 01 lda #$01 ; reset bit 0
		2696	5058 F89E03 14 B6 trb fmtfg ; for first call to callback
		2697	5059 F89E05 A9 01 lda #XMBANK ; bank that old X mem
		2698	5060 F89E07 85 A0 sta bufp+2
		2699	5061 F89E09 AE 0A FC ldx CRXME ; save X mem setting
		2700	5062 F89E0C DA phx
		2701	5063 F89E0D 8D 0B FC sta !CRXMEON ; enable X mem in window $012000 - $013FFF
		2702	5064 F89E10 A0 00 ldy #0 ; start track
		2703	5065 F89E12 BB tyx ; start head
		2704	5066 F89E13 84 AC ?02: sty track ; format this track...
		2705	5067 F89E15 86 AD ?04: stx head ; ...in this side
		2706	5068 F89E17 20 72 9F jsr getlba ; set ram disk address
		2707	5069 F89E1A 8D 28 FD sta !PIA0+PIAPRA ; set ram disk bank
		2708	5070 F89E1D 24 B6 bit fmtfg
		2709	5071 F89E1F 10 13 bpl ?06 ; no callback
		2710	5072 F89E21 4B phk ; JSL simulation
		2711	5073 F89E22 F4 33 9E pea #?06-1 ; return address
		2712	5074 F89E25 A5 B1 lda eot ; params for callback
		2713	5075 F89E27 EB xba ; B = sector/track
		2714	5076 F89E28 A5 B6 lda fmtfg
		2715	5077 F89E2A 4A lsr a ; bit 0 -> carry -> 0 if first call
		2716	5078 F89E2B A9 01 lda #1 ; A = drive
		2717	5079 F89E2D A4 AC ldy track ; Y = track
		2718	5080 F89E2F A6 AD ldx head ; X = head
		2719	5081 F89E31 DC A1 00 jmp [lpfn]
		2720	5082 ?06: ; return from callback
		2721	5083 F89E34 A6 AF ldx sectnum ; number of sector per track
		2722	5084 F89E36 INDEX16
		2723	5085 F89E36 C2 10 rep #PXFLAG
		2724	5086 .LONGI on
		2725	5087 .MNLIST
		2726	5088 F89E38 A4 98 ldy xmstart ; start address of X mem
		2727	5089 F89E3A 84 9E ?08: sty bufp ; sector's loop
		2728	5090 F89E3C A5 B8 lda fmtfill ; fill byte
		2729	Tue Jul 17 11:00:16 2018 Page 45
		2730
		2731
		2732
		2733
		2734	5091 F89E3E A0 FF 01 ldy #$01FF ; size of sector
		2735	5092 F89E41 97 9E ?10: sta [bufp],y ; fill one sector
		2736	5093 F89E43 88 dey
		2737	5094 F89E44 10 FB bpl ?10
		2738	5095 F89E46 CA dex
		2739	5096 F89E47 F0 17 beq ?12 ; end sector's loop
		2740	5097 F89E49 CPU16CLC
		2741	5098 F89E49 C2 31 rep #(PMFLAG.OR.PXFLAG.OR.PCFLAG)
		2742	5099 .LONGA on
		2743	5100 .LONGI on
		2744	5101 .MNLIST
		2745	5102 F89E4B A5 9E lda bufp
		2746	5103 F89E4D 69 00 02 adc #$0200 ; next sector pointer
		2747	5104 F89E50 A8 tay
		2748	5105 F89E51 ACC08
		2749	5106 F89E51 E2 20 sep #PMFLAG
		2750	5107 .LONGA off
		2751	5108 .MNLIST
		2752	5109 F89E53 C0 00 40 cpy #XMSTOP ; end of X mem
		2753	5110 F89E56 90 E2 bcc ?08 ; fill next block
		2754	5111 F89E58 EE 28 FD inc !PIA0+PIAPRA ; increment X mem bank
		2755	5112 F89E5B A0 00 20 ldy #XMSTART ; start address of X mem
		2756	5113 F89E5E 80 DA bra ?08 ; fill next block
		2757	5114 F89E60 ?12: INDEX08
		2758	5115 F89E60 E2 10 sep #PXFLAG
		2759	5116 .LONGI off
		2760	5117 .MNLIST
		2761	5118 F89E62 A9 01 lda #$01
		2762	5119 F89E64 04 B6 tsb fmtfg ; bit 0 = 1 -> for callback
		2763	5120 F89E66 A6 AD ldx head ; next side
		2764	5121 F89E68 E8 inx
		2765	5122 F89E69 E0 02 cpx #2
		2766	5123 F89E6B 90 A8 bcc ?04 ; same track, next side
		2767	5124 F89E6D A2 00 ldx #0 ; clear head
		2768	5125 F89E6F A4 AC ldy track ; next track
		2769	5126 F89E71 C8 iny
		2770	5127 F89E72 C0 50 cpy #80
		2771	5128 F89E74 90 9D bcc ?02 ; next track, side=0
		2772	5129 F89E76 A5 45 lda vdrive ; set valid format
		2773	5130 F89E78 29 7C and #01111100B
		2774	5131 F89E7A 05 B7 ora dskfmt ; update format in selected drive
		2775	5132 F89E7C 09 C0 ora #$C0 ; current valid format
		2776	5133 F89E7E 85 45 sta vdrive ; set bit 6: change disk
		2777	5134 F89E80 FA plx ; restore X mem setting
		2778	5135 F89E81 9D 0A FC sta !CRXME,x
		2779	5136 F89E84 A2 3E ldx #RTCRDFG ; validate ram disk configuration
		2780	5137 F89E86 8E 4C FD stx RTCALE
		2781	5138 F89E89 A9 55 lda #$55
		2782	5139 F89E8B 8D 4D FD sta RTCDATA
		2783	5140 F89E8E E8 inx ; save configuration in RTC ram
		2784	5141 F89E8F 8E 4C FD stx RTCALE
		2785	5142 F89E92 A5 45 lda vdrive
		2786	5143 F89E94 8D 4D FD sta RTCDATA ; save ram disk
		2787	5144 F89E97 18 clc
		2788	5145 F89E98 60 rts
		2789	5146
		2790	5147 ; execute read/write on ram disk
		2791	Tue Jul 17 11:00:16 2018 Page 46
		2792
		2793
		2794
		2795
		2796	5148 ; in: vdop=command ($00=read, $80=write, $40=fake verify)
		2797	5149 ; opfg<7>=1 if read verify buffer
		2798	5150 ; out: CF=1 if error (just verify error in ram disk)
		2799	5151 ; A,X,Y destroyed
		2800	5152 F89E99 vdrw:
		2801	5153 F89E99 20 60 9D jsr chkparms ; check params
		2802	5154 F89E9C 90 03 bcc ?02 ; ok
		2803	5155 F89E9E 85 48 ?01: sta fdcerr
		2804	5156 F89EA0 60 rts ; return error
		2805	5157 F89EA1 24 B5 ?02: bit vdop ; write operation?
		2806	5158 F89EA3 10 0B bpl ?04 ; no
		2807	5159 F89EA5 A9 10 lda #$10
		2808	5160 F89EA7 24 45 bit vdrive ; write protect?
		2809	5161 F89EA9 F0 05 beq ?04 ; no
		2810	5162 F89EAB A9 0B lda #FDC_WP ; yes...
		2811	5163 F89EAD 38 sec ; ...error
		2812	5164 F89EAE 80 EE bra ?01
		2813	5165 F89EB0 24 B6 ?04: bit opfg ; verify buffer?
		2814	5166 F89EB2 10 03 bpl ?06 ; no
		2815	5167 F89EB4 20 2C 9D jsr savebuf ; save verify buffer
		2816	5168 F89EB7 20 72 9F ?06: jsr getlba ; set ram disk address
		2817	5169 F89EBA 8D 28 FD sta !PIA0+PIAPRA ; set ram disk bank
		2818	5170 F89EBD 64 B2 stz buftst ; now using bufp buffer
		2819	5171 F89EBF 20 EE 9E jsr vdcmd ; execute command (here always CF = 0)
		2820	5172 F89EC2 A5 B6 lda opfg
		2821	5173 F89EC4 10 27 bpl ?20 ; no verify, exit
		2822	5174 F89EC6 85 B2 sta buftst ; now using verfp buffer
		2823	5175 F89EC8 64 B5 stz vdop ; read for verify
		2824	5176 F89ECA A5 BB lda xmbank
		2825	5177 F89ECC 8D 28 FD sta !PIA0+PIAPRA ; set ram disk bank
		2826	5178 F89ECF 20 EE 9E jsr vdcmd ; execute command
		2827	5179 F89ED2 A0 00 ldy #0 ; verify data
		2828	5180 F89ED4 INDEX16
		2829	5181 F89ED4 C2 10 rep #PXFLAG
		2830	5182 .LONGI on
		2831	5183 .MNLIST
		2832	5184 F89ED6 B7 9E ?08: lda [bufp],y
		2833	5185 F89ED8 D7 A1 cmp [verfp],y
		2834	5186 F89EDA D0 05 bne ?10 ; unmatch: ZF=0
		2835	5187 F89EDC C8 iny
		2836	5188 F89EDD C4 94 cpy ncnt
		2837	5189 F89EDF 90 F5 bcc ?08 ; when finish ZF=1
		2838	5190 F89EE1 ?10: INDEX08 ; here ZF=1 if match
		2839	5191 F89EE1 E2 10 sep #PXFLAG
		2840	5192 .LONGI off
		2841	5193 .MNLIST
		2842	5194 F89EE3 18 clc ; assume no error
		2843	5195 F89EE4 F0 04 beq ?12
		2844	5196 F89EE6 A9 12 lda #FDC_VER ; verify error
		2845	5197 F89EE8 85 48 sta fdcerr
		2846	5198 F89EEA 20 44 9D ?12: jsr restbuf ; restore verify buffer
		2847	5199 F89EED 60 ?20: rts
		2848	5200
		2849	5201 ; ram disk read/write command
		2850	5202 ; in: vdop=command ($00=read, $80=write, $40=fake verify)
		2851	5203 ; buftst=0 if using bufp, =$80 if using verfp
		2852	5204 ; out: CF=0 always
		2853	Tue Jul 17 11:00:16 2018 Page 47
		2854
		2855
		2856
		2857
		2858	5205 ; A,X,Y destroyed
		2859	5206 F89EEE vdcmd:
		2860	5207 F89EEE AE 0A FC ldx .ABS.CRXME ; save X mem setting
		2861	5208 F89EF1 DA phx
		2862	5209 F89EF2 8D 0B FC sta !CRXMEON ; enable X mem in window $012000 - $013FFF
		2863	5210 F89EF5 INDEX16
		2864	5211 F89EF5 C2 10 rep #PXFLAG
		2865	5212 .LONGI on
		2866	5213 .MNLIST
		2867	5214 F89EF7 A4 94 ldy ncnt
		2868	5215 F89EF9 24 B5 bit vdop ; fake verify operation?
		2869	5216 F89EFB 70 6B bvs ?24 ; yes, no operation in ram disk
		2870	5217 F89EFD A6 9E ldx bufp ; buffer start for read/write
		2871	5218 F89EFF A5 A0 lda bufp+2
		2872	5219 F89F01 24 B2 bit buftst ; read verify buffer?
		2873	5220 F89F03 10 04 bpl ?02 ; no, so use bufp buffer
		2874	5221 F89F05 A6 A1 ldx verfp ; yes, so use verfp verify buffer
		2875	5222 F89F07 A5 A3 lda verfp+2
		2876	5223 F89F09 86 9A ?02: stx bufstart ; set start buffer for ram disk access
		2877	5224 F89F0B 85 B9 sta tmpa ; source or dest bank
		2878	5225 F89F0D ACC16CLC ; calc end of transfer buffer
		2879	5226 F89F0D C2 21 rep #(PMFLAG.OR.PCFLAG)
		2880	5227 .LONGA on
		2881	5228 .MNLIST
		2882	5229 F89F0F 98 tya ; count #
		2883	5230 F89F10 65 9A adc bufstart
		2884	5231 F89F12 85 9C sta bufend ; end address of transfer
		2885	5232 F89F14 ACC08
		2886	5233 F89F14 E2 20 sep #PMFLAG
		2887	5234 .LONGA off
		2888	5235 .MNLIST
		2889	5236 F89F16 A9 FF lda #$FF
		2890	5237 F89F18 EB xba ; B = $FF
		2891	5238 F89F19 24 B5 bit vdop ; check read/write flag
		2892	5239 F89F1B 10 24 bpl ?14 ; read operation
		2893	5240 ; write operation
		2894	5241 F89F1D A5 B9 lda tmpa ; the source bank
		2895	5242 F89F1F 8F 2D 9F F8 sta ?10+2 ; store source bank for mvn istruction
		2896	5243 F89F23 A6 9A ldx bufstart ; start address of source block
		2897	5244 F89F25 8B phb ; save current danta bank
		2898	5245 F89F26 A4 98 ldy xmstart ; start address of current h&t&&s
		2899	5246 F89F28 A9 01 ?08: lda #$01 ; size of block - 1 (512 bytes)
		2900	5247 F89F2A EB xba ; before B = $FF, A = $01 -> C = $01FF
		2901	5248 F89F2B 54 01 00 ?10: mvn #0,#1 ; move sector from bank 2 or 3 to bank 1
		2902	5249 F89F2E E4 9C cpx bufend ; X point past the last moved byte
		2903	5250 F89F30 B0 33 bcs ?22 ; end of move
		2904	5251 F89F32 C0 00 40 cpy #XMSTOP ; end of X mem?
		2905	5252 F89F35 90 F1 bcc ?08 ; no, move next block
		2906	5253 F89F37 AB plb ; restore data bank
		2907	5254 F89F38 EE 28 FD inc PIA0+PIAPRA ; increment X mem bank
		2908	5255 F89F3B 8B phb ; save current danta bank
		2909	5256 F89F3C A0 00 20 ldy #XMSTART ; start address from beginning of X mem
		2910	5257 F89F3F 80 E7 bra ?08 ; move next block
		2911	5258 ?14: ; read operation
		2912	5259 F89F41 A5 B9 lda tmpa ; dest bank
		2913	5260 F89F43 A4 9A ldy bufstart ; start address of dest. block
		2914	5261 F89F45 8F 50 9F F8 sta ?20+1 ; store dest. bank for mvn istruction
		2915	Tue Jul 17 11:00:16 2018 Page 48
		2916
		2917
		2918
		2919
		2920	5262 F89F49 8B phb ; save current danta bank
		2921	5263 F89F4A A6 98 ldx xmstart ; start address of current h&t&s
		2922	5264 F89F4C A9 01 ?18: lda #$01 ; size of block - 1 (512 bytes)
		2923	5265 F89F4E EB xba ; before B = $FF, A = $01 -> C = $01FF
		2924	5266 F89F4F 54 00 01 ?20: mvn #1,#0 ; move sector from bank 1 to bank 2 or 3
		2925	5267 F89F52 C4 9C cpy bufend ; Y point past the last moved byte
		2926	5268 F89F54 B0 0F bcs ?22 ; end of move
		2927	5269 F89F56 E0 00 40 cpx #XMSTOP ; end of X mem?
		2928	5270 F89F59 90 F1 bcc ?18 ; no, move next block
		2929	5271 F89F5B AB plb ; restore data bank
		2930	5272 F89F5C EE 28 FD inc PIA0+PIAPRA ; increment X mem bank
		2931	5273 F89F5F 8B phb
		2932	5274 F89F60 A2 00 20 ldx #XMSTART ; start address from beginning of X mem
		2933	5275 F89F63 80 E7 bra ?18 ; move next block
		2934	5276 F89F65 AB ?22: plb ; restore data bank
		2935	5277 F89F66 A4 94 ldy ncnt
		2936	5278 F89F68 84 96 ?24: sty ntrsf ; store numbers of moved bytes
		2937	5279 F89F6A INDEX08
		2938	5280 F89F6A E2 10 sep #PXFLAG
		2939	5281 .LONGI off
		2940	5282 .MNLIST
		2941	5283 F89F6C FA plx ; restore X mem setting
		2942	5284 F89F6D 9D 0A FC sta !CRXME,x
		2943	5285 F89F70 18 clc
		2944	5286 F89F71 60 rts
		2945	5287 F89F72
		2946	5288 ; translate the tuplet (T,H,S) into LBA (Linear Block Address)
		2947	5289 ; LBA = [(2track + head)]P + sector - 1
		2948	5290 ; where P = sectors/track
		2949	5291 F89F72 getlba:
		2950	5292 F89F72 20 96 9F jsr lbabase ; get LBA base
		2951	5293 F89F75 A6 AE ldx sector
		2952	5294 F89F77 86 B9 stx mcand1 ; store S in word
		2953	5295 F89F79 64 BA stz mcand2
		2954	5296 F89F7B ACC16CLC ; A/M 16 bit + CLC
		2955	5297 F89F7B C2 21 rep #(PMFLAG.OR.PCFLAG)
		2956	5298 .LONGA on
		2957	5299 .MNLIST
		2958	5300 F89F7D 65 B9 adc mcand1
		2959	5301 F89F7F 3A dec a ; LBA
		2960	5302 F89F80 6A ror a ; divide by 16 to get xmem bank
		2961	5303 F89F81 6A ror a
		2962	5304 F89F82 6A ror a
		2963	5305 F89F83 6A ror a
		2964	5306 F89F84 ACC08
		2965	5307 F89F84 E2 20 sep #PMFLAG
		2966	5308 .LONGA off
		2967	5309 .MNLIST
		2968	5310 F89F86 85 BB sta xmbank ; ram disk bank
		2969	5311 F89F88 EB xba ; B = bank, A = modulus
		2970	5312 F89F89 6A ror a ; shift in last carry
		2971	5313 F89F8A 4A lsr a ; calc the modulo
		2972	5314 F89F8B 4A lsr a
		2973	5315 F89F8C 4A lsr a ; MSB of xmem
		2974	5316 F89F8D 18 clc
		2975	5317 F89F8E 69 20 adc #>XMSTART ; add the physical start of xmem
		2976	5318 F89F90 85 99 sta xmstart+1
		2977	Tue Jul 17 11:00:16 2018 Page 49
		2978
		2979
		2980
		2981
		2982	5319 F89F92 64 98 stz xmstart
		2983	5320 F89F94 EB xba ; return in A the ram disk bank
		2984	5321 F89F95 60 rts
		2985	5322 F89F96
		2986	5323 ; get base of Linear Block Address (LBA)
		2987	5324 ; LBA = [(2track + head)]P + sector - 1
		2988	5325 ; where P = sectors/track
		2989	5326 ; this function calc the LBA base = [(2track + head)]P
		2990	5327 ; the result is stored in C
		2991	5328 F89F96 lbabase:
		2992	5329 F89F96 A5 B0 lda maxsect
		2993	5330 F89F98 3A dec a
		2994	5331 F89F99 85 B9 sta mcand1 ; multiplicand #1
		2995	5332 F89F9B A5 AC lda track
		2996	5333 F89F9D 0A asl a ; 2*track (here always CF = 0)
		2997	5334 F89F9E 65 AD adc head
		2998	5335 F89FA0 85 BA sta mcand2 ; 2*track + head
		2999	5336 F89FA2 A9 00 lda #0 ; MSB result of (macnd1 * mcand2)
		3000	5337 F89FA4 A2 09 ldx #9 ; loop 9 bit
		3001	5338 F89FA6 18 clc
		3002	5339 F89FA7 6A ?02: ror a
		3003	5340 F89FA8 66 B9 ror mcand1 ; LSB result of multiplication
		3004	5341 F89FAA 90 03 bcc ?04
		3005	5342 F89FAC 18 clc
		3006	5343 F89FAD 65 BA adc mcand2
		3007	5344 F89FAF CA ?04: dex
		3008	5345 F89FB0 D0 F5 bne ?02
		3009	5346 F89FB2 EB xba ; B = MSB of result
		3010	5347 F89FB3 A5 B9 lda mcand1 ; A = LSB of result
		3011	5348 F89FB5 60 rts ; C = 16 bit result
		3012	5349
		3013	5350 ;---------------------------------------------------------------------------
		3014	5351 ; POST routine
		3015	5352 ;---------------------------------------------------------------------------
		3016	5353
		3017	5354 ; this routine is invoked within boot phase
		3018	5355 F89FB6 fdinit:
		3019	5356 F89FB6 A9 FB lda #11111011B
		3020	5357 F89FB8 14 46 trb fdcctl ; reset all bit's but not dma flag
		3021	5358 F89FBA A9 02 lda #00000010B
		3022	5359 F89FBC 04 46 tsb fdcctl ; select HD rte at beginning
		3023	5360 F89FBE 20 CE 9C jsr startmtr ; start motor
		3024	5361 F89FC1 20 3A 9B jsr fdcrst ; reset FDC controller
		3025	5362 F89FC4 A9 20 lda #$20 ; test bit 5
		3026	5363 F89FC6 24 46 bit fdcctl
		3027	5364 F89FC8 F0 37 beq ?100 ; FDC controller fault
		3028	5365 F89FCA 20 31 A0 jsr ?110
		3029	5366 F89FCD 64 48 stz fdcerr
		3030	5367 F89FCF 20 CE 9C jsr startmtr ; start motor
		3031	5368 F89FD2 20 95 99 jsr seek0 ; recalibrate after reset and seek track 0
		3032	5369 F89FD5 B0 1B bcs ?30 ; fail
		3033	5370 F89FD7 A9 80 lda #$80 ; set flag drive ok
		3034	5371 F89FD9 04 46 tsb fdcctl
		3035	5372 F89FDB
		3036	5373 F89FDB SCNPRINT
		3037	5374 F89FDB 02 01 cop $01
		3038	5375 .MNLIST
		3039	Tue Jul 17 11:00:16 2018 Page 50
		3040
		3041
		3042
		3043
		3044	5376 F89FDD 70 61 73 73 2E .DB 'pass.', $0D, $00
		3045	0D 00
		3046	5377 F89FE4
		3047	5378 F89FE4 AF DF FD 00 lda >FDCDIR ; read disk change line
		3048	5379 F89FE8 29 80 and #$80 ; bit 7 will be 0 if disk ready
		3049	5380 F89FEA D0 03 bne ?20 ; not ready
		3050	5381 F89FEC 20 10 99 jsr chkwp ; aquire wp status
		3051	5382 F89FEF 18 ?20: clc
		3052	5383 F89FF0 80 0C bra ?32
		3053	5384 F89FF2 ?30: SCNPRINT
		3054	5385 F89FF2 02 01 cop $01
		3055	5386 .MNLIST
		3056	5387 F89FF4 66 61 69 6C 2E .DB 'fail.', $0D, $00
		3057	0D 00
		3058	5388 F89FFB 38 sec
		3059	5389 F89FFC 85 48 sta fdcerr
		3060	5390 F89FFE 4C 07 9D ?32: jmp stopmtr
		3061	5391 F8A001
		3062	5392 F8A001 ?100: SCNPRINT
		3063	5393 F8A001 02 01 cop $01
		3064	5394 .MNLIST
		3065	5395 F8A003 45 52 52 4F 52 .DB 'ERROR: diskette controller UM8388 fail', $0D, $00
		3066	3A 20 64 69 73
		3067	6B 65 74 74 65
		3068	20 63 6F 6E 74
		3069	72 6F 6C 6C 65
		3070	72 20 55 4D 38
		3071	33 38 38 20 66
		3072	61 69 6C 0D 00
		3073	5396 F8A02B TASKSW
		3074	5397 F8A02B 02 00 cop FN_TASKSW
		3075	5398 F8A02D 00 .DB $00
		3076	5399 .MNLIST
		3077	5400 F8A02E 4C 07 9D jmp stopmtr ; exit
		3078	5401 F8A031
		3079	5402 F8A031 ?110: SCNPRINT
		3080	5403 F8A031 02 01 cop $01
		3081	5404 .MNLIST
		3082	5405 F8A033 64 72 69 76 65 .DB 'drive #0...', $00
		3083	20 23 30 2E 2E
		3084	2E 00
		3085	5406 F8A03F 60 rts
		3086	5407 F8A040
		3087	5408 ; POST routine for initial ram disk configuration
		3088	5409 F8A040 vdinit:
		3089	5410 F8A040 20 66 A0 jsr ?100
		3090	5411 F8A043 A9 40 lda #$40
		3091	5412 F8A045 85 45 sta vdrive ; reset unformatted ram disk (disk changed)
		3092	5413 F8A047 20 75 A0 jsr ?110
		3093	5414 F8A04A 24 0C bit Bnk0Flag ; <6> -> warm reset flag
		3094	5415 F8A04C 50 17 bvc ?10 ; cold reset - unformatted
		3095	5416 F8A04E A2 3E ldx #RTCRDFG ; resume saved configuration
		3096	5417 F8A050 8E 4C FD stx RTCALE ; from RTC RAM in bank 0 & 1
		3097	5418 F8A053 AD 4D FD lda RTCDATA ; valid ram disk configuration?
		3098	5419 F8A056 C9 55 cmp #$55
		3099	5420 F8A058 D0 0B bne ?10 ; no -- make default ram disk
		3100	5421 F8A05A E8 inx
		3101	Tue Jul 17 11:00:16 2018 Page 51
		3102
		3103
		3104
		3105
		3106	5422 F8A05B 8E 4C FD stx RTCALE
		3107	5423 F8A05E AD 4D FD lda RTCDATA ; get ram disk 0 configuration
		3108	5424 F8A061 09 40 ora #$40 ; always disk ghanged at startup
		3109	5425 F8A063 85 45 sta vdrive
		3110	5426 F8A065 60 ?10: rts
		3111	5427
		3112	5428 F8A066 ?100: SCNPRINT
		3113	5429 F8A066 02 01 cop $01
		3114	5430 .MNLIST
		3115	5431 F8A068 64 72 69 76 65 .DB 'drive #1...', $00
		3116	20 23 31 2E 2E
		3117	2E 00
		3118	5432 F8A074 60 rts
		3119	5433
		3120	5434 F8A075 ?110: SCNPRINT
		3121	5435 F8A075 02 01 cop $01
		3122	5436 .MNLIST
		3123	5437 F8A077 76 69 72 74 75 .DB 'virtual drive (ram disk).', $0D, $00
		3124	61 6C 20 64 72
		3125	69 76 65 20 28
		3126	72 61 6D 20 64
		3127	69 73 6B 29 2E
		3128	0D 00
		3129	5438 F8A092 60 rts
		3130	5439
		3131	5440 ;---------------------------------------------------------------------------
		3132	5441 ; Tables
		3133	5442 ;---------------------------------------------------------------------------
		3134	5443
		3135	5444 ; ctl function's table
		3136	5445 F8A093 CTLFN:
		3137	5446 F8A093 3594 3B94 3E94 .DW ctl_fn0, ctl_fn1, ctl_fn2, ctl_fn3, ctl_fn4
		3138	5D94 7B94
		3139	5447 F8A09D B194 BD94 .DW ctl_fn5, ctl_fn6
		3140	5448
		3141	5449 000007 MXCTLFN .EQU ($-CTLFN)/2
		3142	5450
		3143	5451 ; max. number of secors/track
		3144	5452 F8A0A1 MAXSECT
		3145	5453 F8A0A1 0A 0B 13 15 .DB 10, 11, 19, 21
		3146	5454
		3147	5455 ; GAP 3 lenght for rd/wr command
		3148	5456 F8A0A5 RWGPLTBL:
		3149	5457 F8A0A5 1B 10 36 14 .DB RWGPL3DD, RWGPL3DDA, RWGPL3HD, RWGPL3HDA
		3150	5458
		3151	5459 ; GAP 3 lenght while format track
		3152	5460 F8A0A9 FGPLTBL:
		3153	5461 F8A0A9 54 24 6C 32 .DB FMGPL3DD, FMGPL3DDA, FMGPL3HD, FMGPL3HDA
		3154	5462 F8A0AD
		3155	5463 ; head inversion for MSDOS/CBM format
		3156	5464 F8A0AD HEADTBL:
		3157	5465 F8A0AD 00 01 00 01 .DB $00, $01, $00, $01
		3158	5466
		3159	5467 ; commands for UM8388
		3160	5468 F8A0B1 CMDTAB:
		3161	5469 F8A0B1 66 66 45 .DB CMDREAD, CMDREAD, CMDWRITE
		3162	5470 F8A0B4
		3163	Tue Jul 17 11:00:16 2018 Page 52
		3164
		3165
		3166
		3167
		3168	5471 ; transfer command for DMA
		3169	5472 F8A0B4 DMATAB:
		3170	5473 F8A0B4 46 42 4A .DB WRITETRASF, VERFTRASF, READTRASF
		3171	5474 F8A0B7
		3172	5475 ; disk operation flag (read, verify, write)
		3173	5476 F8A0B7 VDOPTAB:
		3174	5477 F8A0B7 00 40 80 .DB $00, $40, $80
		3175	5478
		3176	5479
		3177	5480 F8A0BA testdma:
		3178	5481 F8A0BA A2 44 ldx #$44
		3179	5482 F8A0BC A0 CC ldy #$CC
		3180	5483 F8A0BE 64 F0 stz <$f0
		3181	5484 F8A0C0 64 F1 stz <$f1
		3182	5485 F8A0C2 64 F2 stz <$f2
		3183	5486 F8A0C4 64 F3 stz <$f3
		3184	5487 F8A0C6 64 F4 stz <$f4
		3185	5488 F8A0C8 64 F5 stz <$f5
		3186	5489 F8A0CA 64 F6 stz <$f6
		3187	5490 F8A0CC 64 F7 stz <$f7
		3188	5491 F8A0CE
		3189	5492 F8A0CE 8D 9C FD ?06: sta !DMAWCLRFF ; clear F/F
		3190	5493 F8A0D1 E6 F0 inc <$f0
		3191	5494 F8A0D3 EA nop
		3192	5495 F8A0D4 EA nop
		3193	5496 F8A0D5 8A txa
		3194	5497 F8A0D6 8D 90 FD sta !DMAC+DMAADDR0 ; store low buffer address
		3195	5498 F8A0D9 EA nop
		3196	5499 F8A0DA EA nop
		3197	5500 F8A0DB 98 tya
		3198	5501 F8A0DC 8D 90 FD sta !DMAC+DMAADDR0 ; store high buffer address
		3199	5502 F8A0DF EA nop
		3200	5503 F8A0E0 8D 9C FD sta !DMAWCLRFF ; clear F/F
		3201	5504 F8A0E3 EA nop
		3202	5505 F8A0E4 EA nop
		3203	5506 F8A0E5 8A txa
		3204	5507 F8A0E6 CD 90 FD cmp !DMAC+DMAADDR0 ; cmp low buffer address
		3205	5508 F8A0E9 D0 E3 bne ?06
		3206	5509 F8A0EB 98 tya
		3207	5510 F8A0EC CD 90 FD cmp !DMAC+DMAADDR0 ; cmp high buffer address
		3208	5511 F8A0EF D0 DD bne ?06
		3209	5512 F8A0F1 A2 5D ldx #$5D ; X=low count
		3210	5513 F8A0F3 A0 BF ldy #$BF ; Y=high count
		3211	5514 F8A0F5 8D 9C FD ?08: sta !DMAWCLRFF ; clear F/F
		3212	5515 F8A0F8 E6 F1 inc <$f1
		3213	5516 F8A0FA EA nop
		3214	5517 F8A0FB EA nop
		3215	5518 F8A0FC 8A txa
		3216	5519 F8A0FD 8D 91 FD sta !DMAC+DMACNT0 ; store low count
		3217	5520 F8A100 EA nop
		3218	5521 F8A101 EA nop
		3219	5522 F8A102 98 tya
		3220	5523 F8A103 8D 91 FD sta !DMAC+DMACNT0 ; store high count
		3221	5524 F8A106 EA nop
		3222	5525 F8A107 8D 9C FD sta !DMAWCLRFF ; clear F/F
		3223	5526 F8A10A EA nop
		3224	5527 F8A10B EA nop
		3225	Tue Jul 17 11:00:16 2018 Page 53
		3226
		3227
		3228
		3229
		3230	5528 F8A10C 8A txa
		3231	5529 F8A10D CD 91 FD cmp !DMAC+DMACNT0 ; cmp low count
		3232	5530 F8A110 D0 E3 bne ?08
		3233	5531 F8A112 98 tya
		3234	5532 F8A113 CD 91 FD cmp !DMAC+DMACNT0 ; cmp high count
		3235	5533 F8A116 D0 DD bne ?08
		3236	5534 F8A118 8D 9C FD sta !DMAWCLRFF ; clear F/F
		3237	5535
		3238	5536 F8A11B 8D 9C FD ?06a: sta !DMAWCLRFF ; clear F/F
		3239	5537 F8A11E E6 F2 inc <$f2
		3240	5538 F8A120 EA nop
		3241	5539 F8A121 EA nop
		3242	5540 F8A122 8A txa
		3243	5541 F8A123 8D 92 FD sta !DMAC+DMAADDR1 ; store low buffer address
		3244	5542 F8A126 EA nop
		3245	5543 F8A127 EA nop
		3246	5544 F8A128 98 tya
		3247	5545 F8A129 8D 92 FD sta !DMAC+DMAADDR1 ; store high buffer address
		3248	5546 F8A12C EA nop
		3249	5547 F8A12D 8D 9C FD sta !DMAWCLRFF ; clear F/F
		3250	5548 F8A130 EA nop
		3251	5549 F8A131 EA nop
		3252	5550 F8A132 8A txa
		3253	5551 F8A133 CD 92 FD cmp !DMAC+DMAADDR1 ; cmp low buffer address
		3254	5552 F8A136 D0 E3 bne ?06a
		3255	5553 F8A138 98 tya
		3256	5554 F8A139 CD 92 FD cmp !DMAC+DMAADDR1 ; cmp high buffer address
		3257	5555 F8A13C D0 DD bne ?06a
		3258	5556 F8A13E A2 5D ldx #$5D ; X=low count
		3259	5557 F8A140 A0 BF ldy #$BF ; Y=high count
		3260	5558 F8A142 8D 9C FD ?08a: sta !DMAWCLRFF ; clear F/F
		3261	5559 F8A145 E6 F3 inc <$f3
		3262	5560 F8A147 EA nop
		3263	5561 F8A148 EA nop
		3264	5562 F8A149 8A txa
		3265	5563 F8A14A 8D 93 FD sta !DMAC+DMACNT1 ; store low count
		3266	5564 F8A14D EA nop
		3267	5565 F8A14E EA nop
		3268	5566 F8A14F 98 tya
		3269	5567 F8A150 8D 93 FD sta !DMAC+DMACNT1 ; store high count
		3270	5568 F8A153 EA nop
		3271	5569 F8A154 8D 9C FD sta !DMAWCLRFF ; clear F/F
		3272	5570 F8A157 EA nop
		3273	5571 F8A158 EA nop
		3274	5572 F8A159 8A txa
		3275	5573 F8A15A CD 93 FD cmp !DMAC+DMACNT1 ; cmp low count
		3276	5574 F8A15D D0 E3 bne ?08a
		3277	5575 F8A15F 98 tya
		3278	5576 F8A160 CD 93 FD cmp !DMAC+DMACNT1 ; cmp high count
		3279	5577 F8A163 D0 DD bne ?08a
		3280	5578 F8A165 8D 9C FD sta !DMAWCLRFF ; clear F/F
		3281	5579
		3282	5580 F8A168 8D 9C FD ?06b: sta !DMAWCLRFF ; clear F/F
		3283	5581 F8A16B E6 F4 inc <$f4
		3284	5582 F8A16D EA nop
		3285	5583 F8A16E EA nop
		3286	5584 F8A16F 8A txa
		3287	Tue Jul 17 11:00:16 2018 Page 54
		3288
		3289
		3290
		3291
		3292	5585 F8A170 8D 94 FD sta !DMAC+DMAADDR2 ; store low buffer address
		3293	5586 F8A173 EA nop
		3294	5587 F8A174 EA nop
		3295	5588 F8A175 98 tya
		3296	5589 F8A176 8D 94 FD sta !DMAC+DMAADDR2 ; store high buffer address
		3297	5590 F8A179 EA nop
		3298	5591 F8A17A 8D 9C FD sta !DMAWCLRFF ; clear F/F
		3299	5592 F8A17D EA nop
		3300	5593 F8A17E EA nop
		3301	5594 F8A17F 8A txa
		3302	5595 F8A180 CD 94 FD cmp !DMAC+DMAADDR2 ; cmp low buffer address
		3303	5596 F8A183 D0 E3 bne ?06b
		3304	5597 F8A185 98 tya
		3305	5598 F8A186 CD 94 FD cmp !DMAC+DMAADDR2 ; cmp high buffer address
		3306	5599 F8A189 D0 DD bne ?06b
		3307	5600 F8A18B A2 5D ldx #$5D ; X=low count
		3308	5601 F8A18D A0 BF ldy #$BF ; Y=high count
		3309	5602 F8A18F 8D 9C FD ?08b: sta !DMAWCLRFF ; clear F/F
		3310	5603 F8A192 E6 F5 inc <$f5
		3311	5604 F8A194 EA nop
		3312	5605 F8A195 EA nop
		3313	5606 F8A196 8A txa
		3314	5607 F8A197 8D 95 FD sta !DMAC+DMACNT2 ; store low count
		3315	5608 F8A19A EA nop
		3316	5609 F8A19B EA nop
		3317	5610 F8A19C 98 tya
		3318	5611 F8A19D 8D 95 FD sta !DMAC+DMACNT2 ; store high count
		3319	5612 F8A1A0 EA nop
		3320	5613 F8A1A1 8D 9C FD sta !DMAWCLRFF ; clear F/F
		3321	5614 F8A1A4 EA nop
		3322	5615 F8A1A5 EA nop
		3323	5616 F8A1A6 8A txa
		3324	5617 F8A1A7 CD 95 FD cmp !DMAC+DMACNT2 ; cmp low count
		3325	5618 F8A1AA D0 E3 bne ?08b
		3326	5619 F8A1AC 98 tya
		3327	5620 F8A1AD CD 95 FD cmp !DMAC+DMACNT2 ; cmp high count
		3328	5621 F8A1B0 D0 DD bne ?08b
		3329	5622 F8A1B2 8D 9C FD sta !DMAWCLRFF ; clear F/F
		3330	5623
		3331	5624 F8A1B5 8D 9C FD ?06c: sta !DMAWCLRFF ; clear F/F
		3332	5625 F8A1B8 E6 F6 inc <$f6
		3333	5626 F8A1BA EA nop
		3334	5627 F8A1BB EA nop
		3335	5628 F8A1BC 8A txa
		3336	5629 F8A1BD 8D 96 FD sta !DMAC+DMAADDR3 ; store low buffer address
		3337	5630 F8A1C0 EA nop
		3338	5631 F8A1C1 EA nop
		3339	5632 F8A1C2 98 tya
		3340	5633 F8A1C3 8D 96 FD sta !DMAC+DMAADDR3 ; store high buffer address
		3341	5634 F8A1C6 EA nop
		3342	5635 F8A1C7 8D 9C FD sta !DMAWCLRFF ; clear F/F
		3343	5636 F8A1CA EA nop
		3344	5637 F8A1CB EA nop
		3345	5638 F8A1CC 8A txa
		3346	5639 F8A1CD CD 96 FD cmp !DMAC+DMAADDR3 ; cmp low buffer address
		3347	5640 F8A1D0 D0 E3 bne ?06c
		3348	5641 F8A1D2 98 tya
		3349	Tue Jul 17 11:00:16 2018 Page 55
		3350
		3351
		3352
		3353
		3354	5642 F8A1D3 CD 96 FD cmp !DMAC+DMAADDR3 ; cmp high buffer address
		3355	5643 F8A1D6 D0 DD bne ?06c
		3356	5644 F8A1D8 A2 5D ldx #$5D ; X=low count
		3357	5645 F8A1DA A0 BF ldy #$BF ; Y=high count
		3358	5646 F8A1DC 8D 9C FD ?08c: sta !DMAWCLRFF ; clear F/F
		3359	5647 F8A1DF E6 F7 inc <$f7
		3360	5648 F8A1E1 EA nop
		3361	5649 F8A1E2 EA nop
		3362	5650 F8A1E3 8A txa
		3363	5651 F8A1E4 8D 97 FD sta !DMAC+DMACNT3 ; store low count
		3364	5652 F8A1E7 EA nop
		3365	5653 F8A1E8 EA nop
		3366	5654 F8A1E9 98 tya
		3367	5655 F8A1EA 8D 97 FD sta !DMAC+DMACNT3 ; store high count
		3368	5656 F8A1ED EA nop
		3369	5657 F8A1EE 8D 9C FD sta !DMAWCLRFF ; clear F/F
		3370	5658 F8A1F1 EA nop
		3371	5659 F8A1F2 EA nop
		3372	5660 F8A1F3 8A txa
		3373	5661 F8A1F4 CD 97 FD cmp !DMAC+DMACNT3 ; cmp low count
		3374	5662 F8A1F7 D0 E3 bne ?08c
		3375	5663 F8A1F9 98 tya
		3376	5664 F8A1FA CD 97 FD cmp !DMAC+DMACNT3 ; cmp high count
		3377	5665 F8A1FD D0 DD bne ?08c
		3378	5666 F8A1FF 8D 9C FD sta !DMAWCLRFF ; clear F/F
		3379	5667 F8A202 EA nop
		3380	5668 F8A203 00 00 brk
		3381	5669 F8A205 00 00 brk
		3382	5670 F8A207
		3383	5671 ;---------------------------------------------------------------------------
		3384	5672 ; end of file
		3385	5673 ;---------------------------------------------------------------------------
		3386
		3387
		3388	Lines Assembled : 5506 Errors : 0
		3389
		3390
		3391

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(root)/trunk/sources/lst/F8/fdc.lst – Rev 1