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;;
2
;; Copyright (c) 2016 Marco Granati <mg@unet.bz>
3
;;
4
;; Permission to use, copy, modify, and distribute this software for any
5
;; purpose with or without fee is hereby granted, provided that the above
6
;; copyright notice and this permission notice appear in all copies.
7
;;
8
;; THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9
;; WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10
;; MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11
;; ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12
;; WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13
;; ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14
;; OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15
;;
16
 
17
;; name: sp2.asm
18
;; rev.: 2017/07/04
19
;; bios C816 version v1.0
20
 
21
;; serial port 65C51 & 16C550 handler
22
 
23
_ADDSER_INC_	.SET	1
24
 
25
	.INCLUDE inc\global.inc
26
	.INCLUDE inc\dirp00.inc
27
	.INCLUDE inc\dirp05.inc
28
 
29
.LIST	on
30
 
31
	.CODEF8
32
 
33
	.LONGA	off
34
	.LONGI	off
35
 
36
; set serial port #2 - 65C51
37
; A=mode
38
spset2:
39
	sei			; disable interrupt
40
	phd
41
	pea	#DP05ADDR
42
	pld
43
	sta	spmode3		; save mode
44
	tax
45
	sta	!ACIASR		; software reset
46
	lda	#ACIACMDOFF	; disable all
47
	sta	!ACIACMD
48
	lda	!ACIADR		; clear flags
49
	lda	!ACIASR
50
	and	#01000000B	; get /DSR status
51
	beq	?dsrl
52
	tsb	splin3		; /DSR high
53
	bra	?cts
54
?dsrl:	lda	#01000000B
55
	trb	splin3		; /DSR low
56
?cts:	ldy	#$80
57
	lda	#00001000B	; check /CTS line level: PA<3>
58
	bit	!VIA2+VIAPRANH
59
	beq	?ctsl		; /CTS is low
60
	tya
61
	tsb	splin3		; /CTS is high
62
	bra	?br
63
?ctsl:	tya
64
	trb	splin3		; /CTS is low
65
?br:	txa			; <1:0> = baud rate select
66
	and	#00000011B
67
	sta	sptmp3
68
	lda	!VIA2+VIAPRANH
69
	and	#11111000B	; /RTS low
70
	ora	sptmp3
71
	sta	!VIA2+VIAPRANH
72
	lda	#00010000B	; 8 bits, 1 stop bit, divisor = 1/16
73
	sta	!ACIACTRL
74
	txa			; mode
75
	and	#00001100B	; mask on bits 3 & 2 (parity mode)
76
	asl	a		; shift <3:2> to <6:5>
77
	asl	a
78
	asl	a
79
	ora	#00000101B	; enable all int., /DTR=low
80
	sta	sptmp3		; byte for command register
81
	stz	sppause3	; init work area
82
	stz	spout3
83
	stz	spstat3
84
	bit	spmode3
85
	CPU16			; init buffer's pointer's
86
	bvs	?hw		; hardware handshake
87
	lda	#NGUARD31
88
	ldy	#NFREE31
89
	bra	?do
90
?hw:	lda	#NGUARD32
91
	ldy	#NFREE32
92
?do:	sta	icntmax3
93
	sty	icntmin3
94
	sec
95
	lda	#SIBUFSIZ3
96
	sbc	icntmax3
97
	sta	icntmax3
98
	stz	ibuftail3
99
	stz	ibufhead3
100
	stz	ibufcnt3
101
	stz	obuftail3
102
	stz	obufhead3
103
	stz	obufcnt3
104
	CPU08
105
	bit	spmode3
106
	bpl	?ok		; no handshake
107
	bvc	?ok		; software handshake
108
	bit	splin3		; check /DSR line
109
	bvc	?ok		; remote terminal is connected
110
	;lda	#$20
111
	;tsb	spstat3		; remote terminal not connected now
112
?ok:	lda	.ABS.ACIADR	; discard any pending received data
113
	lda	.ABS.ACIASR	; read current interrupt status
114
	lda	sptmp3		; enable interrupts
115
	sta	.ABS.ACIACMD
116
	pld
117
	cli
118
	rts
119
 
120
; reset serial port #2 - 65C51
121
spres2:
122
	sta	!ACIASR		; software reset
123
	lda	#ACIACMDOFF	; disable all
124
	sta	!ACIACMD
125
	lda	!ACIADR		; clear flags
126
	lda	!ACIASR
127
	rts
128
 
129
; send A to serial port 65C51
130
spput2:
131
	sei			; disable interrupt
132
	phd
133
	pea	#DP05ADDR
134
	pld
135
	stx	sptmp3		; save X reg.
136
	ldy	#0		; Y = 0
137
	INDEX16
138
	ldx	obufcnt3
139
	cpx	#SOBUFSIZ3	; output buffer is full?
140
	bcc	?str		; no, store byte
141
	bit	splin3
142
	bvc	?done		; exit with CF=1, Y=0: output buffer is full
143
	dey
144
	bra	?done		; exit with CF=1, Y=$FF: remote terminal off
145
?str:	inx			; update count
146
	stx	obufcnt3
147
	ldx	obuftail3	; output buffer tail pointer
148
	sta	>SOBUFADDR3,x	; store byte in output buffer
149
	inx			; update tail pointer
150
	cpx	#SOBUFSIZ3
151
	bcc	?upd
152
	tyx			; circular queue
153
?upd:	stx	obuftail3
154
 
155
	; here at least one byte to send so check if tx interrupt is enabled
156
	;
157
	xba			; save A
158
	lda	!ACIACMD
159
	bit	#00000100B	; check CMD<2>
160
	bne	?xba		; tx interrupt enabled
161
	bit	sppause3
162
	bvs	?xba		; local pause is on, can't enable tx interrupt
163
	lda	#00001000B	; first clear CMD<3>
164
	trb	!ACIACMD
165
	lda	#00000100B	; then set CMD<2>
166
	tsb	!ACIACMD	; re-enable tx interrupt
167
?xba:	xba			; return A = sent data
168
	clc			; no error
169
?done:	INDEX08
170
	ldx	sptmp3		; restore X reg.
171
	pld
172
	cli
173
	rts
174
 
175
spget2:
176
	sei			; disable interrupt
177
	phd
178
	pea	#DP05ADDR
179
	pld
180
	sec			; assume error
181
	stx	sptmp3		; save X reg.
182
	lda	spstat3		; rx pending error?
183
	bmi	?done		; yes, exit
184
	lda	#0		; assume no data available
185
	tay			; Y = 0
186
	INDEX16
187
	ldx	ibufcnt3	; available new data?
188
	beq	?done		; input queue is empty (exit with CF=1, A=0)
189
	dex			; update count
190
	stx	ibufcnt3
191
	ldx	ibufhead3	; head input buffer pointer
192
	lda	>SIBUFADDR3,x	; get byte from queue
193
	inx			; update head pointer
194
	cpx	#SIBUFSIZ3
195
	bcc	?upd
196
	tyx			; circular queue
197
?upd:	stx	ibufhead3
198
	bit	sppause3	; remote pause is on?
199
	bpl	?ok		; no
200
	ldx	ibufcnt3
201
	cpx	icntmin3	; can clear remote pause?
202
	bcs	?ok		; no
203
	bit	spmode3		; handshake is on?
204
	bpl	?ok		; no
205
	xba			; save data
206
	bvs	?hw		; hardware handshake
207
	lda	#SPXON		; software handshake: send an XON
208
	sta	spout3		; XON is deffered
209
	lda	#00001100B	; re-enable tx interrupt
210
	trb	!ACIACMD
211
	lda	#00000100B
212
	tsb	!ACIACMD
213
	bra	?xba
214
?hw:	lda	#$04		; hardware handshake: set RTS=0
215
	trb	.ABS.VIA2+VIAPRANH
216
	lda	#$80
217
	trb	sppause3	; clear remote pause flag
218
?xba:	xba			; recover data
219
?ok:	clc
220
?done:	INDEX08
221
	ldx	sptmp3		; restore X reg.
222
	pld
223
	cli
224
	rts			; CF=1 & A=0 mean: no data available
225
 
226
;------------------
227
 
228
; set serial port 16C550
229
; A=mode
230
spset3:
231
	sei			; disable interrupt
232
	phd
233
	pea	#DP05ADDR
234
	pld
235
	sta	spmode4		; save mode
236
	stz	!UART_LCR
237
	stz	!UART_IER	; disable all UART interrupts
238
	stz	!UART_MCR	; /RTS and /DTR high
239
	stz	!UART_FCR	; disable FIFO
240
	ldx	.ABS.UART_RXTX	; clear any pending interrupt
241
	ldx	.ABS.UART_LSR
242
	ldx	.ABS.UART_IIR
243
	ldx	#$80		; set DLAB = 1 in LCR
244
	stx	.ABS.UART_LCR
245
	tay			; save mode
246
	and	#00000011B	; baud rate select
247
	tax
248
	lda	>?div,x		; select divisor
249
	sta	!UART_DLL	; set low latch
250
	stz	!UART_DLH	; set high latch
251
	tya			; mode
252
	and	#00001100B	; mask on bits 3 & 2 (parity mode)
253
	asl	a		; shift <3:2> to <4:3>
254
	ora	#00000011B	; 8N1 (8 bits data, 1 stop bit)
255
	sta	!UART_LCR
256
	lda	!UART_MSR	; get /DSR & /CTS status
257
	tax
258
	asl	a
259
	asl	a		; <7>: /DSR, <6>: /CTS
260
	and	#11000000B
261
	eor	#11000000B
262
	sta	splin4		; update line status
263
	stz	sppause4	; init work area
264
	stz	spstat4
265
	lda	#1		; set tx count = 1
266
	sta	spcnt4
267
	CPU16			; init buffer's pointer's
268
	lda	#NGUARD32
269
	ldy	#NFREE32
270
	sta	icntmax4
271
	sty	icntmin4
272
	sec
273
	lda	#SIBUFSIZ4
274
	sbc	icntmax4
275
	sta	icntmax4
276
	stz	ibuftail4
277
	stz	ibufhead4
278
	stz	ibufcnt4
279
	stz	obuftail4
280
	stz	obufhead4
281
	stz	obufcnt4
282
	CPU08
283
	lda	#00000011B	; set /RTS = /DTR low
284
	sta	!UART_MCR
285
	lda	#$20
286
	bit	spmode4
287
	bne	?nof		; no fifo
288
	lda	#1
289
	sta	!UART_FCR
290
	lda	#10000111B	; enable fifo, reset rx/tx fifo, trigger level = 8
291
	sta	!UART_FCR	; rx fifo trigger = 8
292
	lda	#16		; set tx count = 16 in FIFO mode
293
	sta	spcnt4
294
?nof:	lda	!UART_LSR	; again reset all interrupts
295
	lda	!UART_MSR
296
	lda	!UART_IIR
297
	lda	#00001111B	; enable all interrupts
298
	sta	!UART_IER
299
	pld
300
	cli
301
	rts
302
 
303
; 		19.200, 38.400, 57.600, 115.200
304
?div:	.DB	6, 	3, 	2, 	1
305
 
306
spres3:
307
	;stz	!UART_LCR
308
	stz	!UART_IER	; clear all interrupts
309
	;stz	!UART_MCR	; /RTS and /DTR high
310
	lda	#10000111B	; enable fifo, reset rx/tx fifo
311
	stz	!UART_FCR	; rx fifo trigger = 8
312
	lda	!UART_LSR
313
	lda	!UART_MSR
314
	rts
315
 
316
; send A to serial port 16C550
317
spput3:
318
	sei			; disable interrupt
319
	phd
320
	pea	#DP05ADDR
321
	pld
322
	stx	sptmp4		; save X reg.
323
	ldy	#0		; Y = 0
324
	INDEX16
325
	ldx	obufcnt4
326
	cpx	#SOBUFSIZ4	; output buffer is full?
327
	bcc	?str		; no, store byte
328
	bit	splin4		; test /DSR line status
329
	bmi	?ofl		; remote terminal disconnected
330
	xba			; save A
331
	lda	#00000010B	; enable TX interrupt...
332
	tsb	!UART_IER	; ... hoping that ISR can make room in output buffer
333
	xba
334
	bra	?done		; exit with CF=1, Y=0: output buffer is full
335
?ofl:	dey			; /DSR high
336
	xba
337
	lda	#00000010B
338
	trb	!UART_IER	; disable tx interrupt
339
	xba
340
	bra	?done		; exit with CF=1, Y=$FF: remote terminal offline
341
?str:	inx			; update count
342
	stx	obufcnt4
343
	ldx	obufhead4	; output buffer head pointer
344
	sta	>SOBUFADDR4,x	; store byte in output buffer
345
	inx			; update head pointer
346
	cpx	#SOBUFSIZ4
347
	bcc	?upd
348
	tyx			; circular queue
349
?upd:	stx	obufhead4
350
	xba
351
	;lda	#00000010B
352
	;trb	!UART_IER	; re-enable tx interrupt
353
	lda	#00000010B
354
	tsb	!UART_IER	; re-enable tx interrupt
355
	xba			; return A = sent data
356
	clc			; no error
357
?done:	INDEX08
358
	ldx	sptmp4		; restore X reg.
359
	pld
360
	cli
361
	rts
362
 
363
spget3:
364
	sei			; disable interrupt
365
	phd
366
	pea	#DP05ADDR
367
	pld
368
	sec			; assume error
369
	stx	sptmp4		; save X reg.
370
	lda	spstat4		; rx pending error?
371
	bmi	?done		; yes, exit (CF = 1, A = error code)
372
	lda	#0		; assume no data available
373
	tay			; Y = 0
374
	INDEX16
375
	ldx	ibufcnt4	; available new data?
376
	beq	?done		; input queue is empty (exit with CF=1, A=0)
377
	dex			; update count
378
	stx	ibufcnt4
379
	ldx	ibuftail4	; tail input buffer pointer
380
	lda	>SIBUFADDR4,x	; get byte from queue
381
	inx			; update tail pointer
382
	cpx	#SIBUFSIZ4
383
	bcc	?upd
384
	tyx			; circular queue
385
?upd:	stx	ibuftail4
386
	bit	spmode4		; handshake is on?
387
	bpl	?ok		; no, exit
388
	bit	sppause4	; remote pause is on?
389
	bpl	?ok		; no, exit
390
	ldx	ibufcnt4
391
	cpx	icntmin4	; can clear remote pause?
392
	bcs	?ok		; no, exit
393
	xba			; save data
394
	lda	#00000010B	; hardware handshake...
395
	tsb	!UART_MCR	; ...set /RTS=0
396
	lda	#$80
397
	trb	sppause4	; clear remote pause flag
398
	lda	#00000010B	; set IER<1>
399
	tsb	!UART_IER	; re-enable tx interrupt
400
	xba			; recover data
401
?ok:	clc			; no error
402
?done:	CPU08
403
	ldx	sptmp4		; restore X reg.
404
	pld
405
	cli
406
	rts			; CF=1 & A=0 mean: no data available
407
 
408
;------------------
409
 
410
lspget2:
411
	.PUBLIC lspget2
412
	phb			; save DBR
413
	ldy	#0		; set DBR = $00
414
	phy
415
	plb
416
	txy
417
	bne	?get2
418
	jsr	spget3
419
	plb
420
	rtl
421
?get2:	jsr	spget2
422
	plb
423
	rtl
424
 
425
lspput2:
426
	.PUBLIC lspput2
427
	phb			; save DBR
428
	ldy	#0		; set DBR = $00
429
	phy
430
	plb
431
	txy
432
	bne	?put2
433
	jsr	spput3
434
	plb
435
	rtl
436
?put2:	jsr	spput2
437
	plb
438
	rtl
439
 
440
lspset2:
441
	.PUBLIC lspset2
442
	phb			; save DBR
443
	ldy	#0		; set DBR = $00
444
	phy
445
	plb
446
	txy
447
	bne	?set2
448
	jsr	spset3
449
	plb
450
	rtl
451
?set2:	jsr	spset2
452
	plb
453
	rtl
454
 
455
lspres2:
456
	.PUBLIC lspres2
457
	phb			; save DBR
458
	ldy	#0		; set DBR = $00
459
	phy
460
	plb
461
	txy
462
	bne	?res2
463
	jsr	spres3
464
	plb
465
	rtl
466
?res2:	jsr	spres2
467
	plb
468
	rtl
469
 
470
test0:
471
	sei
472
	phd
473
	pea	#DP05ADDR
474
	pld
475
	sta	sptmp4
476
	lda	#0
477
	sta	!UART_FCR
478
 
479
	lda	sptmp4
480
?00:	dec	a
481
	bne	?00
482
 
483
	lda	#'@'
484
	ldx	#15
485
	xba
486
?01:	lda	#$20
487
	bit	!UART_LSR
488
	nop
489
	nop
490
	nop
491
	nop
492
	beq	?01
493
 
494
	lda	sptmp4
495
?02:	dec	a
496
	bne	?02
497
 
498
	xba
499
	sta	!UART_RXTX
500
	inc	a
501
	xba
502
 
503
	lda	sptmp4
504
?02a:	dec	a
505
	bne	?02a
506
 
507
	dex
508
	bne	?01
509
 
510
?03:	lda	#$20
511
	bit	!UART_LSR
512
	nop
513
	nop
514
	nop
515
	nop
516
	beq	?03
517
 
518
	lda	sptmp4
519
?02b:	dec	a
520
	bne	?02b
521
 
522
	lda	#$0D
523
	sta	!UART_RXTX
524
	lda	sptmp4
525
	pld
526
	cli
527
	brk
528
 
529
test1:
530
	sei
531
	phd
532
	pea	#DP05ADDR
533
	pld
534
	sta	sptmp4
535
	lda	#1
536
	sta	!UART_FCR
537
 
538
	lda	sptmp4
539
?00:	dec	a
540
	bne	?00
541
 
542
	lda	#'@'
543
	ldx	#15
544
	xba
545
?01:	lda	#$20
546
	bit	!UART_LSR
547
	nop
548
	nop
549
	nop
550
	nop
551
	beq	?01
552
 
553
	lda	sptmp4
554
?02:	dec	a
555
	bne	?02
556
 
557
?0l:	xba
558
	sta	!UART_RXTX
559
	inc	a
560
	xba
561
 
562
	lda	sptmp4
563
?02a:	dec	a
564
	bne	?02a
565
 
566
	dex
567
	bne	?0l
568
 
569
	lda	#$0D
570
	sta	!UART_RXTX
571
	lda	sptmp4
572
	pld
573
	cli
574
	brk
575
 
576
test2:
577
	sei
578
	phd
579
	pea	#DP05ADDR
580
	pld
581
	ldy	#0
582
	lda	#1
583
	sta	!UART_FCR
584
?00:	lda	#'@'
585
	ldx	#15
586
	xba
587
?01:	lda	#$20
588
	bit	!UART_LSR
589
	nop
590
	nop
591
	nop
592
	nop
593
	beq	?01
594
 
595
?ll:	xba
596
	sta	!UART_RXTX
597
	inc	a
598
	xba
599
	dex
600
	bne	?ll
601
 
602
	lda	#$0D
603
	sta	!UART_RXTX
604
	dey
605
	bne	?00
606
	pld
607
	cli
608
	brk
609
 
610
;==========================================
611
; UM245R
612
 
613
umgetcmd:
614
	.PUBLIC umgetcmd
615
 
616
	lda	#$40
617
	trb	usbum		; clear bit <6>: fifo data not available
618
	bit	usbum
619
	bmi	?cmd		; already connected: check command
620
 
621
	; check connession request
622
	ldx	#7
623
?chk1:	lda	usbbuf,x
624
	cmp	>?usbconn,x
625
	beq	?nxt
626
?nack:	lda	#$55		; NACK
627
	sta	!UM245R
628
	rtl
629
?nxt:	dex
630
	bpl	?chk1
631
	lda	#$AA		; ACK
632
	sta	!UM245R
633
	lda	#$80
634
	tsb	usbum
635
	rtl
636
?cmd:	ldx	#(?usbtab2 - ?usbtab1 - 1)
637
	lda	usbbuf
638
?cmdl:	cmp	>?usbtab1,x
639
	beq	?cmd2
640
	dex
641
	bpl	?cmdl
642
	bmi	?nack		; not found
643
?cmd2:	lda	usbbuf+1
644
	cmp	>?usbtab2,x
645
	bne	?nack		; not found
646
	txa
647
	asl	a
648
	tax
649
	lda	#CA2IFRB	; disable CA2 interrupt
650
	sta	!VIA2+VIAIER
651
	sta	!VIA2+VIAIFR
652
	jsr	usbsndack
653
	jsr	(?umjmp,x)
654
	sei
655
	lda	#SETFRB.OR.CA2IFRB ; enable CA2 interrupt
656
	sta	!VIA2+VIAIER
657
	sta	!VIA2+VIAIFR
658
	rtl
659
 
660
?umjmp:
661
	.DW	usbgetfmw
662
 
663
?usbconn:
664
	.DB	$87, $E9, $5D, $93, $B7, $57, $7D, $3B
665
 
666
?usbtab1:
667
	.DB	$99
668
 
669
?usbtab2:
670
	.DB	$51
671
 
672
 
673
; get firmware (512K)
674
usbgetfmw:
675
	cli
676
	stz	usbptr
677
	stz	usbptr+1
678
	lda	#$70
679
	sta	usbptr+2	; put firmware in bank $30
680
	stz	usbsiz		; full 64K bank
681
	stz	usbsiz+1
682
	lda	#$08		; 8 banks
683
	sta	usbtmp
684
?lp:	lda	#$08
685
	sec
686
	sbc	usbtmp
687
	pha
688
	phk
689
	pea	#!?fmt1
690
	lda	#5
691
	pha
692
	BPRINTF
693
	jsr	usbgetblk
694
	bcs	?err		; error
695
	jsr	usbsndack
696
	SCNPRINT
697
	.DB	'done.', 13, 0
698
	inc	usbptr+2
699
	dec	usbtmp
700
	bne	?lp
701
 
702
	lda	#$70
703
	sta	usbptr+2
704
	stz	usbcmp
705
	lda	#$08		; 8 banks
706
	sta	usbtmp
707
?lp2:	lda	#$08
708
	sec
709
	sbc	usbtmp
710
	pha
711
	phk
712
	pea	#!?fmt3
713
	lda	#5
714
	pha
715
	BPRINTF
716
 
717
	;jsr	usbcmpblk
718
	;bcs	?err		; error
719
	;bit	usbcmp
720
	;bpl	?ok
721
	;jsr	usbsndnack
722
	;bra	?err
723
?ok:	;jsr	usbsndack
724
 
725
	jsr	usbputbank
726
	bcs	?err
727
 
728
	SCNPRINT
729
	.DB	'done.', 13, 0
730
	inc	usbptr+2
731
	dec	usbtmp
732
	bne	?lp2
733
 
734
.COMMENT @
735
	; send back for check
736
	lda	#$08		; 8 banks
737
	sta	usbtmp
738
	lda	#$70
739
	sta	usbptr+2
740
?lp1:	lda	#$08
741
	sec
742
	sbc	usbtmp
743
	pha
744
	phk
745
	pea	#!?fmt2
746
	lda	#5
747
	pha
748
	BPRINTF
749
	;jsr	usbputblk
750
	jsr	usbputbank
751
	;jsr	usbrx
752
	bcs	?err
753
	;bne	?err		; NACK
754
	SCNPRINT
755
	.DB	'done.', 13, 0
756
	inc	usbptr+2
757
	dec	usbtmp
758
	bne	?lp1
759
@
760
 
761
	; wait final ACK
762
	jsr	usbrx
763
	bcs	?err
764
	bne	?err		; NACK
765
	SCNPRINT
766
	.DB	'OK.', 13, 0
767
	rts
768
?err:
769
	SCNPRINT
770
	.DB	'error.', 13, 0
771
	rts
772
 
773
?fmt1:	.DB	'get firmware bank %bu...', 0
774
?fmt2:	.DB	'send back    bank %bu...', 0
775
?fmt3:	.DB	'verf. firmw. bank %bu...', 0
776
 
777
; get block: size in usbsiz, dest in usbptr
778
usbgetblk:
779
	ldy	#0
780
	INDEX16
781
	ldx	usbsiz
782
	lda	#CA2IFRB	; check CA2 flag
783
?lp:	bit	!VIA2+VIAPRANH	; check /TXE
784
	bvs	?err		; /TXE is high: disconnession?
785
	bit	VIA2+VIAIFR	; check CA2 flag
786
	beq	?lp
787
	sta	!VIA2+VIAIFR	; clear CA2 flag
788
	xba
789
	lda	!UM245R
790
	sta	[usbptr],y
791
	xba
792
	iny
793
	dex
794
	bne	?lp
795
	clc
796
	INDEX08
797
	rts
798
?err:	CPU08SEC
799
	rts
800
 
801
; cmp block: size in usbsiz, dest in usbptr
802
usbcmpblk:
803
	ldy	#0
804
	INDEX16
805
	ldx	usbsiz
806
	lda	#CA2IFRB	; check CA2 flag
807
?lp:	bit	!VIA2+VIAPRANH	; check /TXE
808
	bvs	?err		; /TXE is high: disconnession?
809
	bit	VIA2+VIAIFR	; check CA2 flag
810
	beq	?lp
811
	sta	!VIA2+VIAIFR	; clear CA2 flag
812
	xba
813
	lda	!UM245R
814
	cmp	[usbptr],y
815
	beq	?02
816
	lda	#$80
817
	sta	usbcmp
818
?02:	xba
819
	iny
820
	dex
821
	bne	?lp
822
	clc
823
	INDEX08
824
	rts
825
?err:	CPU08SEC
826
	rts
827
 
828
; put a full: source in usbptr
829
usbputbank:
830
	sei
831
	ldy	#0
832
?lp:	lda	!VIA2+VIAPRANH	; check /TXE
833
	cmp	!VIA2+VIAPRANH
834
	bne	?lp
835
	asl	a
836
	bmi	?lp
837
	lda	[usbptr],y
838
	sta	>UM245R
839
	iny
840
	bne	?lp
841
	;jsr	usbrx
842
	;bcs	?rts
843
	;bne	?err		; NACK
844
	inc	usbptr+1
845
	bne	?lp
846
	clc
847
?rts:	cli
848
	rts
849
?err:	sec
850
	cli
851
	rts
852
 
853
; put block: size in usbsiz, dest in usbptr
854
usbputblk:
855
	ldy	#0
856
	INDEX16
857
	ldx	usbsiz
858
;	bra	?lp
859
;?lp0:	bit	!VIA2+VIAPRANH	; check /TXE
860
;	bvs	?lp
861
;	bvc	?lp0
862
?lp:	bit	!VIA2+VIAPRANH	; check /TXE
863
	;cmp	!VIA2+VIAPRANH
864
	;bne	?lp
865
	;asl	a
866
	;bmi	?lp		; /TXE is high
867
	bvs	?lp
868
	lda	[usbptr],y
869
	sta	!UM245R
870
	iny
871
	dex
872
	bne	?lp
873
	clc
874
	INDEX08
875
	rts
876
 
877
; send nack
878
usbsndnack:
879
	lda	#$55
880
	bra	usbsnd
881
 
882
; send ack
883
usbsndack:
884
	lda	#$AA
885
 
886
; send a byte
887
usbsnd:
888
?lp:	bit	!VIA2+VIAPRANH	; check /TXE
889
	bvs	?lp		; /TXE is high
890
	sta	!UM245R
891
	rts
892
 
893
usbrx:
894
	lda	#CA2IFRB	; check CA2 flag
895
?lp:	bit	!VIA2+VIAPRANH	; check /TXE
896
	bvs	?err		; /TXE is high: disconnession?
897
	bit	VIA2+VIAIFR	; check CA2 flag
898
	beq	?lp
899
	sta	!VIA2+VIAIFR	; clear CA2 flag
900
	lda	!UM245R
901
	cmp	#$AA
902
	clc
903
	rts
904
?err:	sec
905
	rts