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Rev | Author | Line No. | Line |
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1 | - | 1 | OrCAD LOGIC COMPILER v2.01 N 12/09/94 (Source file .\PLD\#0164.PLD) |
2 | |||
3 | 1 || FILE: #0164.PLD |
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4 | 2 || PROJ: 20170501 |
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5 | 3 || FD-02 FDC/ATA/DMA BOARD |
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6 | 4 || |
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7 | 5 || PART: G16V8-#0164 |
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8 | 6 || |
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9 | 7 || DEV : GAL16V8 |
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10 | 8 || |
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11 | 9 || DESC: USB/VIA DECODER |
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12 | 10 || |
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13 | 11 | |
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14 | 12 |GAL16V8A |
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15 | 13 | |
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16 | 14 || INPUT |
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17 | 15 | 1:A1, 2:A2, 3:A3, 4:A4, 5:A5, 6:A6, 7:IO, 8:PHI2, 9:RW, 11:PHI0, |
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18 | 16 | 12:MW0, 13:P1IN, |
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19 | 17 || OUTPUT |
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20 | 18 | 14:USB, 15:RD, 16:WE, 17:VIA, 18:GEN, 19:PHI1 |
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21 | 19 | |
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22 | 20 | ACTIVE-LOW: USB, RD, WE, VIA |
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23 | 21 | |
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24 | 22 | PROPERTY:"SIMPLE" |
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25 | 23 | |
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26 | 24 | SIGNATURE: "0164 " |
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27 | 25 | |
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28 | 26 || -------------------------------------------------------- |
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29 | 27 || |
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30 | 28 | PHI1 = PHI2' || inverted phase 2 (connect to 01IN) |
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31 | 29 | GATE = PHI0 # PHI2 # P1IN' || gate enable strobe |
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32 | 30 | GEN = GATE |
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33 | 31 | FDD0 = IO' & A6 & A5' & A4 || select FDD0-FDD0 |
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34 | 32 | SUSB = FDD0 & A3' & A2' & A1' || usb select FDD0-FDD1 |
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35 | 33 | VIA = IO' & A6 & A5' & A4' || via select FDC0-FDCF |
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36 | 34 | USB = SUSB & GATE || usb select FDD0-FDD1 |
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37 | 35 | RD = SUSB & RW & PHI2 |
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38 | 36 | UW0 = SUSB & RW' & PHI2 & MW0 |
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39 | 37 | UW1 = SUSB & RW' & PHI0 & MW0' |
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40 | 38 | WE = UW0 # UW1 |
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41 | |||
42 | |||
43 | |||
44 | I201 No warnings. |
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45 | |||
46 | |||
47 | |||
48 | I203 Memory usage 80K |
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49 | I204 Elapsed time 1 second |
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50 | OrCAD DEVICE FITTER v2.01 12/09/94 (Source file .\PLD\#0164.PLA) |
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51 | |||
52 | I289 Simple GAL architecture selected. |
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53 | |||
54 | |||
55 | |||
56 | |||
57 | |||
58 | |||
59 | |||
60 | |||
61 | |||
62 | 9 PHI0 |
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63 | |||
64 | |||
65 | VIA 16 A4' A5' A6 IO' |
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66 | |||
67 | |||
68 | 41 A1' A2' A3' A4 A5' A6 IO' PHI0 |
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69 | |||
70 | |||
71 | RD 32 A1' A2' A3' A4 A5' A6 IO' PHI2 RW |
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72 | |||
73 | |||
74 | 25 A1' A2' A3' A4 A5' A6 IO' RW' PHI0 MW0' |
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75 | |||
76 | |||
77 | |||
78 | |||
79 | |||
80 | |||
81 | |||
82 | |||
83 | 1. A1 2 - - - High (Clock) |
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84 | 2. A2 0 - - - High |
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85 | 3. A3 4 - - - High |
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86 | |||
87 | 5. A5 12 - - - High |
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88 | 6. A6 16 - - - High |
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89 | 7. IO 20 - - - High |
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90 | 8. PHI2 24 - - - High |
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91 | 9. RW 28 - - - High |
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92 | 11. PHI0 30 - - - High (Enable) |
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93 | 12. MW0 26 56 8 0 High |
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94 | 13. P1IN 22 48 8 0 High |
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95 | 14. USB 19 40 8 3 Low |
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96 | 15. RD 1 32 8 1 Low |
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97 | 16. WE 1 24 8 2 Low |
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98 | 17. VIA 15 16 8 1 Low |
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99 | 18. GEN 10 8 8 3 High |
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100 | 19. PHI1 6 0 8 1 High |
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101 | ---- ---- |
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102 | 64 11 (17%) |
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103 | |||
104 | |||
105 | I200 No fatal errors found in source code (device phase). |
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106 | I201 No warnings. |
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107 | |||
108 | |||
109 | OrCAD DEVICE |
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110 | Type: GAL16V8 |
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111 | |||
112 | |||
113 | |||
114 | L0000 11 11 11 11 11 11 11 11 11 11 11 11 10 11 11 11 * |
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115 | L0256 11 11 11 11 11 11 11 11 11 11 11 11 01 11 11 11 * |
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116 | L0288 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 01 * |
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117 | L0320 11 11 11 11 11 11 11 11 11 11 11 10 11 11 11 11 * |
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118 | L0512 11 11 11 11 10 11 10 11 01 11 10 11 11 11 11 11 * |
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119 | L0768 10 10 10 11 01 11 10 11 01 11 10 11 01 01 10 11 * |
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120 | L0800 10 10 10 11 01 11 10 11 01 11 10 11 11 10 10 01 * |
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121 | L1024 10 10 10 11 01 11 10 11 01 11 10 11 01 11 01 11 * |
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122 | L1280 10 10 10 11 01 11 10 11 01 11 10 11 01 11 11 11 * |
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123 | L1312 10 10 10 11 01 11 10 11 01 11 10 11 11 11 11 01 * |
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124 | L1344 10 10 10 11 01 11 10 11 01 11 10 10 11 11 11 11 * |
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125 | L2048 11 00 00 11 00 11 00 00 00 11 00 01 00 11 01 10 * |
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126 | L2080 00 11 01 00 00 10 00 00 00 10 00 00 00 10 00 00 * |
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127 | L2112 00 10 00 00 00 00 00 11 11 11 11 11 11 11 11 11 * |
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128 | L2144 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 * |
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129 | L2176 11 11 11 11 11 11 11 11 10 * |
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130 | C31A3* |
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131 | |||
132 | I202 4/25/17 8:07 pm (Tuesday) |
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133 | I203 Memory usage 6K |
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134 | I204 Elapsed time 1 second |
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135 |