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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 1 | - | 1 | || FILE: #9006.PLD |
| 2 | || PROJ: 20130517 |
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| 3 | || PART: G16V8-#9006 |
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| 4 | || |
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| 5 | || DEV : GAL16V8 |
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| 6 | || |
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| 7 | || DESC: DPRAM CONTROL |
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| 8 | || |
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| 9 | | |
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| 10 | |GAL16V8A |
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| 11 | | |
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| 12 | || INPUT |
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| 13 | | 1:A10, 2:A11, 3:A12, 4:CX1, 5:RW, 6:PHI2, 7:RES, 8:WP, 9:REN, 11:X, |
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| 14 | || OUTPUT |
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| 15 | | 12:RAMN, 13:CE0, 14:CE1, 15:CE2, 16:Y, 17:VRMN, 18:RS, 19:INH |
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| 16 | | |
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| 17 | || |
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| 18 | | ACTIVE-LOW: CE0, CE1, CE2, RAMN, VRMN |
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| 19 | | |
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| 20 | | PROPERTY: "SIMPLE" |
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| 21 | | |
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| 22 | | SIGNATURE: "9006 " |
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| 23 | | |
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| 24 | || -------------------------------------------------------- |
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| 25 | || RAM0, RAM1, RAM2 |
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| 26 | | RAM0 = (CX1' & A12' & A11') |
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| 27 | | RAM1 = (CX1' & A12' & A11) |
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| 28 | | RAM2 = (CX1' & A12 & A11' & A10') |
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| 29 | | VRAM = (RAM0 # RAM1 # RAM2) |
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| 30 | | CE0R = (RAM0 & RW & PHI2) |
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| 31 | | CE0W = (RAM0 & RW' & REN') |
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| 32 | | CE1R = (RAM1 & RW & PHI2) |
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| 33 | | CE1W = (RAM1 & RW' & REN') |
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| 34 | | CE2R = (RAM2 & RW & PHI2) |
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| 35 | | CE2W = (RAM2 & RW' & REN') |
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| 36 | | CE0 = (CE0R # CE0W) |
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| 37 | | CE1 = (CE1R # CE1W) |
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| 38 | | CE2 = (CE2R # CE2W) |
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| 39 | | INH = (VRAM & RW' & REN') |
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| 40 | | RAMN = ((VRAM & RW & PHI2) # (VRAM & RW' & WP)) |
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| 41 | | Y = X |
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| 42 | | VRMN = (VRAM & RW') |
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| 43 | | RS = RES |