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Rev | Author | Line No. | Line |
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1 | - | 1 | || FILE: #9005.PLD |
2 | || PROJ: 20130517 |
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3 | || PART: G20V8-#9005 |
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4 | || |
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5 | || DEV : GAL20V8 |
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6 | || |
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7 | || DESC: I/O DECODER & CONTROL |
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8 | || |
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9 | | |
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10 | |GAL20V8A |
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11 | | |
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12 | || INPUT |
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13 | | 1:A1, 2:A2, 3:A3, 4:A4, 5:A5, 6:A6, 7:A7, 8:IO0, 9:RW, 10:PHI2, |
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14 | | 11:EN, 13:RDYN, 14:RAMN, 23:-, |
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15 | || OUTPUT |
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16 | | 22:DBE, 21:VDC, 20:PIA, 19:WFF, 18:CRD, 17:CWE, 16:RD, 15:WIO |
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17 | | |
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18 | | SIGNATURE: "9005 " |
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19 | | |
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20 | | ACTIVE-LOW: DBE, VDC, PIA, WFF, CRD, CWE, RD, WIO |
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21 | | |
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22 | | PROPERTY: "SIMPLE" |
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23 | | |
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24 | || -------------------------------------------------------- |
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25 | || IO SELECT => FF70-FF77 (65C02) - FC70-FC77 (65C816) |
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26 | | IOS = (IO0' & A7' & A6 & A5 & A4 & A3') |
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27 | || R6545/HD6445 => FF70-FF71 / FC70-FC71 |
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28 | | CRTC = (IOS & A2' & A1') |
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29 | || REGISTRO WRITE ONLY => FF72 |
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30 | | WREG = (IOS & A2' & A1 & RW') |
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31 | || PIA 65C21 => FF74-FF77 / FC74-FC77 |
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32 | | PIAS = (IOS & A2) |
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33 | || RD => segnale OE per RAM |
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34 | | RD = (RW & PHI2) |
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35 | || CRD, CWE => segnali read,write per HD6545 (qualificati con EN) |
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36 | | CRD = (CRTC & RW & EN) |
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37 | | CWE = (CRTC & RW' & EN) |
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38 | || ABILITAZIONE CRTC e PIA |
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39 | | PIA = PIAS |
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40 | | VDC = CRTC |
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41 | || CLOCK per registro FF |
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42 | | WFF = (WREG & RDYN) |
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43 | || SEGNALE WAIT I/O |
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44 | | WIO = (CRTC # WREG) |
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45 | || SEGNALE ABILITAZIONE 74x245 |
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46 | | DBEIO = ((CRTC & EN) # (WREG & (EN # RDYN)) # (PIAS & PHI2)) |
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47 | | DBEM = RAMN' |
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48 | | DBE = (DBEIO # DBEM) |