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Rev | Author | Line No. | Line |
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1 | - | 1 | || FILE: #0007.PLD |
2 | || PROJ: 20120605 |
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3 | || PART: G26CV12-#0007 |
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4 | || |
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5 | || DEV : GAL26CV12 |
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6 | || |
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7 | || DESC: DECODER MEMORIA DI SISTEMA |
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8 | || |
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9 | | |
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10 | |GAL26CV12 |
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11 | | |
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12 | || INPUT |
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13 | | 1:MA19, 2:MA20, 3:CS0, 4:CS2, 5:CS3, 6:CSF, 8:CX1, 9:PHI0, 10:RW, |
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14 | | 11:PHI2, 12:MW0, 13:-, 14:-, 28:CPU, |
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15 | || OUTPUT |
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16 | | 15:G, 16:CE0, 17:CE2, 18:CE3, 19:CEF, 20:WE, 22:RD, 23:CE4, |
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17 | | 24:CE5, 25:CE6, 26:CE7, 27:CE8 |
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18 | | |
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19 | | ACTIVE-LOW: G, CE0, CE2, CE3, CEF, WE, RD, CE4, CE5, CE6, CE7, CE8 |
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20 | | |
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21 | | |
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22 | | SIGNATURE: "0007 " |
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23 | | |
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24 | || |
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25 | || BUFFER 2MB - ABILITATO DA /CX1 |
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26 | | CE4 = (CX1' & PHI2 & MA20' & MA19') |
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27 | | CE5 = (CX1' & PHI2 & MA20' & MA19) |
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28 | | CE6 = (CX1' & PHI2 & MA20 & MA19') |
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29 | | CE7 = (CX1' & PHI2 & MA20 & MA19) |
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30 | || |
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31 | || RAM 512K PER CPU 8 BIT - ABILITATA DA /CS0 |
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32 | | CE8 = (CS0' & PHI2 & CPU') |
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33 | || |
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34 | || RAM 128K PER CPU 16 BIT - ABILITATA DA /CS0 |
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35 | | CE0 = (CS0' & PHI2 & CPU) |
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36 | || |
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37 | || RAM 128K - ABILITATE DA /CS2 e /CS3 |
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38 | | CE2 = (CS2' & PHI2) |
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39 | | CE3 = (CS3' & PHI2) |
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40 | || |
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41 | || FLASH 512K (16 bit) / 256K (8 bit - A18 = 0) ABILITATA DA /CSF |
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42 | | CEF = (CSF' & PHI2) |
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43 | || |
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44 | || BUFFER DATI |
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45 | | MS = (CS0' # CS2' # CS3' # CSF' # CX1') |
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46 | | G = (MS & PHI2) |
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47 | || |
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48 | || READ & WRITE ENABLE |
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49 | | RD = (MS & PHI2 & RW) |
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50 | | WRA = (MS & PHI2 & RW' & MW0) |
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51 | | WRB = (MS & PHI0 & RW' & MW0') |
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52 | | WE = (WRA # WRB) |