WebSVN – MB01 Project – Blame – /trunk/gal/20120602-MB01-65C02/PLD/#0005.LST

Rev	Author	Line No.	Line
1	-	1	OrCAD LOGIC COMPILER v2.01 N 12/09/94 (Source file .\PLD\#0005.PLD)
		2
		3	1 \|\| FILE: #0005.PLD
		4	2 \|\| PROJ: 20120602
		5	3 \|\| PART: G26CV12-#0005
		6	4 \|\|
		7	5 \|\| DEV : GAL26CV12
		8	6 \|\|
		9	7 \|\| DESC: DECODER MEMORIA
		10	8 \|\|
		11	9 \|
		12	10 \|GAL26CV12
		13	11 \|
		14	12 \|\| INPUT
		15	13 \| 1:A7, 2:A8, 3:A9, 4:A10, 5:A11, 6:A12, 8:A13, 9:A14, 10:A15,
		16	14 \| 11:RES, 12:XE0, 13:XE1, 14:XE2, 28:CLB,
		17	15 \|\| OUTPUT
		18	16 \| 15:IO0, 16:IO1, 17:DHS, 18:SYS, 19:ML, 20:MH, 22:PBE, 23:DB0,
		19	17 \| 24:PB0, 25:CX0, 26:CX1, 27:CX2
		20	18 \|
		21	19 \| ACTIVE-LOW: CX0, CX1, CX2, IO0, IO1
		22	20 \|
		23	21 \|
		24	22 \| SIGNATURE: "0005 "
		25	23 \|
		26	24 \|\|
		27	25 \| BLK0 = (RES & A15' & A14' & A13')
		28	26 \| BLK1 = (RES & A15' & A14' & A13)
		29	27 \| BLK2 = (RES & A15' & A14 & A13')
		30	28 \| BLK3 = (RES & A15' & A14 & A13)
		31	29 \| CX0 = (BLK1 & XE0 & CLB')
		32	30 \| CX1 = (BLK2 & XE1 & CLB')
		33	31 \| CX2 = (BLK3 & XE2 & CLB')
		34	32 \|\| RAM DBR LOW
		35	33 \| BLK1A = ((BLK1 & XE0') # (BLK1 & CLB))
		36	34 \| BLK2A = ((BLK2 & XE1') # (BLK2 & CLB))
		37	35 \| BLK3A = ((BLK3 & XE2') # (BLK3 & CLB))
		38	36 \| ML = (BLK0 # BLK1A # BLK2A # BLK3A)
		39	37 \|\|
		40	38 \|\| BLK4 => 8000 - BFFF 16K
		41	39 \| B4 = (A15 & A14')
		42	40 \|\| BLK5 => C000 - DFFF 8K
		43	41 \| B5 = (A15 & A14 & A13')
		44	42 \|\| BLK6 => E000 - EFFF 4K
		45	43 \| B6 = (A15 & A14 & A13 & A12')
		46	44 \|\| BLK7 => F000 - F7FF 2K
		47	45 \| B7 = (A15 & A14 & A13 & A12 & A11')
		48	46 \|\| BLK8 => F800 - FBFF 1K
		49	47 \| B8 = (A15 & A14 & A13 & A12 & A11 & A10')
		50	48 \|\| BLK9 => FC00 - FDFF 512B
		51	49 \| B9 = (A15 & A14 & A13 & A12 & A11 & A10 & A9')
		52	50 \|\| BLK91 => FD00 - FDFF 256 B
		53	51 \| B91 = (A15 & A14 & A13 & A12 & A11 & A10 & A9' & A8)
		54	52 \|\| BLK10 => FE00 - FEFF 256B (I/O 1)
		55	53 \| B10 = (A15 & A14 & A13 & A12 & A11 & A10 & A9 & A8')
		56	54 \|\| BLK11 => FF00 - FF7F 128B (I/O 0)
		57	55 \| B11 = (A15 & A14 & A13 & A12 & A11 & A10 & A9 & A8 & A7')
		58
		59
		60	58 \|\|
		61	59 \| IO0 = (RES & B11)
		62	60 \| IO1 = (RES & B10)
		63	61 \|\|
		64	62 \| MH = ((B4 # B5 # B6 # B7 # B8 # B9) & RES)
		65	63 \|\|
		66	64 \| PBE = ((B4 # B5 # B6 # B7 # B8 # B9 # B12) & RES)
		67	65 \|\|
		68	66 \|\| SELEZIONE DBR HIGH
		69	67 \| X0 = (A15)
		70	68 \| X1 = (A15' & A14)
		71	69 \| X2 = (A15' & A14' & A13)
		72	70 \| X3 = (A15' & A14' & A13' & A12)
		73	71 \| X4 = (A15' & A14' & A13' & A12' & A11)
		74	72 \| DHS = (X0 # X1 # X2 # X3 # X4)
		75	73 \|\|
		76	74 \|\| PAGINE COMUNI IN BANCO 0
		77	75 \|\| P00 => 0080 - 00FF
		78	76 \| P00 = (A15' & A14' & A13' & A12' & A11' & A10' & A9' & A8' & A7)
		79	77 \|\| P01 => 0100 - 01FF
		80	78 \| P01 = (A15' & A14' & A13' & A12' & A11' & A10' & A9' & A8)
		81	79 \|\| P02 => 0200 - 02FF
		82	80 \| P02 = (A15' & A14' & A13' & A12' & A11' & A10' & A9 & A8')
		83	81 \|\| P03 => 0300 - 03FF
		84	82 \| P03 = (A15' & A14' & A13' & A12' & A11' & A10' & A9 & A8)
		85	83 \|\| P04 => 0400 - 03FF
		86	84 \| P04 = (A15' & A14' & A13' & A12' & A11' & A10 & A9' & A8')
		87	85 \|\| P05 => 0500 - 05FF
		88	86 \| P05 = (A15' & A14' & A13' & A12' & A11' & A10 & A9' & A8)
		89	87 \| CMR = (P00 # P01 # P02 # P03 # P04 # P05)
		90	88 \|\|
		91	89 \|\| FORZATURA DBR IN BANCO 0
		92	90 \| DB0 = (CMR # CLB)
		93	91 \|\|
		94	92 \|\| FORZATURA PBR IN BANCO 0
		95	93 \| PB0 = (B91 # B12 # CLB)
		96	94 \| SYS = ((B91 # B12) & RES)
		97
		98
		99
		100
		101
		102
		103	I202 7/5/12 7:24 pm (Thursday)
		104
		105
		106	OrCAD DEVICE FITTER v2.01 12/09/94 (Source file .\PLD\#0005.PLA)
		107
		108
		109
		110	RESOLVED EXPRESSIONS (Reduction 0)
		111
		112
		113
		114
		115
		116
		117
		118
		119
		120
		121	76 A13' A14 A15' RES CLB
		122
		123	78 A13 A14' A15' RES CLB
		124
		125	80 A13 A14 A15' RES CLB
		126	81 A13' A14' A15' RES
		127
		128	IO0 113 A7' A8 A9 A10 A11 A12 A13 A14 A15 RES
		129
		130	IO1 104 A8' A9 A10 A11 A12 A13 A14 A15 RES
		131
		132
		133	63 A10' A11 A12 A13 A14 A15 RES
		134
		135	65 A12' A13 A14 A15 RES
		136
		137	67 A14' A15 RES
		138
		139	PBE 49 A7 A8 A9 A10 A11 A12 A13 A14 A15 RES
		140	50 A9' A10 A11 A12 A13 A14 A15 RES
		141	51 A10' A11 A12 A13 A14 A15 RES
		142	52 A11' A12 A13 A14 A15 RES
		143
		144	54 A13' A14 A15 RES
		145	55 A14' A15 RES
		146
		147	SYS 86 A7 A8 A9 A10 A11 A12 A13 A14 A15 RES
		148	87 A8 A9' A10 A11 A12 A13 A14 A15 RES
		149
		150	DHS 95 A11 A12' A13' A14' A15'
		151
		152	97 A13 A14' A15'
		153	98 A14 A15'
		154
		155
		156	DB0 38 A7 A8' A9' A10' A11' A12' A13' A14' A15'
		157	39 A8' A9' A10 A11' A12' A13' A14' A15'
		158	40 A8' A9 A10' A11' A12' A13' A14' A15'
		159	41 A8 A9' A10' A11' A12' A13' A14' A15'
		160
		161	43 A8 A9 A10' A11' A12' A13' A14' A15'
		162	44 CLB
		163
		164	PB0 29 A7 A8 A9 A10 A11 A12 A13 A14 A15
		165	30 A8 A9' A10 A11 A12 A13 A14 A15
		166	31 CLB
		167
		168
		169
		170	SIGNAL ASSIGNMENT
		171	Rows
		172
		173
		174
		175
		176
		177	3. A9 8 - - - High
		178	4. A10 12 - - - High
		179	5. A11 16 - - - High
		180	6. A12 20 - - - High
		181
		182	9. A14 28 - - - High
		183	10. A15 32 - - - High
		184	11. RES 36 - - - High
		185	12. XE0 40 - - - High
		186	13. XE1 44 - - - High
		187	14. XE2 48 - - - High
		188	15. IO0 51 112 9 1 Low (Three-state)
		189	16. IO1 47 103 9 1 Low (Three-state)
		190	17. DHS 42 94 9 5 High (Three-state)
		191	18. SYS 38 85 9 2 High (Three-state)
		192	19. ML 34 74 11 7 High (Three-state)
		193	20. MH 30 61 13 6 High (Three-state)
		194	22. PBE 26 48 13 7 High (Three-state)
		195	23. DB0 22 37 11 7 High (Three-state)
		196	24. PB0 18 28 9 3 High (Three-state)
		197	25. CX0 15 19 9 1 Low (Three-state)
		198	26. CX1 11 10 9 1 Low (Three-state)
		199	27. CX2 7 1 9 1 Low (Three-state)
		200	28. CLB 2 - - - High
		201	29. - - 0 1 0
		202	30. - - 121 1 0
		203	---- ----
		204	122 42 (34%)
		205
		206
		207	I200 No fatal errors found in source code (device phase).
		208	I201 No warnings.
		209
		210
		211	OrCAD DEVICE
		212
		213
		214	QP28* QF6432* QV1024*
		215	F0*
		216
		217
		218
		219	L0572 1110111111111111111111111011011110110111111101111111*
		220	L0988 1111111111111111111111111111111111111111111111111111*
		221	L1040 1110111111111111111111110111101110110111011111111111*
		222	L1456 1111111111111111111111111111111111111111111111111111*
		223	L1508 0111011101110111011101110111011101111111111111111111*
		224	L1560 1111011110110111011101110111011101111111111111111111*
		225	L1612 1101111111111111111111111111111111111111111111111111*
		226	L1924 1111111111111111111111111111111111111111111111111111*
		227	L1976 0111101110111011101110111011101110111111111111111111*
		228	L2028 1111101110110111101110111011101110111111111111111111*
		229	L2080 1111101101111011101110111011101110111111111111111111*
		230	L2132 1111011110111011101110111011101110111111111111111111*
		231	L2184 1111011110110111101110111011101110111111111111111111*
		232	L2236 1111011101111011101110111011101110111111111111111111*
		233	L2288 1101111111111111111111111111111111111111111111111111*
		234	L2496 1111111111111111111111111111111111111111111111111111*
		235	L2548 0111011101110111011101110111011101110111111111111111*
		236	L2600 1111111110110111011101110111011101110111111111111111*
		237	L2652 1111111111111011011101110111011101110111111111111111*
		238	L2704 1111111111111111101101110111011101110111111111111111*
		239	L2756 1111111111111111111110110111011101110111111111111111*
		240	L2808 1111111111111111111111111011011101110111111111111111*
		241	L2860 1111111111111111111111111111101101110111111111111111*
		242	L3172 1111111111111111111111111111111111111111111111111111*
		243	L3224 1111111110110111011101110111011101110111111111111111*
		244	L3276 1111111111111011011101110111011101110111111111111111*
		245	L3328 1111111111111111101101110111011101110111111111111111*
		246	L3380 1111111111111111111110110111011101110111111111111111*
		247	L3432 1111111111111111111111111011011101110111111111111111*
		248	L3484 1111111111111111111111111111101101110111111111111111*
		249	L3848 1111111111111111111111111111111111111111111111111111*
		250	L3900 1111111111111111111111111011011110110111111110111111*
		251	L3952 1101111111111111111111111011011110110111111111111111*
		252	L4004 1111111111111111111111110111101110110111101111111111*
		253	L4056 1101111111111111111111110111101110110111111111111111*
		254	L4108 1111111111111111111111110111011110110111111111111011*
		255	L4160 1101111111111111111111110111011110110111111111111111*
		256	L4212 1111111111111111111111111011101110110111111111111111*
		257	L4420 1111111111111111111111111111111111111111111111111111*
		258	L4472 0111011101110111011101110111011101110111111111111111*
		259	L4524 1111011110110111011101110111011101110111111111111111*
		260	L4888 1111111111111111111111111111111111111111111111111111*
		261	L4940 1111111111111111011110111011101110111111111111111111*
		262	L4992 1111111111111111111101111011101110111111111111111111*
		263	L5044 1111111111111111111111110111101110111111111111111111*
		264	L5096 1111111111111111111111111111011110111111111111111111*
		265	L5148 1111111111111111111111111111111101111111111111111111*
		266	L5356 1111111111111111111111111111111111111111111111111111*
		267	L5408 1111101101110111011101110111011101110111111111111111*
		268	L5824 1111111111111111111111111111111111111111111111111111*
		269	L5876 1011011101110111011101110111011101110111111111111111*
		270	L6344 0101011111111111111101010011000000110000001100000011*
		271	L6396 010100100000001000000010000000100000*
		272	C568F*
		273
		274	I202 7/5/12 7:24 pm (Thursday)
		275	I203 Memory usage 11K
		276
		277

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