WebSVN – MB01 Project – Blame – /trunk/gal/20120601-MB01-65816/PLD/#0053.LST

Rev	Author	Line No.	Line
1	-	1	OrCAD LOGIC COMPILER v2.01 N 12/09/94 (Source file .\PLD\#0053.PLD)
		2
		3	1 \|\| FILE: #0053.PLD
		4	2 \|\| PROJ: 20120601
		5	3 \|\| PART: G26CV12-#0053
		6	4 \|\|
		7	5 \|\| DEV : GAL26CV12
		8	6 \|\|
		9	7 \|\| DESC: MASTER DECODER
		10	8 \|\|
		11	9 \|
		12	10 \|GAL26CV12
		13	11 \|
		14	12 \|\| INPUT
		15	13 \| 1:A9, 2:A10, 3:A11, 4:A12, 5:A13, 6:A14, 8:A15, 9:A16, 10:A17,
		16	14 \| 11:A18, 12:A19, 13:A20, 14:A21, 15:A22, 16:A23, 17:VMA, 18:RW,
		17	15 \| 24:HIM, 25:X0E, 26:X1E, 27:XFE, 28:FWE,
		18	16 \|\| OUTPUT
		19	17 \| 19:FE, 20:CS0, 22:ME, 23:CSF
		20	18 \|
		21	19 \| ACTIVE-LOW: FE, CS0, ME, CSF
		22	20 \|
		23	21 \|
		24	22 \| SIGNATURE: "0053 "
		25	23 \|
		26	24 \|\| --------------------------------------------------------
		27	25 \|\| HIM -> MAPPA AREA 00FE00 - 00FFFF IN RAM INVECE CHE IN FLASH
		28	26 \|\| X0E -> ABILITA EXTERN MEMORY (/CX0) IN BANCO 1 AREA 010000 - 011FFF (8K)
		29	27 \|\| X1E -> ABILITA EXTERN MEMORY (/CX1) IN BANCO 1 AREA 012000 - 013FFF (8K)
		30	28 \|\| XFE -> ABILITA FLASH MEMORY BANCHI F0/F7 AREA F00000 - F7FFFF
		31	29 \|\| FWE -> ABILITA WRITE FLASH MEMORY
		32	30 \|\| --------------------------------------------------------
		33	31 \|\|
		34	32 \|\| /FE -> ABILITA FLASH MEMORY F00000 - F7FFFF (512K)
		35	33 \|\| /ME -> ABILITA BANCHI RAM DA 4MB (ESCLUSO CSX, BK0)
		36	34 \|\| /CS0 -> PRIMO BLOCCO 128K IN 00000 - 01FFFF (ESCLUSO IO)
		37	35 \|\| /CSF -> BLOCCO FLASH IN F80000 - FFFFFF (512K)
		38	36 \|\| MAPPA 00FE00 - 00FFFF IN F8FE00 - F8FFFF SE HIM=0 E RW=1
		39	37 \|\| --------------------------------------------------------
		40	38 \|\|
		41	39 \|\| ABILITAZIONE RAM RANGE 020000 - FFFFFF
		42	40 \|\| B4MH -> BLOCCO 4MB 800000 - BFFFFF
		43	41 \| B4MH = (VMA' & A23 & A22' )
		44	42 \|\| B2MH -> BLOCCO 2MB C00000 - DFFFFF
		45	43 \| B2MH = (VMA' & A23 & A22 & A21' )
		46	44 \|\| B1MH -> BLOCCO 1MB E00000 - EFFFFF
		47	45 \| B1MH = (VMA' & A23 & A22 & A21 & A20' )
		48	46 \|\| B5KA -> BLOCCO 512KB F00000 - F7FFFF (RAM SOLO SE XFE=0)
		49	47 \| B5KA = (VMA' & A23 & A22 & A21 & A20 & A19' & XFE')
		50	48 \|\| B5KB -> BLOCCO 512KB F00000 - F7FFFF (RAM SOLO SE XFE=1, FWE=0, RW=0)
		51	49 \| B5KB = (VMA' & A23 & A22 & A21 & A20 & A19' & XFE & FWE' & RW')
		52	50 \|\|
		53	51 \|\| NOTA: ULTIMO BLOCCO 512KB F80000 - FFFFFF SOLO IN FLASH
		54	52 \|\|
		55	53 \|\| B4ML -> BLOCCO 4MB 400000 - 7FFFFF
		56	54 \| B4ML = (VMA' & A23' & A22 )
		57	55 \|\| B2ML -> BLOCCO 2MB 200000 - 3FFFFF
		58
		59
		60	58 \| B1ML = (VMA' & A23' & A22' & A21' & A20 )
		61	59 \|\| B5KL -> BLOCCO 512KB 080000 - 0FFFFF
		62	60 \| B5KL = (VMA' & A23' & A22' & A21' & A20' & A19 )
		63	61 \|\|
		64	62 \|\| /ME -> ABILITAZIONE RAM RANGE 080000 - F7FFFF
		65	63 \| MXH = (B4MH # B2MH # B1MH # B5KA # B5KB)
		66	64 \| MXL = (B4ML # B2ML # B1ML # B5KL)
		67	65 \| ME = (MXL # MXH)
		68	66 \|\|
		69	67 \|\| --------------------------------------------------------
		70	68 \|\|
		71	69 \| BANK0 = (A23' & A22' & A21' & A20' & A19' & A18' & A17' & A16' & VMA')
		72	70 \| BANK1 = (A23' & A22' & A21' & A20' & A19' & A18' & A17' & A16 & VMA')
		73	71 \|\| --------------------------------------------------------
		74	72 \|\|
		75	73 \|\| B0M -> ABILITAZIONE RAM RANGE 000000 - 00FFFF (BANCO 0)
		76	74 \|\|
		77	75 \|\| BLOCCO 32K
		78	76 \| RB0 = (BANK0 & A15' )
		79	77 \|\| BLOCCO 16K
		80	78 \| RB1 = (BANK0 & A15 & A14' )
		81	79 \|\| BLOCCO 8K
		82	80 \| RB2 = (BANK0 & A15 & A14 & A13' )
		83	81 \|\| BLOCCO 4K
		84	82 \| RB3 = (BANK0 & A15 & A14 & A13 & A12' )
		85	83 \|\| BLOCCO 2K
		86	84 \| RB4 = (BANK0 & A15 & A14 & A13 & A12 & A11' )
		87	85 \|\| BLOCCO 1K
		88	86 \| RB5 = (BANK0 & A15 & A14 & A13 & A12 & A11 & A10')
		89	87 \|\| ULTIMO BLOCCO 512B (00FE00 - 00FFFF)
		90	88 \| RB7 = (BANK0 & A15 & A14 & A13 & A12 & A11 & A10 & A9)
		91	89 \|\| RB7A -> RANGE 00FE00 - 00FFFF IN RAM SOLO SE HIM=1
		92	90 \| RB7A = (RB7 & HIM)
		93	91 \|\| RB7B -> RANGE 00FE00 - 00FFFF IN RAM SOLO SE RW=0
		94	92 \| RB7B = (RB7 & RW')
		95	93 \|\|
		96	94 \| B0M = (RB0 # RB1 # RB2 # RB3 # RB4 # RB5 # RB7A # RB7B)
		97	95 \|\| --------------------------------------------------------
		98	96 \|\|
		99	97 \|\| B1M -> ABILITAZIONE RAM RANGE 010000 - 01FFFF (BANCO 1)
		100	98 \|\|
		101	99 \|\| B32KH -> BLOCCO 32KB 018000 - 01FFFF
		102	100 \| B32KH = (BANK1 & A15)
		103	101 \|\| B16KH -> BLOCCO 16KB 014000 - 017FFF
		104	102 \| B16KH = (BANK1 & A15' & A14)
		105	103 \|\| B08KL -> BLOCCO 8KB 010000 - 011FFF
		106	104 \| B08KL = (BANK1 & A15' & A14' & A13' & X0E')
		107	105 \|\| B08KH -> BLOCCO 8KB 012000 - 013FFF
		108	106 \| B08KH = (BANK1 & A15' & A14' & A13 & X1E')
		109	107 \|\|
		110	108 \| B1M = (B32KH # B16KH # B08KL # B08KH)
		111	109 \|\| --------------------------------------------------------
		112	110 \|\|
		113	111 \|\| /CS0 -> ABILITAZIONE RAM RANGE 000000 - 01FFFF (BANCHI 0 & 1)
		114	112 \| CS0 = (B0M # B1M)
		115	113 \|\| --------------------------------------------------------
		116	114 \|\|
		117
		118
		119	117 \| FS0R = (A23 & A22 & A21 & A20 & A19' & VMA' & RW & XFE)
		120	118 \|\| FS0W -> ABILITA FLASH RANGE F00000 - F7FFFF SOLO SCRITTURA (FWE=1)
		121	119 \| FS0W = (A23 & A22 & A21 & A20 & A19' & VMA' & RW' & XFE & FWE)
		122	120 \|\|
		123	121 \|\| /FE -> ABILITAZIONE FLASH RANGE F00000 - F7FFFF
		124	122 \| FE = (FS0R # FS0W)
		125	123 \|\| --------------------------------------------------------
		126	124 \|\|
		127	125 \|\| FS1 -> ABILITA FLASH RANGE F80000 - FFFFFF
		128	126 \|\| FS1R -> ABILITA FLASH RANGE F80000 - FFFFFF SOLO LETTURA
		129	127 \| FS1R = (A23 & A22 & A21 & A20 & A19 & VMA' & RW)
		130	128 \|\| FS1W -> ABILITA FLASH RANGE F80000 - FFFFFF SOLO SCRITTURA (FWE=1)
		131	129 \| FS1W = (A23 & A22 & A21 & A20 & A19 & VMA' & RW' & FWE)
		132	130 \|\| FS2R -> MAPPA RANGE 00FE00 - 00FFFF IN F8FE00 - F8FFFF (HIM=0, RW=1)
		133	131 \| FS2R = (RB7 & RW & HIM')
		134	132 \|\|
		135	133 \|\| /CSF -> ABILITAZIONE FLASH RANGE F80000 - FFFFFF
		136	134 \| CSF = (FS1R # FS2R # FS1W)
		137
		138
		139	I200 No fatal errors found in source code (logic phase).
		140	I201 No warnings.
		141
		142
		143
		144	I203 Memory usage 130K
		145	I204 Elapsed time 1 second
		146
		147
		148
		149
		150	RESOLVED EXPRESSIONS (Reduction 0)
		151
		152	Signal name Row Terms
		153
		154
		155
		156
		157	52 A20' A21 A22 A23 VMA'
		158
		159	54 A21' A22 A23 VMA'
		160
		161	56 A22' A23 VMA'
		162	57 A22 A23' VMA'
		163
		164	CS0 62 A9 A10 A11 A12 A13 A14 A15 A16' A17' A18' A19'
		165	A20' A21' A22' A23' VMA' RW'
		166	63 A9 A10 A11 A12 A13 A14 A15 A16' A17' A18' A19'
		167	A20' A21' A22' A23' VMA' HIM
		168	64 A10' A11 A12 A13 A14 A15 A16' A17' A18' A19' A20'
		169	A21' A22' A23' VMA'
		170
		171	A22' A23' VMA'
		172	66 A12' A13 A14 A15 A16' A17' A18' A19' A20' A21' A22'
		173	A23' VMA'
		174	67 A13' A14' A15' A16 A17' A18' A19' A20' A21' A22' A23'
		175	VMA' X0E'
		176	68 A13 A14' A15' A16 A17' A18' A19' A20' A21' A22' A23'
		177	VMA' X1E'
		178	69 A13' A14 A15 A16' A17' A18' A19' A20' A21' A22' A23'
		179	VMA'
		180	70 A14' A15 A16' A17' A18' A19' A20' A21' A22' A23' VMA'
		181	71 A14 A15' A16 A17' A18' A19' A20' A21' A22' A23' VMA'
		182	72 A15' A16' A17' A18' A19' A20' A21' A22' A23' VMA'
		183	73 A15 A16 A17' A18' A19' A20' A21' A22' A23' VMA'
		184
		185	FE 75 A19' A20 A21 A22 A23 VMA' RW' XFE FWE
		186	76 A19' A20 A21 A22 A23 VMA' RW XFE
		187
		188	CSF 38 A9 A10 A11 A12 A13 A14 A15 A16' A17' A18' A19'
		189	A20' A21' A22' A23' VMA' RW HIM'
		190	39 A19 A20 A21 A22 A23 VMA' RW' FWE
		191
		192
		193
		194
		195	SIGNAL ASSIGNMENT
		196	Rows
		197	Pin Signal name Column -------------- Activity
		198	Beg Avail Used
		199
		200
		201
		202
		203	4. A12 12 - - - High
		204	5. A13 16 - - - High
		205	6. A14 20 - - - High
		206	8. A15 24 - - - High
		207
		208	10. A17 32 - - - High
		209	11. A18 36 - - - High
		210	12. A19 40 - - - High
		211	13. A20 44 - - - High
		212	14. A21 48 - - - High
		213	15. A22 50 112 9 0 High (Registered)
		214	16. A23 46 103 9 0 High (Registered)
		215	17. VMA 42 94 9 0 High (Registered)
		216	18. RW 38 85 9 0 High (Registered)
		217	19. FE 35 74 11 2 Low (Three-state)
		218	20. CS0 31 61 13 12 Low (Three-state)
		219	22. ME 27 48 13 9 Low (Three-state)
		220	23. CSF 23 37 11 3 Low (Three-state)
		221	24. HIM 18 28 9 0 High (Registered)
		222	25. X0E 14 19 9 0 High (Registered)
		223	26. X1E 10 10 9 0 High (Registered)
		224	27. XFE 6 1 9 0 High (Registered)
		225	28. FWE 2 - - - High
		226	29. - - 0 1 0
		227	30. - - 121 1 0
		228	---- ----
		229	122 26 (21%)
		230
		231
		232	I200 No fatal errors found in source code (device phase).
		233	I201 No warnings.
		234
		235
		236	OrCAD DEVICE
		237	Type: GAL26CV12
		238
		239
		240	F0*
		241	L1924 1111111111111111111111111111111111111111111111111111*
		242
		243
		244
		245	L2496 1111111111111111111111111111111111111111111111111111*
		246	L2548 1110110111111111111111111111111111111110101001010101*
		247	L2600 1111111011111111111111111111111111111111101001010101*
		248	L2652 1111111111111111111111111111111111111111011010101010*
		249	L2704 1111111111111111111111111111111111111111111010010101*
		250	L2756 1111111111111111111111111111111111111111111001101010*
		251	L2808 1111111111111111111111111111111111111111111011011001*
		252	L2860 1111111111111111111111111111111111111111111011100110*
		253	L2912 1111111111111111111111111111111111111111111011011110*
		254	L2964 1111111111111111111111111111111111111111111011101101*
		255	L3172 1111111111111111111111111111111111111111111111111111*
		256	L3224 0111011101110111011101110111101110111010101010101010*
		257	L3276 0111011101110111010101110111101110111011101010101010*
		258	L3328 1111101101110111011101110111101110111011101010101010*
		259	L3380 1111111110110111011101110111101110111011101010101010*
		260	L3432 1111111111111011011101110111101110111011101010101010*
		261	L3484 1111111111111110101110111011011110111011101010101010*
		262	L3536 1111111111101111011110111011011110111011101010101010*
		263	L3588 1111111111111111101101110111101110111011101010101010*
		264	L3640 1111111111111111111110110111101110111011101010101010*
		265	L3692 1111111111111111111101111011011110111011101010101010*
		266	L3744 1111111111111111111111111011101110111011101010101010*
		267	L3796 1111111111111111111111110111011110111011101010101010*
		268	L3848 1111111111111111111111111111111111111111111111111111*
		269	L3900 1101110111111111111111111111111111111110101001010101*
		270	L3952 1111110111111111111111111111111111111101101001010101*
		271	L6344 1111111101010101111111110011000000110000001101010011*
		272	L6396 001100100000001000000010000000100000*
		273	CA84D*
		274
		275	I202 7/24/12 10:44 am (Tuesday)
		276	I203 Memory usage 11K
		277	I204 Elapsed time 1 second
		278

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