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Rev | Author | Line No. | Line |
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1 | - | 1 | || FILE: #0050.PLD |
2 | || PROJ: 20120601 |
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3 | || PART: G22V10-#0050 |
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4 | || |
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5 | || DEV : GAL22V10 |
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6 | || |
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7 | || DESC: MASTER CLOCK |
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8 | || |
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9 | | |
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10 | |GAL22V10 |
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11 | | |
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12 | || INPUT |
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13 | | 1:CLK, 2:PD, 3:F2, 4:S0, 5:VPA, 6:VDA, 7:RES, 8:P2IN, 9:P1IN, 10:P0IN, |
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14 | | 11:P4IN, 13:RDY, |
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15 | || OUTPUT |
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16 | | 14:P2O, 15:Q0, 16:Q1, 17:Q2, 18:VMA, 19:ALE, 20:GOE, |
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17 | | 21:PHI1, 22:PHI0, 23:P4O |
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18 | | |
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19 | | ACTIVE-LOW: VMA |
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20 | | |
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21 | | SIGNATURE: "0050 " |
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22 | | |
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23 | || P2O -> CLOCK 02 CPU |
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24 | || CONNETTERE P0IN CON PHI0 |
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25 | || CONNETTERE P1IN CON PHI1 |
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26 | || CONNETTERE P4IN CON P4O |
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27 | || |
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28 | || Q0 = 8M, Q1 = 4M, Q2 = 2M |
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29 | | Q[2..0] = CLK // Q[2..0] + 1 |
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30 | | A = Q2 & F2' || 2MHz |
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31 | | B = Q1 & F2 || 4MHz |
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32 | | PHI0 = (A # B) || FASE 0 |
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33 | | P4O = P0IN || FASE 0 RITARDATA |
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34 | || P0IN -> FASE 0 RITARDO T (PD = 1) |
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35 | || P4IN -> FASE 0 RITARDO 2T (PD = 0) |
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36 | | P2O = ((P0IN & PD) # (P4IN & PD')) |
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37 | | PHI1 = P2IN' || FASE 1 RITARDATA RISPETTO A PHI2 |
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38 | | VMA = ((VDA & RES) # (VPA & RES)) |
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39 | | ALE = (RDY & P0IN' & P2IN') |
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40 | | DBEA = (RDY & P2IN' & S0) |
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41 | | DBEB = (RDY & P1IN & S0') |
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42 | | GOE = (DBEA # DBEB) |