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OrCAD LOGIC COMPILER  v2.01 N 12/09/94  (Source file .\PLD\#0153.PLD)
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  1  ||	FILE:	#0153.PLD
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  2  ||	PROJ:	20120600
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  3  ||	PART:	G16V8-#0153
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  4  ||
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  5  ||	DEV :	GAL16V8
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  6  ||
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  7  || 	DESC:	CTC CONTROL
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  8  ||
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  9  |
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 10  |GAL16V8A
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 11  |
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 12  || INPUT
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 13  |  1:SQW, 2:IN0, 3:IN1, 4:IN2, 5:E0, 6:SM,
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 14  |  7:PCTS1, 8:PCTS2, 9:RS485, 11:DTR2, 12:CTSI1, 13:CTSI2,
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 15  || OUTPUT
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 16  |  14:Q0, 15:TM0, 16:TM1, 17:TXE, 18:CTS1, 19:CTS2
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 17  |
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 18  | ACTIVE-LOW: TM0, TM1
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 19  |
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 20  | PROPERTY:"SIMPLE"
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 21  |
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 22  | SIGNATURE: "0153    "
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 23  |
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 24  ||
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 25  || --------------------------------------------------------
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 26  || INPUT
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 27  || SQW -> ONDA QUADRA DA PIN SQW RTC
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 28  || IN0 -> OUT0 CTC (MODO 0 - ONE SHOT)
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 29  || IN1 -> OUT1 CTC (MODO 0 - ONE SHOT)
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 30  || IN2 -> OUT3 CTC (MODO 3 - FREE RUN)
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 31  || /E0 -> ABILITA USCITA Q0 (BUZZER)
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 32  || /SM -> ABILITA SHOT MODE SU Q0, Q1
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 33  || NON USATI
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 34  || PCTS1 -> POLARITA' CTS1 (PCTS1 = 1 INVERTE)
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 35  || PCTS2 -> POLARITA' CTS2 (PCTS2 = 1 INVERTE)
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 36  || /RS485 -> ABILITA MODO RS485 SU ACIA-CHANNEL 2
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 37  || /CTSI1 -> INGRESSO /CTS CHANNEL 1
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 38  || /CTSI2 -> INGRESSO /CTS CHANNEL 2
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 39  || /DTR2 ->  USCITA /DTR CHANNEL 2
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 40  ||
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 41  || --------------------------------------------------------
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 42  || CONTROLLO POLARITA' CTS1, CTS2
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 43  |  CTS1 = (CTSI1 ## PCTS1)
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 44  |  CTS2 = (CTSI2 ## PCTS2)
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 45  ||
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 46  || --------------------------------------------------------
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 47  || ABILITA TX RS485
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 48  |  TXE = (RS485' & DTR2')
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 49  ||
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 50  || --------------------------------------------------------
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 51  || TM0 -> IMPULSO POSITIVO PER 65C22 (ONE SHOT)
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 52  || TM1 -> IMPULSO POSITIVO PER 65C22 (ONE SHOT)
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 53  || 82C54 OUT0 IN MODO 0 (ONE SHOT) - OUT INIZIALE -> 0 (TIMER)
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 54  || 82C54 OUT1 IN MODO 0/3 (ONE SHOT/FREE-RUN) - OUT INIZIALE -> 0/1
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 55  || 82C54 OUT2 IN MODO 0 (ONE SHOT) - OUT INIZIALE -> 0 (BEEP)
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 58  ||
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 59  || OUT Q0: IMPULSO POSITIVO ONE SHOT (E0 = 0, SM = 0)
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 60  |  X1 = (SM' & SQW & E0' & IN2')
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 61  || OUT Q0: FREE RUN + ONE SHOT (E0 = 0, SM = 1)
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 62  |  X2 = (SM  & SQW & E0' & IN2' & IN1)
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 63  |  Q0 = (X1 # X2)
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 64  ||
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 65  ||  TM1A = (E0  & SM  & IN1)	|| E0 = 1, SM = 1 - CTC 1
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 66  ||  TM1B = (E0  & SM' & IN2)	|| E0 = 1, SM = 0 - CTC 2
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 67  ||  TM1C = (E0' & SM  & IN1)	|| E0 = 0, SM = 1 - CTC 1
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 68  ||  TM1D = (E0' & SM' & IN2)	|| E0 = 0, SM = 0 - CTC 2
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 69  ||  TM1 = (TM1A # TM1B # TM1C # TM1D)
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 70  |  TM1A = (E0  & SM  & IN1)	|| E0 = 1, SM = 1 - CTC 1
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 71  |  TM1B = (E0  & SM' & IN1)	|| E0 = 1, SM = 0 - CTC 1
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 72  |  TM1C = (E0' & SM  & IN1)	|| E0 = 0, SM = 1 - CTC 1
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 73  |  TM1 = (TM1A # TM1B # TM1C)
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I202  8/30/12  12:06 pm  (Thursday)
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OrCAD DEVICE FITTER  v2.01   12/09/94  (Source file .\PLD\#0153.PLA)
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I289  Simple GAL architecture selected.
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                   9   PCTS1  CTSI1'
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CTS2               0   PCTS2' CTSI2
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TXE               16   RS485' DTR2'
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TM0               32   IN0
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                  41   SQW  IN2' E0' SM'
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TM1               24   IN1  E0' SM
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                  26   IN1  E0  SM
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SIGNAL ASSIGNMENT
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                                      Rows
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  2.     IN0             0        -    -    -        High
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  3.     IN1             4        -    -    -        High
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  4.     IN2             8        -    -    -        High
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  5.     E0             12        -    -    -        High
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  7.     PCTS1          20        -    -    -        High
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  8.     PCTS2          24        -    -    -        High
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  9.     RS485          28        -    -    -        High
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 11.     DTR2           30        -    -    -        High    (Enable)
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 12.     CTSI1          26       56    8    0        High
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 13.     CTSI2          22       48    8    0        High
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 14.     Q0             18       40    8    2        High
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 15.     TM0             1       32    8    1        Low
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 16.     TM1             1       24    8    3        Low
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 17.     TXE            14       16    8    1        High
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 18.     CTS1           10        8    8    2        High
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 19.     CTS2            6        0    8    2        High
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                                    ---- ----
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                                      64   11  (17%)
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I200  No fatal errors found in source code (device phase).
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I201  No warnings.
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*
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QP20* QF2194* QV1024*
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L0256 11 11 11 11 11 11 11 11 11 11 10 11 11 01 11 11 *
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L0288 11 11 11 11 11 11 11 11 11 11 01 11 11 10 11 11 *
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L0512 11 11 11 11 11 11 11 11 11 11 11 11 11 11 10 10 *
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L0768 11 11 01 11 11 11 10 11 01 11 11 11 11 11 11 11 *
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L0800 11 11 01 11 11 11 01 11 10 11 11 11 11 11 11 11 *
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L0832 11 11 01 11 11 11 01 11 01 11 11 11 11 11 11 11 *
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L1024 01 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
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L1280 11 01 01 11 10 11 10 11 01 11 11 11 11 11 11 11 *
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L1312 11 01 11 11 10 11 10 11 10 11 11 11 11 11 11 11 *
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L2048 11 10 01 11 00 11 00 00 00 11 00 01 00 11 01 01 *
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L2080 00 11 00 11 00 10 00 00 00 10 00 00 00 10 00 00 *
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L2112 00 10 00 00 00 00 00 11 11 11 11 11 11 11 11 11 *
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L2144 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 *
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L2176 11 11 11 11 11 11 11 11 10 *
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C3521*
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I202  8/30/12  12:06 pm  (Thursday)
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I203  Memory usage 5K
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I204  Elapsed time 1 second
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