65C816 Memory Map

From:	To:	Type	Notes
$000000	$00FBFF	RAM	Direct Page & CPU Stack
$00FC00	$00FCFF	IO Space 1	256 bytes of IO space
$00FD00	$00FDFF	IO Space 2	256 bytes of IO space
$00FE00	$00FFFF	FLASH (read) / RAM (write)	At RESET the BIOS flash addressed in $F0FE00-$F0FFFF will be mapped here (for vectors and boot). Later the flash can be switched off and RAM can be switched on (after copy code in RAM) by a bit in Control Register.
$010000	$011FFF	RAM/Video RAM	Window of 8Kb. By a bit in Control Register the CPU can svitch off the normal RAM and select the RAM in video board.
$010000	$0107FF	Video RAM	Buffer characters for the video card (2Kb) if selected
$010800	$010FFF	Video RAM	Buffer attributes for the video card (2Kb) if selected
$011000	$0113FF	Video RAM	Color Palette for the video card (1Kb) if selected
$012000	$013FFF	RAM/Extended RAM	Window of 8Kb. By a bit in Control Register the CPU can svitch off the normal RAM and select the Extended RAM (2Mb). Available 256 blocks of 8Kb for use as ram-disk or others. Blocks are managed by port A of the PIA in the mainboard.
$014000	$01FFFF	RAM
$020000	$03FFFF	RAM	This 128Kb block is used by DMA in the FDC controller. Note that when DMA is enabled the CPU cannot have access to this memory. Now i use this space also as buffer for ATA transfer.
$040000	$EFFFFF	RAM	Full available for any purpose
$F00000	$F7FFFF	RAM / Secondary FLASH	This block of 512Kb is normally mapped in RAM but by a bit in Control Register the CPU can switch off the RAM and select a secondary FLASH AM29F040 (optional). This FLASH can be used for store a user program or an extended BIOS/OS.
$F80000	$FFFFFF	System FLASH	This block of 512Kb is normally mapped in system FLASH (AM29F040). (see note below). The space $F8FE00-$F8FFFF will also mapped in $00FE00-$00FFFF at reset: by this way the vectors and boot code can be stay in flash.

At this time i use an eprom emulator for upload the code while programming the bios.At starting very strange things were happening: sometimes did not happen boot or froze everything, even if the code was correct. I then decided to program a flash with the the same code and everything works perfectly. After writing the system monitor and had intercepted the BRK instruction, using the emulator eprom I noticed that they were often executed the break but were not included in the code, instead with the same code in the flash everything works perfectly. My conclusion is that at random eprom emulator provides the byte $00 (BRK instruction code), otherwise it does not explain the anomaly. After this experience I used the eprom emulator into the socket of the secondary flash, and at the boot, the CPU copies the memory $F00000-$F7FFFF to a RAM mapped in $F80000-$FFFFFF (write-only).So with a bit of the control register permanently deselect the flash system (which is only used at boot time) and I enable RAM. In this way everything works correctly even when using the emulator (the eprom emulator is model EeRom-8U from EETOOLS).

65C816 I/O Map

From:	To:	Purpose	Notes
$00FC00	$00FC0F	Control Register (R/W)	Control Register is read/write and manage some basic functions and is in the CPU board.
$00FC10	$00FC6F	Now free space	Available for I/O slot
$00FC70	$00FC71	R6545EAP registers	Only if video board is installed
$00FC72	$00FC72	Underline match register (write only)	Only if video board is installed. Is used for generate the underline in a character.
$00FC74	$00FC77	WDC65C21 PIA	Only if video board is installed. Control of some functions in video board.
$00FC78	$00FCFF	Now free space	Available for I/O slot
$00FD00	$00FD0F	R65C22 VIA0	Ever present (mainboard).
$00FD10	$00FD1F	R65C22 VIA1	Ever present (mainboard).
$00FD20	$00FD27	ATA 0 Registers	Ever present (mainboard).
$00FD28	$00FD2B	WDC65C21 PIA	Ever present (mainboard).
$00FD2C	$00FD2C	ATA 0 high data bus	Ever present (mainboard). Read/write the high data of ATA bus while in PIO mode data transfer.
$00FD2E	$00FD2E	ATA 0 Registers	Ever present (mainboard). Alternate status register (read only)
$00FD30	$00FD37	ATA 1 Registers	Ever present (mainboard).
$00FD38	$00FD3B	WDC65C21 PIA	Only if the LCD board is installed.
$00FD3C	$00FD3C	ATA 1 high data bus	Ever present (mainboard). Read/write the high data of ATA bus while in PIO mode data transfer.
$00FD3E	$00FD3E	ATA 1 Registers	Ever present (mainboard). Alternate status register (read only)
$00FD40	$00FD43	File Registers (R/W)	Ever present (mainboard). This file register is used by CPU to communicate with PIC18F4420 (keyboard controller)
$00FD44	$00FD44	Keyboard Status	Ever present (mainboard). Read only
$00FD44	$00FD44	Keyboard Service	Ever present (mainboard). Write only. Used by CPU to inform PIC that a request of service is pending. Data don't care.
$00FD45	$00FD45	Keyboard clear NMI	Ever present (mainboard). Write only. Used by CPU to clear an NMI pending from PIC. Data don't care.
$00FD46	$00FD46	Keyboard clear IRQ	Ever present (mainboard). Write only. Used by CPU to clear an IRQ pending from PIC. Data don't care.
$00FD47	$00FD47	IRQ Vector	Ever present (mainboard). Read only. Used by CPU to read the vector during ISR.
$00FD48	$00FD4B	CTC 82C54	Ever present (mainboard).
$00FD4C	$00FD4C	RTC DS1687	Ever present (mainboard). Write only. This register hold the address to read/write in the RTC chip
$00FD4D	$00FD4D	RTC DS1687	Ever present (mainboard). Read/Write. This register is used by CPU to read/write an internal register in the RTC chip. The address that will be readout or written is first written in $00FD4C
$00FD4E	$00FD4F	MOS 8563	Ever present (mainboard). This is the VDC in mainboard
$00FD50	$00FD57	ACIA R65C52	Only if serial board is installed
$00FD58	$00FD5F	FDC UM8388	Only if FDC board is installed
$00FD60	$00FD6F	DMA 83C37	Only if FDC board is installed
$00FD70	$00FDFF	Now free space	Available for I/O slot

65C816 Control Register: $00FC00 - $00FC0F. CR0-CR7 bits of this register are cleared at reset. When CPU write to this register data is "don't care".
Address		Write (data don't care)	Read	Purpose
$00FC00	CR0	Reset bit	Read back bit value	None. It can be used freely as a bit storage
$00FC01	CR0	Set bit	Read back bit value
$00FC02	CR1	Reset bit	Read back bit value	None. It can be used freely as a bit storage
$00FC03	CR1	Set bit	Read back bit value
$00FC04	CR2	Reset bit	Read back bit value	None. It can be used freely as a bit storage
$00FC05	CR2	Set bit	Read back bit value
$00FC06	CR3	Reset bit	Read back bit value	Disable the "write" line to flash memory
$00FC07	CR3	Set bit	Read back bit value	Enable the "write" line to flash memory. This allows the in-circuit programming of the flash memory (following the appropriate algorithm)
$00FC08	CR4	Reset bit	Read back bit value	Enable RAM in the range $F00000-$F7FFFF
$00FC09	CR4	Set bit	Read back bit value	Enable secondary flash memory in the range $F00000-$F7FFFF
$00FC0A	CR5	Reset bit	Read back bit value	Enable standard RAM in the range $012000-$013FFF
$00FC0B	CR5	Set bit	Read back bit value	Enable RAM-Disk in the range $012000-$013FFF
$00FC0C	CR6	Reset bit	Read back bit value	Enable standard RAM in the range $010000-$011FFF
$00FC0D	CR6	Set bit	Read back bit value	Enable Video-RAM in the range $010000-$011FFF
$00FC0E	CR7	Reset bit	Read back bit value	Map FLASH $F8FE00-$F8FFFF in the range $00FE00-$00FFFF. At reset vectors and boot code stay in flash memory.
$00FC0F	CR7	Set bit	Read back bit value	Enable standard RAM in the range $00FE00-$00FFFF. After boot the CPU can svitch-off the flash memory in this range.