MB01 - 65C816/65C02 Computer

This was my first attempt to build a small computer based on the 65XX series of microprocessor family.
In the project I attempted to provide a system based on some common blocks, such as the keyboard interface, so that they can be used interchangeably with both the 65C816 and the 65C02.
Perhaps in the end it all came too complex, with some design errors, and with some parts that could be simplified or eliminated.
For example, the decision on using GAL, that I have in abundance, instead of more complex CPLD (such as the series Xilinix XC95XX), not allowed to obtain a circuit leaner and smaller PCBs.
In some cases, the complexity was caused by information not entirely clear in the datasheet of the various electronic components, for which in the design phase I searched for redundant solutions still have the guarantee of operation.
For example, in the project I put the logic required to insert wait cycles for access to certain chips (such as the 82C37 DMA, or UM8388 FDC controller, or video controller MOS8563) which proved to be useless with a 4MHz clock.
In addition, having available a series of chips with DIP package I decided not to use SMD components and this also has an impact on the final size of the various printed circuit boards.
However, will be the readers to judge the final result, well aware that the project can be improved from the point of view of a circuit, and also at the assembly level.

The screen in the VGA monitor after boot.After the check of memory and IO subsystem, the BIOS detect ATA devices and the type of file system, then launches the system monitor waiting command.

The screen in the VGA monitor after boot of the second computer.The character font is the standard font of PC in text mode (DOS).

System Architecture

The chosen solution, probably not optimal, was to design a system bus oriented of hybrid type: two parallel buses can accommodate cards in eurocard format, a part for controlling the power supply system that uses a standard power supply of the PC, and a part of I/O devices capable of controlling the video output, a standard keyboard PS2, the generation of wait cycles and the management of a system of vectored interrupt (eight levels).
This hybrid bus has been implemented in a mainboard (see description here) which includes eight slots for housing I/O cards, and two of these slots are exclusively used by the serial card (with two RS232 ports and one RS485 port) and the floppy disk controller. The serial card is based on a dual-acia R65C52P3 (3MHz) and the floppy disk controller is based on the chip UM8388 used in the past in personal computers (obviously is able to manage a 1.44Mb floppy). The FDC board also contains a DMA controller 82C37-5 (5MHz) and a 128Kb buffer RAM and controls the data transfer between the UM8388 and memory without CPU intervention.
An additional I/O slots in this mainboard is exclusively dedicated to the housing of a video card capable of driving a VGA monitor and video controller is based on R6545EAP (or on a HD6545). The output of this card is digital RGBI and can therefore generate only text in 16 colors. The video memory is 5 kB (2Kb buffer used by the characters, the attributes used 2Kb, 1Kb used by the color palette). The RAM is shared between the CRTC and the CPU, and is of type dual-port static. On board there are two clock generators: one at 25.175MHz (standard VGA) and one at 16MHz to drive through a SCART a PAL/NTSC TV.
A small card contains a converter from digital RGBI to analog VGA/SCART.
In the mainboard there are a further six slots used in the following way: a slot for the CPU card, four slots for four modules of RAM (4MB each), and a dedicated slot for the card that contains the flash memory and additional 2Mb of RAM to utilize as ram-disk (or other).
In the mainboard is also present a VDC MOS8563 used in the Commodore C128, able to drive (via the small card converter) a TV.The VGA-compatible video card was the last built, so until that time I used the VDC 8563: now this has become useless.
The real time clock is based on the DS1687 (with internal oscillator), while to generate long intervals of time and to generate the beep-beep is used a counter 82C54
In the mainboard there are two interfaces to connect ATA hard disk or CF, but the transfer between the ATA bus and memory is handled by the CPU and not by the DMA (the circuit would be very complicated to handle transfers to 16-bit bus ATA , but in the future I want to carry on a ATA interface with DMA).
The interface for the keyboard (standard PC keyboard with 5-pin DIN connector, the old type) is based on a PIC18F4420 microcontroller, which manages the serial communication with the keyboard, converts those keys in ASCII or in control, and communicates with the CPU via an interrupt (IRQ or NMI). To exchange data between the CPU and the PIC so fast I used the file register 74LS670 (or 74HCT670), and a simple communication protocol. Some key combinations (such as CTRL + ALT + DEL) are intercepted by the PIC that generates a non-maskable interrupt to the CPU.
Two R65C22P4 and a WDC65C21 are present to handle various control lines (for example to set waiting cycles for access to I / O devices).
The interrupts are prioritized and vectorized to eight levels through the use of the classic encoder 74LS148 (or 74HC148) and a latch register which hold the vector during the rising edge of PHI2.
To avoid timing problems, RDY line of the CPU is controlled by a totem-pole output and not an open-collector output. In each I/O slot is a dedicated line RDY, and also in some mainboard chip involving the use of wait cycles (which later proved to be unnecessary), so I simply connected in AND all the RDY lines of the various slot and I avoided the use of the wired-and configuration with passive pullup.

CPU Either 65C816 or 65C02 with PHI2 selectable at 4MHz or 2MHz (by dip-swith in cpu board)
Standard RAM 65C818: all linear address space filled with 16Mb
65C02: 768Kb banked plus 128Kb for DMA
FLASH memory 65C818: 512Kb plus optional 512Kb
65C02: 256Kb banked (8 banks of 32Kb)
Extended RAM 2Mb banked (256 banks) in a window of 8Kb
Video RAM 64Kb with MOS8563 on-board
5Kb with optional video board
Storage Two ATA port (data transfer in PIO-mode) for attach PATA hard-disk and/or Compact Flash (via adapter)
One FDC port (virh DMA transfer) for attach standard PC floppy (DD/HD floppy)
Keyboard Standard PC keyboard old type (DIN connector) or PS/2 (miniDIN) via adapter
Communication Two RS232 port with full handshake (baude rate selectable from 50 to 38.400 bps)
One RS485 port (baude rate selectable from 50 to 38.400 bps)
Video output PAL/NTSC compatible with MOS8563 on-board and SCART connector. Video attributes: alternate font, reverse, blinking, underline, 16 foreground colors. Screen org.: 80 columns x 25 rows. Font: VGA 8x8
VGA compatible with optional video board. Video attributes: reverse, blinking, underline, 16 colors foreground/background (only 32 or 64 combination at time possible). Screen org.: 80 columns x 25 rows. Font: VGA 8x16.
Expansion Bus Six free I/O slot eurocard standard
Power Supply PC Standard
Planning for the future A new FDC/ATA board with full DMA (either for FDC and ATA port)
Board with standard printer port and floating point co-processor MC68882
Audio board with SN76489
Standard IEEE-488/GPIB board
A standard PS2 mouse controller

In the coming days I update the site with a detailed description of various boards, and the programming model (memory maps, maps I/O). At this time the computer has all the basic functions for video, ATA interface, keyboard, serial interface, interface for the floppy, and an small system monitor very simple.
In addition, I also implemented in software operations with integers up to 64 bits, and the four basic operations for floating-point numbers (80 bits, with 64-bit mantissa, 19/20 significant digits). I was able to implement a function for formatting strings that works exactly (or almost) as the standard sprintf() function in C.
Now I'm developing the driver to handle the FAT file system (FAT12, FAT16 and FAT32) with support for long file names, and for the dynamic memory management (in the style of the standard malloc() function in C).All this in assembly language for maximum system performance. In the coming days I update the site with the software that I have developed so far.