ATA/FDC/DMA Controller
SHORT DESCRIPTION
This board is a replacement for previous fdc board.
Unsatisfied about performance of ATA port's on mainboard (that works in PIO mode), i decided to build a new board that can access ata port's in dma mode,
for take advantage of 16 bit transfer. The board is little complex because mix a 16 bit dma for ata port's and an 8 bit dmafor floppy disk controller.
Also, i needed to mantain compatibility hardware with old fdc board so the memory is banked (in a 128k window). The size of ram is now 1Mb. For FDC i let also a 128k ram because
was not sure about the way i handle the switch between even/odd addresses of ram devoted to fdc dma.
By this way, the two 512k chip are seen as a 1Mb from cpu side, and like a 512kwords by dma chip.
After testing this board i realize that the 128k chip is useless, because the mechanism of interface the 8 bit bus of FDC with the 16 bit bus of the two 512k chips work fine.
On board is present a module CH375 (or CH376) for access USB storage device.
The more complex part was interfacing the 16bit dma controller to the cpu bus: the cpu access dma chip with 8 bit bus, but when dma chip transfer to/from ata port will put addresses for an 16 bit access.
The interface to ata port too is little complex because this port will be accessed in PIO mode by cpu, but can also be accessed (just on data register) in dma mode.
The PIO mode on data register must be mantained because the identify command to ata device should be submitted just in PIO mode.
DMA chip for ata port's is clocked at 12MHz (in board i put an oscillator at 20MHz for clock 82C37 at 10MHz too because i was not sure that chips worked fine at 12MHz).
Schematics:
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